37
37
/*------------------------------------------------------------*/
38
/*--- The dispatch loop. ---*/
39
/*--- The dispatch loop. VG_(run_innerloop) is used to ---*/
40
/*--- run all translations except no-redir ones. ---*/
39
42
/*------------------------------------------------------------*/
41
/* signature: UWord VG_(run_innerloop) ( void* guest_state ) */
44
/*----------------------------------------------------*/
45
/*--- Preamble (set everything up) ---*/
46
/*----------------------------------------------------*/
43
.globl VG_(run_innerloop)
49
UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling );
52
.globl VG_(run_innerloop)
53
.type VG_(run_innerloop), @function
44
54
VG_(run_innerloop):
55
/* r3 holds guest_state */
56
/* r4 holds do_profiling */
45
58
/* ----- entry point to VG_(run_innerloop) ----- */
47
59
/* For Linux/ppc32 we need the SysV ABI, which uses
48
60
LR->4(parent_sp), CR->anywhere.
49
(The AIX ABI, used on Darwin, and maybe Linux/ppc64?,
61
(The AIX ABI, used on Darwin,
50
62
uses LR->8(prt_sp), CR->4(prt_sp))
111
123
/* It's necessary to save/restore VRSAVE in the AIX / Darwin ABI.
112
124
The Linux kernel might not actually use VRSAVE for its intended
113
125
purpose, but it should be harmless to preserve anyway. */
114
/* r3 is live here (guest state ptr), so use r4 */
115
lis 4,VG_(machine_ppc32_has_VMX)@ha
116
lwz 4,VG_(machine_ppc32_has_VMX)@l(4)
126
/* r3, r4 are live here, so use r5 */
127
lis 5,VG_(machine_ppc32_has_VMX)@ha
128
lwz 5,VG_(machine_ppc32_has_VMX)@l(5)
120
132
/* VRSAVE save word : 32 bytes */
121
mfspr 4,256 /* vrsave reg is spr number 256 */
133
mfspr 5,256 /* vrsave reg is spr number 256 */
124
136
/* Alignment padding : 4 bytes */
126
138
/* Vector reg save area (quadword aligned) : 192 bytes */
159
171
/* 32(sp) used later to check FPSCR[RM] */
161
173
/* r3 holds guest_state */
163
stw 3,28(1) /* spill orig guest_state ptr */
174
/* r4 holds do_profiling */
175
mr 31,3 /* r31 (generated code gsp) = r3 */
176
stw 3,28(1) /* spill orig guest_state ptr */
165
178
/* 24(sp) used later to stop ctr reg being clobbered */
179
/* 20(sp) used later to load fpscr with zero */
169
182
/* Linkage Area (reserved)
171
184
0(sp) : back-chain
174
// CAB TODO: Use a caller-saved reg for orig guest_state ptr
175
// - rem to set non-allocateable in isel.c
177
/* hold dispatch_ctr in ctr reg */
178
lis 17,VG_(dispatch_ctr)@ha
179
lwz 17,VG_(dispatch_ctr)@l(17)
182
/* fetch %CIA into r30 */
183
lwz 30,OFFSET_ppc32_CIA(31)
187
/* CAB TODO: Use a caller-saved reg for orig guest_state ptr
188
- rem to set non-allocateable in isel.c */
190
/* hold dispatch_ctr in r29 */
191
lis 5,VG_(dispatch_ctr)@ha
192
lwz 29,VG_(dispatch_ctr)@l(5)
185
194
/* set host FPU control word to the default mode expected
186
195
by VEX-generated code. See comments in libvex.h for
188
lis 3,VG_(machine_ppc32_has_FP)@ha
189
lwz 3,VG_(machine_ppc32_has_FP)@l(3)
197
lis 5,VG_(machine_ppc32_has_FP)@ha
198
lwz 5,VG_(machine_ppc32_has_FP)@l(5)
193
fsub 3,3,3 /* generate zero */
202
/* get zero into f3 (tedious) */
203
/* note: fsub 3,3,3 is not a reliable way to do this,
204
since if f3 holds a NaN or similar then we don't necessarily
205
wind up with zero. */
209
mtfsf 0xFF,3 /* fpscr = f3 */
197
212
/* set host AltiVec control word to the default mode expected
198
213
by VEX-generated code. */
199
lis 3,VG_(machine_ppc32_has_VMX)@ha
200
lwz 3,VG_(machine_ppc32_has_VMX)@l(3)
214
lis 5,VG_(machine_ppc32_has_VMX)@ha
215
lwz 5,VG_(machine_ppc32_has_VMX)@l(5)
204
219
vspltisw 3,0x0 /* generate zero */
208
223
/* make a stack frame for the code we are calling */
211
/* fall into main loop */
215
r30 (=CIA = jump address)
219
44(r1) (=orig guest_state)
223
/* save the jump address in the guest state */
224
stw 30,OFFSET_ppc32_CIA(31)
226
/* Are we out of timeslice? If yes, defer to scheduler. */
227
bdz counter_is_zero /* decrements ctr reg */
229
/* try a fast lookup in the translation cache */
230
/* r4=((r30<<2) & (VG_TT_FAST_MASK<<2)) */
231
rlwinm 4,30, 2, 32-2-VG_TT_FAST_BITS, 31-2
232
// CAB: use a caller-saved reg for this ?
233
addis 5,4,VG_(tt_fast)@ha
234
lwz 5,VG_(tt_fast)@l(5)
235
lwz 6,4(5) /* big-endian, so comparing 2nd 32bit word */
226
/* fetch %CIA into r3 */
227
lwz 3,OFFSET_ppc32_CIA(31)
229
/* fall into main loop (the right one) */
230
/* r4 = do_profiling. It's probably trashed after here,
231
but that's OK: we don't need it after here. */
233
beq VG_(run_innerloop__dispatch_unprofiled)
234
b VG_(run_innerloop__dispatch_profiled)
237
/*----------------------------------------------------*/
238
/*--- NO-PROFILING (standard) dispatcher ---*/
239
/*----------------------------------------------------*/
241
.global VG_(run_innerloop__dispatch_unprofiled)
242
VG_(run_innerloop__dispatch_unprofiled):
243
/* At entry: Live regs:
245
r3 (=CIA = next guest address)
249
44(r1) (=orig guest_state)
252
/* Has the guest state pointer been messed with? If yes, exit. */
253
lwz 5,44(1) /* original guest_state ptr */
257
/* save the jump address in the guest state */
258
stw 3,OFFSET_ppc32_CIA(31)
260
/* Are we out of timeslice? If yes, defer to scheduler. */
265
/* try a fast lookup in the translation cache */
266
/* r4 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
267
= ((r3 >>u 2) & VG_TT_FAST_MASK) << 2 */
268
rlwinm 4,3, 0, 32-2-VG_TT_FAST_BITS, 31-2
269
addis 5,4,VG_(tt_fast)@ha
270
lwz 5,VG_(tt_fast)@l(5)
271
lwz 6,4(5) /* big-endian, so comparing 2nd 32bit word */
273
bne fast_lookup_failed
275
/* Found a match. Call tce[1], which is 8 bytes along, since
276
each tce element is a 64-bit int. */
280
/* run the translation */
283
/* On return from guest code:
284
r3 holds destination (original) address.
285
r31 may be unchanged (guest_state), or may indicate further
286
details of the control transfer requested to *r3.
290
b VG_(run_innerloop__dispatch_unprofiled)
293
/*----------------------------------------------------*/
294
/*--- PROFILING dispatcher (can be much slower) ---*/
295
/*----------------------------------------------------*/
297
.global VG_(run_innerloop__dispatch_profiled)
298
VG_(run_innerloop__dispatch_profiled):
299
/* At entry: Live regs:
301
r3 (=CIA = next guest address)
305
44(r1) (=orig guest_state)
308
/* Has the guest state pointer been messed with? If yes, exit. */
309
lwz 5,44(1) /* original guest_state ptr */
313
/* save the jump address in the guest state */
314
stw 3,OFFSET_ppc32_CIA(31)
316
/* Are we out of timeslice? If yes, defer to scheduler. */
321
/* try a fast lookup in the translation cache */
322
/* r4 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
323
= ((r3 >>u 2) & VG_TT_FAST_MASK) << 2 */
324
rlwinm 4,3, 0, 32-2-VG_TT_FAST_BITS, 31-2
325
addis 5,4,VG_(tt_fast)@ha
326
lwz 5,VG_(tt_fast)@l(5)
327
lwz 6,4(5) /* big-endian, so comparing 2nd 32bit word */
237
329
bne fast_lookup_failed
239
331
/* increment bb profile counter */
240
// CAB: use a caller-saved reg for this ?
241
332
addis 6,4,VG_(tt_fastN)@ha
242
333
lwz 7,VG_(tt_fastN)@l(6)
252
/* stop ctr being clobbered */
253
// CAB: use a caller-saved reg for this ?
254
// but then (bdz) => (decr, cmp, bc)... still better than a stw?
256
stw 9,40(1) /* => 40-16 = 24(1) on our parent stack */
343
/* run the translation */
261
346
/* On return from guest code:
262
r3 holds destination (original) address.
347
r3 holds destination (original) address.
264
348
r31 may be unchanged (guest_state), or may indicate further
265
349
details of the control transfer requested to *r3.
267
If r31 is unchanged (== 44(r1)), just jump next to r3.
269
Otherwise fall out, back to the scheduler, and let it
270
figure out what to do next.
273
/* reinstate clobbered ctr */
277
mr 30,3 /* put CIA (=r3) in r30 */
278
lwz 16,44(1) /* original guest_state ptr */
280
beq dispatch_boring /* r31 unchanged... */
282
mr 3,31 /* put return val (=r31) in r3 */
283
b dispatch_exceptional
353
b VG_(run_innerloop__dispatch_profiled)
356
/*----------------------------------------------------*/
357
/*--- exit points ---*/
358
/*----------------------------------------------------*/
361
/* Someone messed with the gsp (in r31). Have to
362
defer to scheduler to resolve this. dispatch ctr
363
is not yet decremented, so no need to increment. */
364
/* %CIA is NOT up to date here. First, need to write
365
%r3 back to %CIA, but without trashing %r31 since
366
that holds the value we want to return to the scheduler.
367
Hence use %r5 transiently for the guest state pointer. */
368
lwz 5,44(1) /* original guest_state ptr */
369
stw 3,OFFSET_ppc32_CIA(5)
370
mr 3,31 /* r3 = new gsp value */
375
/* %CIA is up to date */
376
/* back out decrement of the dispatch counter */
378
li 3,VG_TRC_INNER_COUNTERZERO
382
/* %CIA is up to date */
383
/* back out decrement of the dispatch counter */
385
li 3,VG_TRC_INNER_FASTMISS
285
390
/* All exits from the dispatcher go through here.
286
391
r3 holds the return value.
298
/* This check avoidance may be removable if stfiwx is implemented. */
299
#if !defined(ENABLE_INNER)
300
/* Check FPSCR & 0xFF == 0 (lowest 8bits are controls) */
301
mffs 4 /* fpscr -> fpr */
303
stfiwx 4,5,1 /* fpr to stack */
304
lwzx 6,5,1 /* load to gpr */
305
andi. 6,6,0xFF /* mask wanted bits */
306
cmplwi 6,0x0 /* cmp with zero */
307
bne invariant_violation /* branch if not zero */
403
/* Set fpscr back to a known state, since vex-generated code
404
may have messed with fpscr[rm]. */
410
mtfsf 0xFF,3 /* fpscr = f3 */
311
413
/* Using r11 - value used again further on, so don't trash! */
439
540
addi 1,1,496 /* stack_size */
443
/* Other ways of getting out of the inner loop. Placed out-of-line to
444
make it look cleaner.
446
dispatch_exceptional:
447
/* this is jumped to only, not fallen-through from above */
448
/* save r30 in %CIA and defer to sched */
450
stw 30,OFFSET_ppc32_CIA(16)
454
/* %CIA is up to date here since dispatch_boring dominates */
458
li 3,VG_TRC_INNER_FASTMISS
462
/* %CIA is up to date here since dispatch_boring dominates */
466
li 3,VG_TRC_INNER_COUNTERZERO
542
.size VG_(run_innerloop), .-VG_(run_innerloop)
545
/*------------------------------------------------------------*/
547
/*--- A special dispatcher, for running no-redir ---*/
548
/*--- translations. Just runs the given translation once. ---*/
550
/*------------------------------------------------------------*/
553
void VG_(run_a_noredir_translation) ( UWord* argblock );
556
/* Run a no-redir translation. argblock points to 4 UWords, 2 to carry args
557
and 2 to carry results:
558
0: input: ptr to translation
559
1: input: ptr to guest state
560
2: output: next guest PC
561
3: output: guest state pointer afterwards (== thread return code)
563
.global VG_(run_a_noredir_translation)
564
.type VG_(run_a_noredir_translation), @function
565
VG_(run_a_noredir_translation):
566
/* save callee-save int regs, & lr */
621
.size VG_(run_a_noredir_translation), .-VG_(run_a_noredir_translation)
469
624
/* Let the linker know we don't need an executable stack */
470
625
.section .note.GNU-stack,"",@progbits
472
##--------------------------------------------------------------------##
474
##--------------------------------------------------------------------##
627
/*--------------------------------------------------------------------*/
629
/*--------------------------------------------------------------------*/
added
removed
coregrind/m_dispatch/dispatch-ppc32-linux.S
