Viewing all changes in revision 638.
- Committer: Danil Sokolov
- Date: 2015-08-04 10:52:58 UTC
- Revision ID: danilovesky@gmail.com-20150804105258-zftzirnjnmn3h5t9
Symbol "/" is added to the set of allowed symbols in Verilog module names (specific for Petrify on Windows).
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