|
4316
by aurel32
remove target ifdefs from vl.c |
1 |
#include "hw/hw.h" |
2 |
#include "hw/boards.h" |
|
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
3 |
#include "qemu-timer.h" |
|
4316
by aurel32
remove target ifdefs from vl.c |
4 |
|
|
12880.1.5
by Steve Langasek
* FFe for new upstream version, fixing build failure in oneiric. |
5 |
#include "cpu.h" |
|
4316
by aurel32
remove target ifdefs from vl.c |
6 |
|
7 |
void cpu_save(QEMUFile *f, void *opaque) |
|
8 |
{
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|
|
0.1.16
by Fathi Boudra
Import upstream version 1.1.50-2012.08 |
9 |
CPUSPARCState *env = opaque; |
|
4316
by aurel32
remove target ifdefs from vl.c |
10 |
int i; |
11 |
uint32_t tmp; |
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12 |
||
|
4969
by blueswir1
Handle wrapped registers correctly when saving |
13 |
// if env->cwp == env->nwindows - 1, this will set the ins of the last
|
14 |
// window as the outs of the first window
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|
15 |
cpu_set_cwp(env, env->cwp); |
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16 |
||
|
4316
by aurel32
remove target ifdefs from vl.c |
17 |
for(i = 0; i < 8; i++) |
18 |
qemu_put_betls(f, &env->gregs[i]); |
|
|
4679
by blueswir1
Allow NWINDOWS selection (CPU feature with model specific defaults) |
19 |
qemu_put_be32s(f, &env->nwindows); |
20 |
for(i = 0; i < env->nwindows * 16; i++) |
|
|
4316
by aurel32
remove target ifdefs from vl.c |
21 |
qemu_put_betls(f, &env->regbase[i]); |
22 |
||
23 |
/* FPU */
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|
|
12913
by Steve Langasek, Serge Hallyn
* New upstream release. |
24 |
for (i = 0; i < TARGET_DPREGS; i++) { |
25 |
qemu_put_be32(f, env->fpr[i].l.upper); |
|
26 |
qemu_put_be32(f, env->fpr[i].l.lower); |
|
|
4316
by aurel32
remove target ifdefs from vl.c |
27 |
}
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28 |
||
29 |
qemu_put_betls(f, &env->pc); |
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30 |
qemu_put_betls(f, &env->npc); |
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31 |
qemu_put_betls(f, &env->y); |
|
|
11343
by Blue Swirl
sparc: Fix lazy flag calculation on interrupts, refactor |
32 |
tmp = cpu_get_psr(env); |
|
4316
by aurel32
remove target ifdefs from vl.c |
33 |
qemu_put_be32(f, tmp); |
34 |
qemu_put_betls(f, &env->fsr); |
|
35 |
qemu_put_betls(f, &env->tbr); |
|
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4969
by blueswir1
Handle wrapped registers correctly when saving |
36 |
tmp = env->interrupt_index; |
37 |
qemu_put_be32(f, tmp); |
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38 |
qemu_put_be32s(f, &env->pil_in); |
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|
4316
by aurel32
remove target ifdefs from vl.c |
39 |
#ifndef TARGET_SPARC64
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40 |
qemu_put_be32s(f, &env->wim); |
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41 |
/* MMU */
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|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
42 |
for (i = 0; i < 32; i++) |
|
4316
by aurel32
remove target ifdefs from vl.c |
43 |
qemu_put_be32s(f, &env->mmuregs[i]); |
|
12880.1.5
by Steve Langasek
* FFe for new upstream version, fixing build failure in oneiric. |
44 |
for (i = 0; i < 4; i++) { |
45 |
qemu_put_be64s(f, &env->mxccdata[i]); |
|
46 |
}
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|
47 |
for (i = 0; i < 8; i++) { |
|
48 |
qemu_put_be64s(f, &env->mxccregs[i]); |
|
49 |
}
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50 |
qemu_put_be32s(f, &env->mmubpctrv); |
|
51 |
qemu_put_be32s(f, &env->mmubpctrc); |
|
52 |
qemu_put_be32s(f, &env->mmubpctrs); |
|
53 |
qemu_put_be64s(f, &env->mmubpaction); |
|
54 |
for (i = 0; i < 4; i++) { |
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55 |
qemu_put_be64s(f, &env->mmubpregs[i]); |
|
56 |
}
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|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
57 |
#else
|
58 |
qemu_put_be64s(f, &env->lsu); |
|
59 |
for (i = 0; i < 16; i++) { |
|
60 |
qemu_put_be64s(f, &env->immuregs[i]); |
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61 |
qemu_put_be64s(f, &env->dmmuregs[i]); |
|
62 |
}
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|
63 |
for (i = 0; i < 64; i++) { |
|
|
7987
by Igor Kovalenko
sparc64 name mmu registers and general cleanup |
64 |
qemu_put_be64s(f, &env->itlb[i].tag); |
65 |
qemu_put_be64s(f, &env->itlb[i].tte); |
|
66 |
qemu_put_be64s(f, &env->dtlb[i].tag); |
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67 |
qemu_put_be64s(f, &env->dtlb[i].tte); |
|
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
68 |
}
|
69 |
qemu_put_be32s(f, &env->mmu_version); |
|
|
4931
by blueswir1
Make MAXTL dynamic, bounds check tl when indexing |
70 |
for (i = 0; i < MAXTL_MAX; i++) { |
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
71 |
qemu_put_be64s(f, &env->ts[i].tpc); |
72 |
qemu_put_be64s(f, &env->ts[i].tnpc); |
|
73 |
qemu_put_be64s(f, &env->ts[i].tstate); |
|
74 |
qemu_put_be32s(f, &env->ts[i].tt); |
|
75 |
}
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76 |
qemu_put_be32s(f, &env->xcc); |
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77 |
qemu_put_be32s(f, &env->asi); |
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78 |
qemu_put_be32s(f, &env->pstate); |
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79 |
qemu_put_be32s(f, &env->tl); |
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80 |
qemu_put_be32s(f, &env->cansave); |
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81 |
qemu_put_be32s(f, &env->canrestore); |
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82 |
qemu_put_be32s(f, &env->otherwin); |
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83 |
qemu_put_be32s(f, &env->wstate); |
|
84 |
qemu_put_be32s(f, &env->cleanwin); |
|
85 |
for (i = 0; i < 8; i++) |
|
86 |
qemu_put_be64s(f, &env->agregs[i]); |
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87 |
for (i = 0; i < 8; i++) |
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88 |
qemu_put_be64s(f, &env->bgregs[i]); |
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89 |
for (i = 0; i < 8; i++) |
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90 |
qemu_put_be64s(f, &env->igregs[i]); |
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91 |
for (i = 0; i < 8; i++) |
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92 |
qemu_put_be64s(f, &env->mgregs[i]); |
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93 |
qemu_put_be64s(f, &env->fprs); |
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94 |
qemu_put_be64s(f, &env->tick_cmpr); |
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95 |
qemu_put_be64s(f, &env->stick_cmpr); |
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10383
by Igor V. Kovalenko
sparc64: reimplement tick timers v4 |
96 |
cpu_put_timer(f, env->tick); |
97 |
cpu_put_timer(f, env->stick); |
|
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4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
98 |
qemu_put_be64s(f, &env->gsr); |
99 |
qemu_put_be32s(f, &env->gl); |
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100 |
qemu_put_be64s(f, &env->hpstate); |
|
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4931
by blueswir1
Make MAXTL dynamic, bounds check tl when indexing |
101 |
for (i = 0; i < MAXTL_MAX; i++) |
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
102 |
qemu_put_be64s(f, &env->htstate[i]); |
103 |
qemu_put_be64s(f, &env->hintp); |
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104 |
qemu_put_be64s(f, &env->htba); |
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105 |
qemu_put_be64s(f, &env->hver); |
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106 |
qemu_put_be64s(f, &env->hstick_cmpr); |
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107 |
qemu_put_be64s(f, &env->ssr); |
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10383
by Igor V. Kovalenko
sparc64: reimplement tick timers v4 |
108 |
cpu_put_timer(f, env->hstick); |
|
4316
by aurel32
remove target ifdefs from vl.c |
109 |
#endif
|
110 |
}
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111 |
||
112 |
int cpu_load(QEMUFile *f, void *opaque, int version_id) |
|
113 |
{
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0.1.16
by Fathi Boudra
Import upstream version 1.1.50-2012.08 |
114 |
CPUSPARCState *env = opaque; |
|
4316
by aurel32
remove target ifdefs from vl.c |
115 |
int i; |
116 |
uint32_t tmp; |
|
117 |
||
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10383
by Igor V. Kovalenko
sparc64: reimplement tick timers v4 |
118 |
if (version_id < 6) |
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4679
by blueswir1
Allow NWINDOWS selection (CPU feature with model specific defaults) |
119 |
return -EINVAL; |
|
4316
by aurel32
remove target ifdefs from vl.c |
120 |
for(i = 0; i < 8; i++) |
121 |
qemu_get_betls(f, &env->gregs[i]); |
|
|
4679
by blueswir1
Allow NWINDOWS selection (CPU feature with model specific defaults) |
122 |
qemu_get_be32s(f, &env->nwindows); |
123 |
for(i = 0; i < env->nwindows * 16; i++) |
|
|
4316
by aurel32
remove target ifdefs from vl.c |
124 |
qemu_get_betls(f, &env->regbase[i]); |
125 |
||
126 |
/* FPU */
|
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|
12913
by Steve Langasek, Serge Hallyn
* New upstream release. |
127 |
for (i = 0; i < TARGET_DPREGS; i++) { |
128 |
env->fpr[i].l.upper = qemu_get_be32(f); |
|
129 |
env->fpr[i].l.lower = qemu_get_be32(f); |
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4316
by aurel32
remove target ifdefs from vl.c |
130 |
}
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131 |
||
132 |
qemu_get_betls(f, &env->pc); |
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133 |
qemu_get_betls(f, &env->npc); |
|
134 |
qemu_get_betls(f, &env->y); |
|
135 |
tmp = qemu_get_be32(f); |
|
136 |
env->cwp = 0; /* needed to ensure that the wrapping registers are |
|
137 |
correctly updated */
|
|
|
11343
by Blue Swirl
sparc: Fix lazy flag calculation on interrupts, refactor |
138 |
cpu_put_psr(env, tmp); |
|
4316
by aurel32
remove target ifdefs from vl.c |
139 |
qemu_get_betls(f, &env->fsr); |
140 |
qemu_get_betls(f, &env->tbr); |
|
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4969
by blueswir1
Handle wrapped registers correctly when saving |
141 |
tmp = qemu_get_be32(f); |
142 |
env->interrupt_index = tmp; |
|
143 |
qemu_get_be32s(f, &env->pil_in); |
|
|
4316
by aurel32
remove target ifdefs from vl.c |
144 |
#ifndef TARGET_SPARC64
|
145 |
qemu_get_be32s(f, &env->wim); |
|
146 |
/* MMU */
|
|
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
147 |
for (i = 0; i < 32; i++) |
|
4316
by aurel32
remove target ifdefs from vl.c |
148 |
qemu_get_be32s(f, &env->mmuregs[i]); |
|
12880.1.5
by Steve Langasek
* FFe for new upstream version, fixing build failure in oneiric. |
149 |
for (i = 0; i < 4; i++) { |
150 |
qemu_get_be64s(f, &env->mxccdata[i]); |
|
151 |
}
|
|
152 |
for (i = 0; i < 8; i++) { |
|
153 |
qemu_get_be64s(f, &env->mxccregs[i]); |
|
154 |
}
|
|
155 |
qemu_get_be32s(f, &env->mmubpctrv); |
|
156 |
qemu_get_be32s(f, &env->mmubpctrc); |
|
157 |
qemu_get_be32s(f, &env->mmubpctrs); |
|
158 |
qemu_get_be64s(f, &env->mmubpaction); |
|
159 |
for (i = 0; i < 4; i++) { |
|
160 |
qemu_get_be64s(f, &env->mmubpregs[i]); |
|
161 |
}
|
|
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
162 |
#else
|
163 |
qemu_get_be64s(f, &env->lsu); |
|
164 |
for (i = 0; i < 16; i++) { |
|
165 |
qemu_get_be64s(f, &env->immuregs[i]); |
|
166 |
qemu_get_be64s(f, &env->dmmuregs[i]); |
|
167 |
}
|
|
168 |
for (i = 0; i < 64; i++) { |
|
|
7987
by Igor Kovalenko
sparc64 name mmu registers and general cleanup |
169 |
qemu_get_be64s(f, &env->itlb[i].tag); |
170 |
qemu_get_be64s(f, &env->itlb[i].tte); |
|
171 |
qemu_get_be64s(f, &env->dtlb[i].tag); |
|
172 |
qemu_get_be64s(f, &env->dtlb[i].tte); |
|
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
173 |
}
|
174 |
qemu_get_be32s(f, &env->mmu_version); |
|
|
4931
by blueswir1
Make MAXTL dynamic, bounds check tl when indexing |
175 |
for (i = 0; i < MAXTL_MAX; i++) { |
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
176 |
qemu_get_be64s(f, &env->ts[i].tpc); |
177 |
qemu_get_be64s(f, &env->ts[i].tnpc); |
|
178 |
qemu_get_be64s(f, &env->ts[i].tstate); |
|
179 |
qemu_get_be32s(f, &env->ts[i].tt); |
|
180 |
}
|
|
181 |
qemu_get_be32s(f, &env->xcc); |
|
182 |
qemu_get_be32s(f, &env->asi); |
|
183 |
qemu_get_be32s(f, &env->pstate); |
|
184 |
qemu_get_be32s(f, &env->tl); |
|
185 |
qemu_get_be32s(f, &env->cansave); |
|
186 |
qemu_get_be32s(f, &env->canrestore); |
|
187 |
qemu_get_be32s(f, &env->otherwin); |
|
188 |
qemu_get_be32s(f, &env->wstate); |
|
189 |
qemu_get_be32s(f, &env->cleanwin); |
|
190 |
for (i = 0; i < 8; i++) |
|
191 |
qemu_get_be64s(f, &env->agregs[i]); |
|
192 |
for (i = 0; i < 8; i++) |
|
193 |
qemu_get_be64s(f, &env->bgregs[i]); |
|
194 |
for (i = 0; i < 8; i++) |
|
195 |
qemu_get_be64s(f, &env->igregs[i]); |
|
196 |
for (i = 0; i < 8; i++) |
|
197 |
qemu_get_be64s(f, &env->mgregs[i]); |
|
198 |
qemu_get_be64s(f, &env->fprs); |
|
199 |
qemu_get_be64s(f, &env->tick_cmpr); |
|
200 |
qemu_get_be64s(f, &env->stick_cmpr); |
|
|
10383
by Igor V. Kovalenko
sparc64: reimplement tick timers v4 |
201 |
cpu_get_timer(f, env->tick); |
202 |
cpu_get_timer(f, env->stick); |
|
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
203 |
qemu_get_be64s(f, &env->gsr); |
204 |
qemu_get_be32s(f, &env->gl); |
|
205 |
qemu_get_be64s(f, &env->hpstate); |
|
|
4931
by blueswir1
Make MAXTL dynamic, bounds check tl when indexing |
206 |
for (i = 0; i < MAXTL_MAX; i++) |
|
4927
by blueswir1
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load |
207 |
qemu_get_be64s(f, &env->htstate[i]); |
208 |
qemu_get_be64s(f, &env->hintp); |
|
209 |
qemu_get_be64s(f, &env->htba); |
|
210 |
qemu_get_be64s(f, &env->hver); |
|
211 |
qemu_get_be64s(f, &env->hstick_cmpr); |
|
212 |
qemu_get_be64s(f, &env->ssr); |
|
|
10383
by Igor V. Kovalenko
sparc64: reimplement tick timers v4 |
213 |
cpu_get_timer(f, env->hstick); |
|
4316
by aurel32
remove target ifdefs from vl.c |
214 |
#endif
|
215 |
tlb_flush(env, 1); |
|
216 |
return 0; |
|
217 |
}
|