2
BLF-VLD.elf: file format elf32-avr
5
Idx Name Size VMA LMA File off Algn
6
0 .text 000003e2 00000000 00000000 000000b4 2**1
7
CONTENTS, ALLOC, LOAD, READONLY, CODE
8
1 .data 0000000a 00800060 000003e2 00000496 2**0
9
CONTENTS, ALLOC, LOAD, DATA
10
2 .bss 00000010 0080006a 0080006a 000004a0 2**0
12
3 .eeprom 00000040 00810000 00810000 000004a0 2**0
13
CONTENTS, ALLOC, LOAD, READONLY, DATA
14
4 .stab 00001530 00000000 00000000 000004e0 2**2
15
CONTENTS, READONLY, DEBUGGING
16
5 .stabstr 00000cdc 00000000 00000000 00001a10 2**0
17
CONTENTS, READONLY, DEBUGGING
19
Disassembly of section .text:
22
0: 09 c0 rjmp .+18 ; 0x14 <__ctors_end>
23
2: 21 c0 rjmp .+66 ; 0x46 <__bad_interrupt>
24
4: 20 c0 rjmp .+64 ; 0x46 <__bad_interrupt>
25
6: 1f c0 rjmp .+62 ; 0x46 <__bad_interrupt>
26
8: 1e c0 rjmp .+60 ; 0x46 <__bad_interrupt>
27
a: 1d c0 rjmp .+58 ; 0x46 <__bad_interrupt>
28
c: 1c c0 rjmp .+56 ; 0x46 <__bad_interrupt>
29
e: 1b c0 rjmp .+54 ; 0x46 <__bad_interrupt>
30
10: 57 c1 rjmp .+686 ; 0x2c0 <__vector_8>
31
12: 19 c0 rjmp .+50 ; 0x46 <__bad_interrupt>
33
00000014 <__ctors_end>:
35
16: 1f be out 0x3f, r1 ; 63
36
18: cf e9 ldi r28, 0x9F ; 159
37
1a: cd bf out 0x3d, r28 ; 61
39
0000001c <__do_copy_data>:
40
1c: 10 e0 ldi r17, 0x00 ; 0
41
1e: a0 e6 ldi r26, 0x60 ; 96
42
20: b0 e0 ldi r27, 0x00 ; 0
43
22: e2 ee ldi r30, 0xE2 ; 226
44
24: f3 e0 ldi r31, 0x03 ; 3
45
26: 02 c0 rjmp .+4 ; 0x2c <.do_copy_data_start>
47
00000028 <.do_copy_data_loop>:
51
0000002c <.do_copy_data_start>:
52
2c: aa 36 cpi r26, 0x6A ; 106
53
2e: b1 07 cpc r27, r17
54
30: d9 f7 brne .-10 ; 0x28 <.do_copy_data_loop>
56
00000032 <__do_clear_bss>:
57
32: 10 e0 ldi r17, 0x00 ; 0
58
34: aa e6 ldi r26, 0x6A ; 106
59
36: b0 e0 ldi r27, 0x00 ; 0
60
38: 01 c0 rjmp .+2 ; 0x3c <.do_clear_bss_start>
62
0000003a <.do_clear_bss_loop>:
65
0000003c <.do_clear_bss_start>:
66
3c: aa 37 cpi r26, 0x7A ; 122
67
3e: b1 07 cpc r27, r17
68
40: e1 f7 brne .-8 ; 0x3a <.do_clear_bss_loop>
69
42: 58 d0 rcall .+176 ; 0xf4 <main>
70
44: cc c1 rjmp .+920 ; 0x3de <_exit>
72
00000046 <__bad_interrupt>:
73
46: dc cf rjmp .-72 ; 0x0 <__vectors>
75
00000048 <clock_prescale_set>:
78
void clock_prescale_set(clock_div_t __x)
80
uint8_t __tmp = _BV(CLKPCE);
81
__asm__ __volatile__ (
82
48: 90 e8 ldi r25, 0x80 ; 128
83
4a: 0f b6 in r0, 0x3f ; 63
85
4e: 96 bd out 0x26, r25 ; 38
86
50: 86 bd out 0x26, r24 ; 38
87
52: 0f be out 0x3f, r0 ; 63
90
"I" (_SFR_IO_ADDR(CLKPR)),
99
void nullmode(uint8_t offset)
106
* With this parameters quite a lot of modes can be realised. Permanent
107
* strobing (no pause), police style (strobe group of 1s length, then 1s pause),
108
* and beacons (single strobe in group, long pause)
110
void strobe(uint8_t offset)
118
uint8_t pulse, pulse_off, count, pause, i, pwm;
120
pulse = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 1);
121
64: 08 2f mov r16, r24
122
66: 10 e0 ldi r17, 0x00 ; 0
123
68: c8 01 movw r24, r16
124
6a: 41 96 adiw r24, 0x11 ; 17
125
6c: 9a d1 rcall .+820 ; 0x3a2 <__eerd_byte_tn13>
126
6e: f8 2e mov r15, r24
127
count = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 2);
128
70: c8 01 movw r24, r16
129
72: 42 96 adiw r24, 0x12 ; 18
130
74: 96 d1 rcall .+812 ; 0x3a2 <__eerd_byte_tn13>
131
76: e8 2e mov r14, r24
132
pause = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 3);
133
78: c8 01 movw r24, r16
134
7a: 43 96 adiw r24, 0x13 ; 19
135
7c: 92 d1 rcall .+804 ; 0x3a2 <__eerd_byte_tn13>
137
pulse_off = (uint8_t) pulse << (uint8_t) 2; // pause between pulses,
138
7e: 20 e0 ldi r18, 0x00 ; 0
143
for(i = 0; i < count; ++i){
145
80: cc 24 eor r12, r12
148
84: 0f 2d mov r16, r15
149
86: dd 24 eor r13, r13
150
milliseconds can be achieved.
153
_delay_loop_2(uint16_t __count)
156
88: 60 eb ldi r22, 0xB0 ; 176
157
8a: 74 e0 ldi r23, 0x04 ; 4
159
pulse = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 1);
160
count = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 2);
161
pause = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 3);
163
pulse_off = (uint8_t) pulse << (uint8_t) 2; // pause between pulses,
164
8c: ff 0c add r15, r15
165
8e: ff 0c add r15, r15
167
for(i = 0; i < count; ++i){
172
90: 10 e0 ldi r17, 0x00 ; 0
175
// pause between groups
177
92: 48 2f mov r20, r24
178
94: 50 e0 ldi r21, 0x00 ; 0
179
96: a8 e7 ldi r26, 0x78 ; 120
180
98: b0 e0 ldi r27, 0x00 ; 0
181
9a: 15 c0 rjmp .+42 ; 0xc6 <__stack+0x27>
186
for(i = 0; i < count; ++i){
188
9c: c9 bc out 0x29, r12 ; 41
190
9e: 80 2f mov r24, r16
191
a0: 9d 2d mov r25, r13
192
a2: 04 c0 rjmp .+8 ; 0xac <__stack+0xd>
193
a4: fb 01 movw r30, r22
194
a6: 31 97 sbiw r30, 0x01 ; 1
195
a8: f1 f7 brne .-4 ; 0xa6 <__stack+0x7>
197
static void inline sleep_ms(uint16_t ms)
202
aa: 01 97 sbiw r24, 0x01 ; 1
203
* whole floating point handling code and increase flash image size by about
206
static void inline sleep_ms(uint16_t ms)
209
ac: 00 97 sbiw r24, 0x00 ; 0
210
ae: d1 f7 brne .-12 ; 0xa4 <__stack+0x5>
213
for(i = 0; i < count; ++i){
217
b0: 19 bc out 0x29, r1 ; 41
219
b2: 8f 2d mov r24, r15
220
b4: 91 2f mov r25, r17
221
b6: 04 c0 rjmp .+8 ; 0xc0 <__stack+0x21>
222
b8: fb 01 movw r30, r22
223
ba: 31 97 sbiw r30, 0x01 ; 1
224
bc: f1 f7 brne .-4 ; 0xba <__stack+0x1b>
226
static void inline sleep_ms(uint16_t ms)
231
be: 01 97 sbiw r24, 0x01 ; 1
232
* whole floating point handling code and increase flash image size by about
235
static void inline sleep_ms(uint16_t ms)
238
c0: 00 97 sbiw r24, 0x00 ; 0
239
c2: d1 f7 brne .-12 ; 0xb8 <__stack+0x19>
240
pulse_off = (uint8_t) pulse << (uint8_t) 2; // pause between pulses,
245
for(i = 0; i < count; ++i){
246
c4: 2f 5f subi r18, 0xFF ; 255
247
c6: 2e 15 cp r18, r14
248
c8: 48 f3 brcs .-46 ; 0x9c <strobe+0x44>
253
// pause between groups
255
ca: 9a 01 movw r18, r20
256
cc: 09 c0 rjmp .+18 ; 0xe0 <__stack+0x41>
257
ce: 80 e1 ldi r24, 0x10 ; 16
258
d0: 97 e2 ldi r25, 0x27 ; 39
259
d2: fd 01 movw r30, r26
260
d4: 31 97 sbiw r30, 0x01 ; 1
261
d6: f1 f7 brne .-4 ; 0xd4 <__stack+0x35>
262
__ticks = (uint16_t) (__ms * 10.0);
266
_delay_loop_2(((F_CPU) / 4e3) / 10);
268
d8: 01 97 sbiw r24, 0x01 ; 1
270
else if (__tmp > 65535)
272
// __ticks = requested delay in 1/10 ms
273
__ticks = (uint16_t) (__ms * 10.0);
275
da: d9 f7 brne .-10 ; 0xd2 <__stack+0x33>
277
static void inline sleep_sec(uint16_t sec)
282
dc: 21 50 subi r18, 0x01 ; 1
283
de: 30 40 sbci r19, 0x00 ; 0
285
* Delay for sec seconds
287
static void inline sleep_sec(uint16_t sec)
291
e2: 31 05 cpc r19, r1
292
e4: a1 f7 brne .-24 ; 0xce <__stack+0x2f>
293
e6: 20 e0 ldi r18, 0x00 ; 0
294
e8: ee cf rjmp .-36 ; 0xc6 <__stack+0x27>
296
000000ea <const_level>:
297
* Set PWM to the level stored in the mode's first variable.
299
void const_level(const uint8_t offset)
302
PWM_LVL = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset + 1);
303
ea: 90 e0 ldi r25, 0x00 ; 0
304
ec: 41 96 adiw r24, 0x11 ; 17
305
ee: 59 d1 rcall .+690 ; 0x3a2 <__eerd_byte_tn13>
306
f0: 89 bd out 0x29, r24 ; 41
307
f2: ff cf rjmp .-2 ; 0xf2 <const_level+0x8>
319
#ifdef EXTENDED_MODES
323
// read the state data at the start of the eeprom into a struct
324
eeprom_read_block(&state, 0, sizeof(State_t));
325
fa: 8a e6 ldi r24, 0x6A ; 106
326
fc: 90 e0 ldi r25, 0x00 ; 0
327
fe: 60 e0 ldi r22, 0x00 ; 0
328
100: 70 e0 ldi r23, 0x00 ; 0
329
102: 4e e0 ldi r20, 0x0E ; 14
330
104: 50 e0 ldi r21, 0x00 ; 0
331
106: 3e d1 rcall .+636 ; 0x384 <__eerd_block_tn13>
333
uint8_t last_click, next_cell;
335
// make sure we cycle through the memory cells in the last_click array
336
// to spread the wear on the eeprom a bit
337
last_click = state.last_click[state.click_cell];
338
108: 80 91 71 00 lds r24, 0x0071
339
10c: e8 2f mov r30, r24
340
10e: f0 e0 ldi r31, 0x00 ; 0
341
110: e6 59 subi r30, 0x96 ; 150
342
112: ff 4f sbci r31, 0xFF ; 255
343
114: 00 85 ldd r16, Z+8 ; 0x08
345
// initialise click type for next start up
346
next_cell = state.click_cell;
348
116: 8f 5f subi r24, 0xFF ; 255
349
if(next_cell >= CLICK_CELLS)
350
118: 83 30 cpi r24, 0x03 ; 3
351
11a: 08 f0 brcs .+2 ; 0x11e <main+0x2a>
352
11c: 80 e0 ldi r24, 0x00 ; 0
355
state.last_click[next_cell] = tap_short;
356
11e: e8 2f mov r30, r24
357
120: f0 e0 ldi r31, 0x00 ; 0
358
122: e6 59 subi r30, 0x96 ; 150
359
124: ff 4f sbci r31, 0xFF ; 255
360
126: 91 e0 ldi r25, 0x01 ; 1
361
128: 90 87 std Z+8, r25 ; 0x08
362
state.click_cell = next_cell;
363
12a: 80 93 71 00 sts 0x0071, r24
364
last_click = get_last_click();
366
#ifdef EXTENDED_MODES
367
// if we are in standard mode and got NUM_EXT_CLICKS in a row, change to
369
if(!state.extended && state.clicks >= NUM_EXT_CLICKS){
370
12e: 80 91 6e 00 lds r24, 0x006E
371
132: 88 23 and r24, r24
372
134: 81 f4 brne .+32 ; 0x156 <main+0x62>
373
136: 80 91 70 00 lds r24, 0x0070
374
13a: 86 30 cpi r24, 0x06 ; 6
375
13c: 60 f0 brcs .+24 ; 0x156 <main+0x62>
377
13e: 90 93 6e 00 sts 0x006E, r25
378
state.ext_mode = EMPTY_MODE;
379
142: 8f ef ldi r24, 0xFF ; 255
380
144: 80 93 6f 00 sts 0x006F, r24
381
state.prog_stage = prog_undef;
382
148: 10 92 6d 00 sts 0x006D, r1
384
14c: 10 92 70 00 sts 0x0070, r1
385
150: ff 24 eor r15, r15
387
154: 01 c0 rjmp .+2 ; 0x158 <main+0x64>
388
156: ff 24 eor r15, r15
389
// delay signal until state is saved in eeprom
393
// handling of extended mode
395
158: 80 91 6e 00 lds r24, 0x006E
396
15c: 88 23 and r24, r24
397
15e: 11 f4 brne .+4 ; 0x164 <main+0x70>
398
160: 10 e0 ldi r17, 0x00 ; 0
399
162: 1a c0 rjmp .+52 ; 0x198 <main+0xa4>
401
// in extended mode, we can cycle through modes indefinitely until
402
// one mode is held for more than two seconds
403
if(last_click != tap_none){
404
164: 00 23 and r16, r16
405
166: 61 f0 breq .+24 ; 0x180 <main+0x8c>
407
168: 80 91 6f 00 lds r24, 0x006F
408
16c: 8f 5f subi r24, 0xFF ; 255
409
16e: 80 93 6f 00 sts 0x006F, r24
411
if(state.ext_mode >= NUM_EXT_MODES)
412
172: 8c 30 cpi r24, 0x0C ; 12
413
174: 10 f0 brcs .+4 ; 0x17a <main+0x86>
415
176: 10 92 6f 00 sts 0x006F, r1
417
mode_idx = state.ext_mode;
418
17a: 10 91 6f 00 lds r17, 0x006F
419
17e: 0c c0 rjmp .+24 ; 0x198 <main+0xa4>
421
// leave extended mode if previous mode was on longer than 2 seconds
423
180: 10 92 6e 00 sts 0x006E, r1
424
signal = 1; // wait with signal until eeprom is written
427
// remember last mode and init programming
428
state.chosen_mode = state.ext_mode;
429
184: 80 91 6f 00 lds r24, 0x006F
430
188: 80 93 6c 00 sts 0x006C, r24
431
state.prog_stage = prog_init;
432
18c: 81 e0 ldi r24, 0x01 ; 1
433
18e: 80 93 6d 00 sts 0x006D, r24
434
192: 10 e0 ldi r17, 0x00 ; 0
435
194: ff 24 eor r15, r15
442
if(state.prog_stage >= prog_init){
443
198: 80 91 6d 00 lds r24, 0x006D
444
19c: 88 23 and r24, r24
445
19e: 81 f1 breq .+96 ; 0x200 <main+0x10c>
447
* mode programming. We have the mode slot to be programmed saved in
448
* state.target_mode, the mode to store in state.chosen_mode. User needs
449
* to acknowledge by following a tapping pattern of short-short-long-short.
451
switch(state.prog_stage){
452
1a0: 84 30 cpi r24, 0x04 ; 4
453
1a2: 28 f4 brcc .+10 ; 0x1ae <main+0xba>
454
1a4: 82 30 cpi r24, 0x02 ; 2
455
1a6: 50 f4 brcc .+20 ; 0x1bc <main+0xc8>
456
1a8: 81 30 cpi r24, 0x01 ; 1
457
1aa: 09 f5 brne .+66 ; 0x1ee <main+0xfa>
458
1ac: 05 c0 rjmp .+10 ; 0x1b8 <main+0xc4>
459
1ae: 84 30 cpi r24, 0x04 ; 4
460
1b0: 59 f0 breq .+22 ; 0x1c8 <main+0xd4>
461
1b2: 85 30 cpi r24, 0x05 ; 5
462
1b4: e1 f4 brne .+56 ; 0x1ee <main+0xfa>
463
1b6: 0e c0 rjmp .+28 ; 0x1d4 <main+0xe0>
465
state.prog_stage = prog_1;
466
1b8: 82 e0 ldi r24, 0x02 ; 2
467
1ba: 03 c0 rjmp .+6 ; 0x1c2 <main+0xce>
471
if(last_click == tap_short)
472
1bc: 01 30 cpi r16, 0x01 ; 1
473
1be: 41 f4 brne .+16 ; 0x1d0 <main+0xdc>
475
1c0: 8f 5f subi r24, 0xFF ; 255
476
1c2: 80 93 6d 00 sts 0x006D, r24
477
1c6: 1a c0 rjmp .+52 ; 0x1fc <main+0x108>
479
state.prog_stage = prog_nak;
482
if(last_click == tap_long)
483
1c8: 02 30 cpi r16, 0x02 ; 2
484
1ca: 11 f4 brne .+4 ; 0x1d0 <main+0xdc>
486
1cc: 85 e0 ldi r24, 0x05 ; 5
487
1ce: f9 cf rjmp .-14 ; 0x1c2 <main+0xce>
489
state.prog_stage = prog_nak;
490
1d0: 86 e0 ldi r24, 0x06 ; 6
491
1d2: f7 cf rjmp .-18 ; 0x1c2 <main+0xce>
494
if(last_click == tap_short){
495
1d4: 01 30 cpi r16, 0x01 ; 1
496
1d6: 59 f4 brne .+22 ; 0x1ee <main+0xfa>
497
// sequence completed, update mode_arr and eeprom
498
state.mode_arr[state.target_mode] = state.chosen_mode;
499
1d8: 80 91 6b 00 lds r24, 0x006B
500
1dc: 60 91 6c 00 lds r22, 0x006C
501
1e0: 90 e0 ldi r25, 0x00 ; 0
502
1e2: fc 01 movw r30, r24
503
1e4: e6 59 subi r30, 0x96 ; 150
504
1e6: ff 4f sbci r31, 0xFF ; 255
505
1e8: 63 87 std Z+11, r22 ; 0x0b
506
eeprom_write_byte((uint8_t *)EE_MODES_BASE + state.target_mode,
507
1ea: 0b 96 adiw r24, 0x0b ; 11
508
1ec: ea d0 rcall .+468 ; 0x3c2 <__eewr_byte_tn13>
513
// clean up when leaving programming mode
514
state.prog_stage = prog_undef;
515
1ee: 10 92 6d 00 sts 0x006D, r1
516
state.target_mode = EMPTY_MODE;
517
1f2: 8f ef ldi r24, 0xFF ; 255
518
1f4: 80 93 6b 00 sts 0x006B, r24
519
state.chosen_mode = EMPTY_MODE;
520
1f8: 80 93 6c 00 sts 0x006C, r24
525
1fc: 10 92 70 00 sts 0x0070, r1
526
state.extended = 0; // make sure we don't get stuck in extended modes
527
// if the EEPROM gets corrupted. (found by sixty545)
528
#endif // EXTENDED_MODES
530
// standard mode operation
532
200: 80 91 6e 00 lds r24, 0x006E
533
204: 88 23 and r24, r24
534
206: 11 f5 brne .+68 ; 0x24c <main+0x158>
535
if(last_click != tap_none){
536
208: 00 23 and r16, r16
537
20a: 49 f0 breq .+18 ; 0x21e <main+0x12a>
538
// we're coming back from a tap, increment mode
540
20c: 80 91 6a 00 lds r24, 0x006A
541
210: 8f 5f subi r24, 0xFF ; 255
542
212: 80 93 6a 00 sts 0x006A, r24
544
#ifdef EXTENDED_MODES
545
// ...and count consecutive clicks
547
216: 80 91 70 00 lds r24, 0x0070
548
21a: 8f 5f subi r24, 0xFF ; 255
549
21c: 09 c0 rjmp .+18 ; 0x230 <main+0x13c>
551
// start up from regular previous use (longer than 2 seconds)
552
#ifdef EXTENDED_MODES
554
// remember current mode slot in case it is to be programmed
555
if(state.prog_stage == prog_undef)
556
21e: 80 91 6d 00 lds r24, 0x006D
557
222: 88 23 and r24, r24
558
224: 21 f4 brne .+8 ; 0x22e <main+0x13a>
559
state.target_mode = state.mode;
560
226: 80 91 6a 00 lds r24, 0x006A
561
22a: 80 93 6b 00 sts 0x006B, r24
563
// reset click counter
565
22e: 81 e0 ldi r24, 0x01 ; 1
566
230: 80 93 70 00 sts 0x0070, r24
572
if(state.mode >= NUM_MODES)
573
234: 80 91 6a 00 lds r24, 0x006A
574
238: 83 30 cpi r24, 0x03 ; 3
575
23a: 10 f0 brcs .+4 ; 0x240 <main+0x14c>
577
23c: 10 92 6a 00 sts 0x006A, r1
579
// get index of mode stored in the current slot
580
mode_idx = state.mode_arr[state.mode];
581
240: e0 91 6a 00 lds r30, 0x006A
582
244: f0 e0 ldi r31, 0x00 ; 0
583
246: e6 59 subi r30, 0x96 ; 150
584
248: ff 4f sbci r31, 0xFF ; 255
585
24a: 13 85 ldd r17, Z+11 ; 0x0b
588
// write back state to eeprom but omit the mode configuration.
589
// Minimises risk of corruption. Everything else will right itself
590
// eventually, but modes will stay broken until reprogrammed.
591
eeprom_write_block(&state, 0, sizeof(State_t) - sizeof(state.mode_arr));
592
24c: 8a e6 ldi r24, 0x6A ; 106
593
24e: 90 e0 ldi r25, 0x00 ; 0
594
250: 60 e0 ldi r22, 0x00 ; 0
595
252: 70 e0 ldi r23, 0x00 ; 0
596
254: 4b e0 ldi r20, 0x0B ; 11
597
256: 50 e0 ldi r21, 0x00 ; 0
598
258: ac d0 rcall .+344 ; 0x3b2 <__eewr_block_tn13>
601
// set PWM pin to output
602
DDRB |= _BV(PWM_PIN);
603
25a: b9 9a sbi 0x17, 1 ; 23
604
// PORTB = 0x00; // initialised to 0 anyway
606
// Initialise PWM on output pin and set level to zero
608
25c: 81 e2 ldi r24, 0x21 ; 33
609
25e: 8f bd out 0x2f, r24 ; 47
611
260: 81 e0 ldi r24, 0x01 ; 1
612
262: 83 bf out 0x33, r24 ; 51
613
// PWM_LVL = 0; // initialised to 0 anyway
616
#ifdef EXTENDED_MODES
617
//give a short blink to indicate entering or leaving extended mode
619
264: ff 20 and r15, r15
620
266: 81 f0 breq .+32 ; 0x288 <main+0x194>
621
268: 80 e6 ldi r24, 0x60 ; 96
622
26a: 9a ee ldi r25, 0xEA ; 234
623
26c: fc 01 movw r30, r24
624
26e: 31 97 sbiw r30, 0x01 ; 1
625
270: f1 f7 brne .-4 ; 0x26e <main+0x17a>
630
for(uint8_t i = 0; i < 2; ++i){
632
272: 29 b5 in r18, 0x29 ; 41
634
276: 29 bd out 0x29, r18 ; 41
635
278: fc 01 movw r30, r24
636
27a: 31 97 sbiw r30, 0x01 ; 1
637
27c: f1 f7 brne .-4 ; 0x27a <main+0x186>
638
27e: 29 b5 in r18, 0x29 ; 41
640
282: 29 bd out 0x29, r18 ; 41
641
284: 01 97 sbiw r24, 0x01 ; 1
642
286: f1 f7 brne .-4 ; 0x284 <main+0x190>
647
// sanity check in case of corrupted eeprom
648
if(mode_idx >= NUM_EXT_MODES)
649
288: 1c 30 cpi r17, 0x0C ; 12
650
28a: 08 f0 brcs .+2 ; 0x28e <main+0x19a>
651
28c: 10 e0 ldi r17, 0x00 ; 0
654
// fetch pointer to selected mode func from array
655
offset = mode_idx << 2;
656
28e: 11 0f add r17, r17
657
290: 11 0f add r17, r17
658
func_idx = eeprom_read_byte((uint8_t *) EE_MODEDATA_BASE + offset);
659
292: 81 2f mov r24, r17
660
294: 90 e0 ldi r25, 0x00 ; 0
661
296: 40 96 adiw r24, 0x10 ; 16
662
298: 84 d0 rcall .+264 ; 0x3a2 <__eerd_byte_tn13>
663
29a: e8 2f mov r30, r24
665
wdt_mode = ((uint8_t) _BV(WDTIE)
666
| (uint8_t) (WDTO_250MS & (uint8_t) 0x07)
667
| (uint8_t) ((WDTO_250MS & (uint8_t) 0x08) << 2));
675
WDTCR = ((uint8_t) _BV(WDCE) | (uint8_t) _BV(WDE));
676
2a0: 88 e1 ldi r24, 0x18 ; 24
677
2a2: 81 bd out 0x21, r24 ; 33
679
// set new mode and prescaler
681
2a4: 84 e4 ldi r24, 0x44 ; 68
682
2a6: 81 bd out 0x21, r24 ; 33
687
// start watchdog timer
691
(*mode_func_arr[func_idx])(offset);
692
2aa: f0 e0 ldi r31, 0x00 ; 0
693
2ac: ee 0f add r30, r30
694
2ae: ff 1f adc r31, r31
695
2b0: e0 5a subi r30, 0xA0 ; 160
696
2b2: ff 4f sbci r31, 0xFF ; 255
699
2b8: e0 2d mov r30, r0
700
2ba: 81 2f mov r24, r17
702
2be: ff cf rjmp .-2 ; 0x2be <main+0x1ca>
704
000002c0 <__vector_8>:
705
* way. Strobe functions may be affected, but I guess nobody will notice if
706
* a pulse gets delayed by a millisecond or two.
713
2c4: 0f b6 in r0, 0x3f ; 63
715
2c8: 11 24 eor r1, r1
729
static uint8_t lbat_cnt = 0;
733
2e2: 20 91 78 00 lds r18, 0x0078
734
2e6: 28 30 cpi r18, 0x08 ; 8
735
2e8: 08 f0 brcs .+2 ; 0x2ec <__vector_8+0x2c>
736
2ea: 3b c0 rjmp .+118 ; 0x362 <__vector_8+0xa2>
740
click_cell = (uint8_t *) EE_LAST_CLICK + state.click_cell;
741
2ec: 80 91 71 00 lds r24, 0x0071
742
2f0: 90 e0 ldi r25, 0x00 ; 0
743
2f2: 08 96 adiw r24, 0x08 ; 8
747
2f4: 2f 5f subi r18, 0xFF ; 255
748
2f6: 20 93 78 00 sts 0x0078, r18
751
2fa: 24 30 cpi r18, 0x04 ; 4
752
2fc: 41 f0 breq .+16 ; 0x30e <__vector_8+0x4e>
753
2fe: 28 30 cpi r18, 0x08 ; 8
754
300: 19 f0 breq .+6 ; 0x308 <__vector_8+0x48>
755
302: 21 30 cpi r18, 0x01 ; 1
756
304: 71 f5 brne .+92 ; 0x362 <__vector_8+0xa2>
757
306: 16 c0 rjmp .+44 ; 0x334 <__vector_8+0x74>
758
// abort mode programming if light stays on for more than two seconds
759
if(state.prog_stage != prog_undef)
760
eeprom_write_byte((uint8_t *) EE_PROGSTAGE, prog_undef);
762
// two seconds elapsed, reset click type to tap_none
763
eeprom_write_byte(click_cell, tap_none);
764
308: 60 e0 ldi r22, 0x00 ; 0
765
30a: 5b d0 rcall .+182 ; 0x3c2 <__eewr_byte_tn13>
766
30c: 2a c0 rjmp .+84 ; 0x362 <__vector_8+0xa2>
770
#if defined(PROGRAMMABLE) && !defined(PINSWITCH)
772
eeprom_write_byte(click_cell, tap_long);
773
30e: 62 e0 ldi r22, 0x02 ; 2
774
310: 58 d0 rcall .+176 ; 0x3c2 <__eewr_byte_tn13>
775
/* give hints on when to switch off in programming mode. Programming
776
* stages 1,2 and 4 expect a short tap (0s - 1s), so we signal at
777
* 250ms. Stage 3 expects a long tap (1s - 2s), so we signal at
778
* 1s. Signalling is done by toggling the PWM-level's MSB for 100ms.
780
if(state.prog_stage == prog_3){
781
312: 80 91 6d 00 lds r24, 0x006D
782
316: 84 30 cpi r24, 0x04 ; 4
783
318: 21 f5 brne .+72 ; 0x362 <__vector_8+0xa2>
784
PWM_LVL ^= (uint8_t) 0x80;
785
31a: 89 b5 in r24, 0x29 ; 41
786
31c: 80 58 subi r24, 0x80 ; 128
787
31e: 89 bd out 0x29, r24 ; 41
788
320: 88 ee ldi r24, 0xE8 ; 232
789
322: 93 e0 ldi r25, 0x03 ; 3
790
324: 28 e7 ldi r18, 0x78 ; 120
791
326: 30 e0 ldi r19, 0x00 ; 0
792
328: f9 01 movw r30, r18
793
32a: 31 97 sbiw r30, 0x01 ; 1
794
32c: f1 f7 brne .-4 ; 0x32a <__vector_8+0x6a>
797
_delay_loop_2(((F_CPU) / 4e3) / 10);
799
32e: 01 97 sbiw r24, 0x01 ; 1
801
else if (__tmp > 65535)
803
// __ticks = requested delay in 1/10 ms
804
__ticks = (uint16_t) (__ms * 10.0);
806
330: d9 f7 brne .-10 ; 0x328 <__vector_8+0x68>
807
332: 14 c0 rjmp .+40 ; 0x35c <__vector_8+0x9c>
809
PWM_LVL ^= (uint8_t) 0x80;
813
if(state.prog_stage == prog_1
814
334: 90 91 6d 00 lds r25, 0x006D
815
338: 89 2f mov r24, r25
816
33a: 82 50 subi r24, 0x02 ; 2
817
33c: 82 30 cpi r24, 0x02 ; 2
818
33e: 10 f0 brcs .+4 ; 0x344 <__vector_8+0x84>
819
340: 95 30 cpi r25, 0x05 ; 5
820
342: 79 f4 brne .+30 ; 0x362 <__vector_8+0xa2>
821
|| state.prog_stage == prog_2
822
|| state.prog_stage == prog_4)
824
PWM_LVL ^= (uint8_t) 0x80;
825
344: 89 b5 in r24, 0x29 ; 41
826
346: 80 58 subi r24, 0x80 ; 128
827
348: 89 bd out 0x29, r24 ; 41
828
34a: 88 ee ldi r24, 0xE8 ; 232
829
34c: 93 e0 ldi r25, 0x03 ; 3
830
34e: 28 e7 ldi r18, 0x78 ; 120
831
350: 30 e0 ldi r19, 0x00 ; 0
832
352: f9 01 movw r30, r18
833
354: 31 97 sbiw r30, 0x01 ; 1
834
356: f1 f7 brne .-4 ; 0x354 <__vector_8+0x94>
837
_delay_loop_2(((F_CPU) / 4e3) / 10);
839
358: 01 97 sbiw r24, 0x01 ; 1
841
else if (__tmp > 65535)
843
// __ticks = requested delay in 1/10 ms
844
__ticks = (uint16_t) (__ms * 10.0);
846
35a: d9 f7 brne .-10 ; 0x352 <__vector_8+0x92>
848
PWM_LVL ^= (uint8_t) 0x80;
849
35c: 89 b5 in r24, 0x29 ; 41
850
35e: 80 58 subi r24, 0x80 ; 128
851
360: 89 bd out 0x29, r24 ; 41
871
37c: 0f be out 0x3f, r0 ; 63
876
00000384 <__eerd_block_tn13>:
877
384: a8 2f mov r26, r24
878
386: 86 2f mov r24, r22
880
00000388 <__eerd_blraw_tn13>:
881
388: e8 2f mov r30, r24
882
38a: e1 99 sbic 0x1c, 1 ; 28
883
38c: fe cf rjmp .-4 ; 0x38a <__eerd_blraw_tn13+0x2>
884
38e: 1f ba out 0x1f, r1 ; 31
885
390: 05 c0 rjmp .+10 ; 0x39c <__eerd_blraw_tn13+0x14>
886
392: ee bb out 0x1e, r30 ; 30
887
394: e0 9a sbi 0x1c, 0 ; 28
889
398: 0d b2 in r0, 0x1d ; 29
891
39c: 41 50 subi r20, 0x01 ; 1
892
39e: c8 f7 brcc .-14 ; 0x392 <__eerd_blraw_tn13+0xa>
895
000003a2 <__eerd_byte_tn13>:
896
3a2: e1 99 sbic 0x1c, 1 ; 28
897
3a4: fe cf rjmp .-4 ; 0x3a2 <__eerd_byte_tn13>
898
3a6: 1f ba out 0x1f, r1 ; 31
899
3a8: 8e bb out 0x1e, r24 ; 30
900
3aa: e0 9a sbi 0x1c, 0 ; 28
901
3ac: 99 27 eor r25, r25
902
3ae: 8d b3 in r24, 0x1d ; 29
905
000003b2 <__eewr_block_tn13>:
906
3b2: a8 2f mov r26, r24
907
3b4: 86 2f mov r24, r22
908
3b6: 02 c0 rjmp .+4 ; 0x3bc <__eewr_block_tn13+0xa>
909
3b8: 2d 91 ld r18, X+
910
3ba: 04 d0 rcall .+8 ; 0x3c4 <__eewr_r18_tn13>
911
3bc: 41 50 subi r20, 0x01 ; 1
912
3be: e0 f7 brcc .-8 ; 0x3b8 <__eewr_block_tn13+0x6>
915
000003c2 <__eewr_byte_tn13>:
916
3c2: 26 2f mov r18, r22
918
000003c4 <__eewr_r18_tn13>:
919
3c4: e1 99 sbic 0x1c, 1 ; 28
920
3c6: fe cf rjmp .-4 ; 0x3c4 <__eewr_r18_tn13>
921
3c8: 1c ba out 0x1c, r1 ; 28
922
3ca: 1f ba out 0x1f, r1 ; 31
923
3cc: 8e bb out 0x1e, r24 ; 30
924
3ce: 2d bb out 0x1d, r18 ; 29
925
3d0: 0f b6 in r0, 0x3f ; 63
927
3d4: e2 9a sbi 0x1c, 2 ; 28
928
3d6: e1 9a sbi 0x1c, 1 ; 28
929
3d8: 0f be out 0x3f, r0 ; 63
930
3da: 01 96 adiw r24, 0x01 ; 1
936
000003e0 <__stop_program>:
937
3e0: ff cf rjmp .-2 ; 0x3e0 <__stop_program>
added
removed
Tido/BLF-VLD/Programmable/BLF-VLD.lss
