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1
by OV2
Initial 1.52 import |
1 |
/***********************************************************************************
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2 |
Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
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4 |
(c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com),
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Jerremy Koot (jkoot@snes9x.com)
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(c) Copyright 2002 - 2004 Matthew Kendora
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(c) Copyright 2002 - 2005 Peter Bortas (peter@bortas.org)
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(c) Copyright 2004 - 2005 Joel Yliluoma (http://iki.fi/bisqwit/)
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(c) Copyright 2001 - 2006 John Weidman (jweidman@slip.net)
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(c) Copyright 2002 - 2006 funkyass (funkyass@spam.shaw.ca),
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Kris Bleakley (codeviolation@hotmail.com)
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(c) Copyright 2002 - 2010 Brad Jorsch (anomie@users.sourceforge.net),
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Nach (n-a-c-h@users.sourceforge.net),
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87
by OV2
Update copyright in all files |
20 |
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21 |
(c) Copyright 2002 - 2011 zones (kasumitokoduck@yahoo.com)
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1
by OV2
Initial 1.52 import |
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(c) Copyright 2006 - 2007 nitsuja
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290
by Brandon Wright
Update some copyrights, bump version number. |
25 |
(c) Copyright 2009 - 2016 BearOso,
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1
by OV2
Initial 1.52 import |
26 |
OV2
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27 |
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28 |
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29 |
BS-X C emulator code
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30 |
(c) Copyright 2005 - 2006 Dreamer Nom,
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zones
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C4 x86 assembler and some C emulation code
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(c) Copyright 2000 - 2003 _Demo_ (_demo_@zsnes.com),
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Nach,
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36 |
zsKnight (zsknight@zsnes.com)
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C4 C++ code
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(c) Copyright 2003 - 2006 Brad Jorsch,
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Nach
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42 |
DSP-1 emulator code
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(c) Copyright 1998 - 2006 _Demo_,
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Andreas Naive (andreasnaive@gmail.com),
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Gary Henderson,
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46 |
Ivar (ivar@snes9x.com),
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John Weidman,
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48 |
Kris Bleakley,
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Matthew Kendora,
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Nach,
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neviksti (neviksti@hotmail.com)
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53 |
DSP-2 emulator code
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(c) Copyright 2003 John Weidman,
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Kris Bleakley,
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Lord Nightmare (lord_nightmare@users.sourceforge.net),
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Matthew Kendora,
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neviksti
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60 |
DSP-3 emulator code
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(c) Copyright 2003 - 2006 John Weidman,
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Kris Bleakley,
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Lancer,
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z80 gaiden
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DSP-4 emulator code
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(c) Copyright 2004 - 2006 Dreamer Nom,
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John Weidman,
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Kris Bleakley,
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Nach,
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z80 gaiden
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73 |
OBC1 emulator code
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(c) Copyright 2001 - 2004 zsKnight,
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pagefault (pagefault@zsnes.com),
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Kris Bleakley
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Ported from x86 assembler to C by sanmaiwashi
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SPC7110 and RTC C++ emulator code used in 1.39-1.51
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(c) Copyright 2002 Matthew Kendora with research by
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zsKnight,
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John Weidman,
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Dark Force
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SPC7110 and RTC C++ emulator code used in 1.52+
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(c) Copyright 2009 byuu,
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neviksti
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S-DD1 C emulator code
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(c) Copyright 2003 Brad Jorsch with research by
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Andreas Naive,
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John Weidman
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S-RTC C emulator code
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(c) Copyright 2001 - 2006 byuu,
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John Weidman
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ST010 C++ emulator code
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(c) Copyright 2003 Feather,
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John Weidman,
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Kris Bleakley,
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Matthew Kendora
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Super FX x86 assembler emulator code
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(c) Copyright 1998 - 2003 _Demo_,
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pagefault,
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zsKnight
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Super FX C emulator code
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(c) Copyright 1997 - 1999 Ivar,
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Gary Henderson,
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John Weidman
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Sound emulator code used in 1.5-1.51
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(c) Copyright 1998 - 2003 Brad Martin
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(c) Copyright 1998 - 2006 Charles Bilyue'
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Sound emulator code used in 1.52+
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(c) Copyright 2004 - 2007 Shay Green (gblargg@gmail.com)
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295
by Brandon Wright
Add byuu copyright for his S-SMP |
121 |
S-SMP emulator code used in 1.54+
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122 |
(c) Copyright 2016 byuu
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1
by OV2
Initial 1.52 import |
124 |
SH assembler code partly based on x86 assembler code
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(c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
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126 |
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2xSaI filter
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(c) Copyright 1999 - 2001 Derek Liauw Kie Fa
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HQ2x, HQ3x, HQ4x filters
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(c) Copyright 2003 Maxim Stepin (maxim@hiend3d.com)
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NTSC filter
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(c) Copyright 2006 - 2007 Shay Green
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GTK+ GUI code
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290
by Brandon Wright
Update some copyrights, bump version number. |
137 |
(c) Copyright 2004 - 2016 BearOso
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1
by OV2
Initial 1.52 import |
138 |
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139 |
Win32 GUI code
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(c) Copyright 2003 - 2006 blip,
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funkyass,
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Matthew Kendora,
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Nach,
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nitsuja
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298
by Brandon Wright
Bump OV2 Windows port copyright. |
145 |
(c) Copyright 2009 - 2016 OV2
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1
by OV2
Initial 1.52 import |
146 |
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147 |
Mac OS GUI code
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148 |
(c) Copyright 1998 - 2001 John Stiles
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87
by OV2
Update copyright in all files |
149 |
(c) Copyright 2001 - 2011 zones
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1
by OV2
Initial 1.52 import |
150 |
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Specific ports contains the works of other authors. See headers in
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individual files.
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Snes9x homepage: http://www.snes9x.com/
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Permission to use, copy, modify and/or distribute Snes9x in both binary
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and source form, for non-commercial purposes, is hereby granted without
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fee, providing that this license information and copyright notice appear
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with all copies and any derived work.
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This software is provided 'as-is', without any express or implied
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warranty. In no event shall the authors be held liable for any damages
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arising from the use of this software or it's derivatives.
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Snes9x is freeware for PERSONAL USE only. Commercial users should
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seek permission of the copyright holders first. Commercial use includes,
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but is not limited to, charging money for Snes9x or software derived from
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Snes9x, including Snes9x or derivatives in commercial game bundles, and/or
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using Snes9x as a promotion for your commercial product.
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The copyright holders request that bug fixes and improvements to the code
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should be forwarded to them so everyone can benefit from the modifications
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in future versions.
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Super NES and Super Nintendo Entertainment System are trademarks of
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Nintendo Co., Limited and its subsidiary companies.
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***********************************************************************************/
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#include "snes9x.h" |
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#include "memmap.h" |
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#define CPU SA1
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#define ICPU SA1
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#define Registers SA1Registers
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#define OpenBus SA1OpenBus
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#define S9xGetByte S9xSA1GetByte
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#define S9xGetWord S9xSA1GetWord
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#define S9xSetByte S9xSA1SetByte
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#define S9xSetWord S9xSA1SetWord
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#define S9xSetPCBase S9xSA1SetPCBase
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#define S9xOpcodesM1X1 S9xSA1OpcodesM1X1
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#define S9xOpcodesM1X0 S9xSA1OpcodesM1X0
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#define S9xOpcodesM0X1 S9xSA1OpcodesM0X1
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#define S9xOpcodesM0X0 S9xSA1OpcodesM0X0
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#define S9xOpcodesE1 S9xSA1OpcodesE1
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#define S9xOpcodesSlow S9xSA1OpcodesSlow
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#define S9xOpcode_IRQ S9xSA1Opcode_IRQ
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#define S9xOpcode_NMI S9xSA1Opcode_NMI
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#define S9xUnpackStatus S9xSA1UnpackStatus
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#define S9xPackStatus S9xSA1PackStatus
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#define S9xFixCycles S9xSA1FixCycles
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#define Immediate8 SA1Immediate8
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#define Immediate16 SA1Immediate16
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#define Relative SA1Relative
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#define RelativeLong SA1RelativeLong
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#define Absolute SA1Absolute
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#define AbsoluteLong SA1AbsoluteLong
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#define AbsoluteIndirect SA1AbsoluteIndirect
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#define AbsoluteIndirectLong SA1AbsoluteIndirectLong
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#define AbsoluteIndexedIndirect SA1AbsoluteIndexedIndirect
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#define Direct SA1Direct
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#define DirectIndirectIndexed SA1DirectIndirectIndexed
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#define DirectIndirectIndexedLong SA1DirectIndirectIndexedLong
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#define DirectIndexedIndirect SA1DirectIndexedIndirect
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#define DirectIndexedX SA1DirectIndexedX
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#define DirectIndexedY SA1DirectIndexedY
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#define AbsoluteIndexedX SA1AbsoluteIndexedX
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#define AbsoluteIndexedY SA1AbsoluteIndexedY
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#define AbsoluteLongIndexedX SA1AbsoluteLongIndexedX
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#define DirectIndirect SA1DirectIndirect
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#define DirectIndirectLong SA1DirectIndirectLong
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#define StackRelative SA1StackRelative
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#define StackRelativeIndirectIndexed SA1StackRelativeIndirectIndexed
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#define SA1_OPCODES
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#include "cpuops.cpp" |
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26.1.1
by zones
Rewrite IRQ / Update SA-1 / Remove CPUShutdown |
232 |
static void S9xSA1UpdateTimer (void); |
233 |
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1
by OV2
Initial 1.52 import |
234 |
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235 |
void S9xSA1MainLoop (void) |
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{
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26.1.1
by zones
Rewrite IRQ / Update SA-1 / Remove CPUShutdown |
237 |
if (Memory.FillRAM[0x2200] & 0x60) |
238 |
{
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SA1.Cycles += 6; // FIXME |
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S9xSA1UpdateTimer(); |
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return; |
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}
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// SA-1 NMI
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if ((Memory.FillRAM[0x2200] & 0x10) && !(Memory.FillRAM[0x220b] & 0x10)) |
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{
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Memory.FillRAM[0x2301] |= 0x10; |
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Memory.FillRAM[0x220b] |= 0x10; |
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if (SA1.WaitingForInterrupt) |
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{
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SA1.WaitingForInterrupt = FALSE; |
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SA1Registers.PCw++; |
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}
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255 |
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S9xSA1Opcode_NMI(); |
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}
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else
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if (!SA1CheckFlag(IRQ)) |
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{
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// SA-1 Timer IRQ
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if ((Memory.FillRAM[0x220a] & 0x40) && !(Memory.FillRAM[0x220b] & 0x40)) |
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{
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Memory.FillRAM[0x2301] |= 0x40; |
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if (SA1.WaitingForInterrupt) |
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{
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SA1.WaitingForInterrupt = FALSE; |
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SA1Registers.PCw++; |
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}
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S9xSA1Opcode_IRQ(); |
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}
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else
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// SA-1 DMA IRQ
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if ((Memory.FillRAM[0x220a] & 0x20) && !(Memory.FillRAM[0x220b] & 0x20)) |
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{
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Memory.FillRAM[0x2301] |= 0x20; |
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280 |
if (SA1.WaitingForInterrupt) |
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{
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SA1.WaitingForInterrupt = FALSE; |
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SA1Registers.PCw++; |
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}
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285 |
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S9xSA1Opcode_IRQ(); |
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}
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else
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// SA-1 IRQ
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if ((Memory.FillRAM[0x2200] & 0x80) && !(Memory.FillRAM[0x220b] & 0x80)) |
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{
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Memory.FillRAM[0x2301] |= 0x80; |
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if (SA1.WaitingForInterrupt) |
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{
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SA1.WaitingForInterrupt = FALSE; |
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SA1Registers.PCw++; |
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}
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299 |
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300 |
S9xSA1Opcode_IRQ(); |
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}
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}
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for (int i = 0; i < 3 && !(Memory.FillRAM[0x2200] & 0x60); i++) |
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1
by OV2
Initial 1.52 import |
305 |
{
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306 |
#ifdef DEBUGGER
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307 |
if (SA1.Flags & TRACE_FLAG) |
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S9xSA1Trace(); |
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#endif
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311 |
register uint8 Op; |
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register struct SOpcodes *Opcodes; |
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314 |
if (SA1.PCBase) |
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315 |
{
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316 |
SA1OpenBus = Op = SA1.PCBase[Registers.PCw]; |
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Opcodes = SA1.S9xOpcodes; |
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318 |
}
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else
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{
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Op = S9xSA1GetByte(Registers.PBPC); |
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Opcodes = S9xOpcodesSlow; |
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323 |
}
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324 |
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325 |
if ((SA1Registers.PCw & MEMMAP_MASK) + SA1.S9xOpLengths[Op] >= MEMMAP_BLOCK_SIZE) |
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{
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327 |
uint32 oldPC = SA1Registers.PBPC; |
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328 |
S9xSA1SetPCBase(SA1Registers.PBPC); |
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329 |
SA1Registers.PBPC = oldPC; |
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Opcodes = S9xSA1OpcodesSlow; |
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}
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332 |
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333 |
Registers.PCw++; |
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(*Opcodes[Op].S9xOpcode)(); |
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}
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26.1.1
by zones
Rewrite IRQ / Update SA-1 / Remove CPUShutdown |
336 |
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337 |
S9xSA1UpdateTimer(); |
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338 |
}
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339 |
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340 |
static void S9xSA1UpdateTimer (void) // FIXME |
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341 |
{
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342 |
SA1.PrevHCounter = SA1.HCounter; |
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343 |
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344 |
if (Memory.FillRAM[0x2210] & 0x80) |
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{
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346 |
SA1.HCounter += (SA1.Cycles - SA1.PrevCycles); |
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347 |
if (SA1.HCounter >= 0x800) |
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348 |
{
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349 |
SA1.HCounter -= 0x800; |
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350 |
SA1.PrevHCounter -= 0x800; |
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351 |
if (++SA1.VCounter >= 0x200) |
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352 |
SA1.VCounter = 0; |
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353 |
}
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354 |
}
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355 |
else
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356 |
{
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357 |
SA1.HCounter += (SA1.Cycles - SA1.PrevCycles); |
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358 |
if (SA1.HCounter >= Timings.H_Max_Master) |
|
359 |
{
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360 |
SA1.HCounter -= Timings.H_Max_Master; |
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361 |
SA1.PrevHCounter -= Timings.H_Max_Master; |
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362 |
if (++SA1.VCounter >= Timings.V_Max_Master) |
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363 |
SA1.VCounter = 0; |
|
364 |
}
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365 |
}
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366 |
||
367 |
if (SA1.Cycles >= Timings.H_Max_Master) |
|
368 |
SA1.Cycles -= Timings.H_Max_Master; |
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369 |
||
370 |
SA1.PrevCycles = SA1.Cycles; |
|
371 |
||
372 |
bool8 thisIRQ = Memory.FillRAM[0x2210] & 0x03; |
|
373 |
||
374 |
if (Memory.FillRAM[0x2210] & 0x01) |
|
375 |
{
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|
376 |
if (SA1.PrevHCounter >= SA1.HTimerIRQPos * ONE_DOT_CYCLE || SA1.HCounter < SA1.HTimerIRQPos * ONE_DOT_CYCLE) |
|
377 |
thisIRQ = FALSE; |
|
378 |
}
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379 |
||
380 |
if (Memory.FillRAM[0x2210] & 0x02) |
|
381 |
{
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|
382 |
if (SA1.VCounter != SA1.VTimerIRQPos * ONE_DOT_CYCLE) |
|
383 |
thisIRQ = FALSE; |
|
384 |
}
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385 |
||
386 |
// SA-1 Timer IRQ control
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|
387 |
if (!SA1.TimerIRQLastState && thisIRQ) |
|
388 |
{
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389 |
Memory.FillRAM[0x2301] |= 0x40; |
|
390 |
if (Memory.FillRAM[0x220a] & 0x40) |
|
391 |
{
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|
392 |
Memory.FillRAM[0x220b] &= ~0x40; |
|
393 |
#ifdef DEBUGGER
|
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394 |
S9xTraceFormattedMessage("--- SA-1 Timer IRQ triggered prev HC:%04d curr HC:%04d HTimer:%d Pos:%04d VTimer:%d Pos:%03d", |
|
395 |
SA1.PrevHCounter, SA1.HCounter, |
|
396 |
(Memory.FillRAM[0x2210] & 0x01) ? 1 : 0, SA1.HTimerIRQPos * ONE_DOT_CYCLE, |
|
397 |
(Memory.FillRAM[0x2210] & 0x02) ? 1 : 0, SA1.VTimerIRQPos); |
|
398 |
#endif
|
|
399 |
}
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|
400 |
}
|
|
401 |
||
402 |
SA1.TimerIRQLastState = thisIRQ; |
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1
by OV2
Initial 1.52 import |
403 |
}
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