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188.12.1
by Selene Scriven
merged a sanitized copy of the Emisar D4v2 branch; history summarized below: |
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#ifndef HWDEF_EMISAR_D4V2_H
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#define HWDEF_EMISAR_D4V2_H
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/* Emisar D4v2 driver layout (attiny1634)
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*
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* Pin / Name / Function
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* 1 PA6 FET PWM (PWM1B)
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* 2 PA5 red aux LED (PWM0B)
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* 3 PA4 green aux LED
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* 4 PA3 blue aux LED
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* 5 PA2 e-switch
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* 6 PA1 (none)
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* 7 PA0 (none)
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* 8 GND GND
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* 9 VCC VCC
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* 10 PC5 (none)
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* 11 PC4 (none)
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* 12 PC3 RESET
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* 13 PC2 (none)
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* 14 PC1 SCK
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* 15 PC0 (none) PWM0A
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* 16 PB3 7135 PWM (PWM1A)
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* 17 PB2 MISO
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* 18 PB1 MOSI
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* 19 PB0 (none)
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* 20 PA7 (none)
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* ADC12 thermal sensor
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*/
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#ifdef ATTINY
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#undef ATTINY
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#endif
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#define ATTINY 1634
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#include <avr/io.h> |
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#define PWM_CHANNELS 2
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#define SWITCH_PIN PA2 // pin 5 |
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#define SWITCH_PCINT PCINT2 // pin 5 pin change interrupt |
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#define SWITCH_PCIE PCIE0 // PCIE0 is for PCINT[7:0] |
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#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0] |
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#define SWITCH_PORT PINA // PINA or PINB or PINC |
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#define PWM1_PIN PB3 // pin 16, 1x7135 PWM |
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#define PWM1_LVL OCR1A // OCR1A is the output compare register for PB3 |
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#define PWM2_PIN PA6 // pin 1, FET PWM |
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#define PWM2_LVL OCR1B // OCR1B is the output compare register for PB1 |
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#define ADC_PRSCL 0x06 // clk/64 |
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// average drop across diode on this hardware
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#ifndef VOLTAGE_FUDGE_FACTOR
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#define VOLTAGE_FUDGE_FACTOR 4 // add 0.20V (measured 0.22V) |
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#endif
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#define TEMP_CHANNEL 0b00001111
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// this light has aux LEDs under the optic
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#define AUXLED_R_PIN PA5 // pin 2 |
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#define AUXLED_G_PIN PA4 // pin 3 |
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#define AUXLED_B_PIN PA3 // pin 4 |
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#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC |
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#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC |
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#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC |
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// with so many pins, doing this all with #ifdefs gets awkward...
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// ... so just hardcode it in each hwdef file instead
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inline void hwdef_setup() { |
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// enable output ports
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// 7135
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DDRB = (1 << PWM1_PIN); |
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// FET, aux R/G/B
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DDRA = (1 << PWM2_PIN) |
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| (1 << AUXLED_R_PIN) |
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| (1 << AUXLED_G_PIN) |
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| (1 << AUXLED_B_PIN) |
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;
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// configure PWM
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// Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
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// pre-scale for timer: N = 1
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TCCR1A = (0<<WGM11) | (1<<WGM10) // 8-bit (TOP=0xFF) (DS table 12-5) |
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| (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) |
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| (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) |
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;
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TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) |
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| (0<<WGM13) | (0<<WGM12) // phase-correct PWM (DS table 12-5) |
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;
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// set up e-switch
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//PORTA = (1 << SWITCH_PIN); // TODO: configure PORTA / PORTB / PORTC?
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PUEA = (1 << SWITCH_PIN); // pull-up for e-switch |
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SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt |
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}
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#define LAYOUT_DEFINED
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#endif
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