1
/**************************************************************************\
2
* Texas Instruments TMS320x25 DSP Emulator *
4
* Copyright Tony La Porta *
5
* Written for the MAME project. *
7
* Note : This is a word based microcontroller, with addressing *
8
* architecture based on the Harvard addressing scheme. *
10
* Three versions of the chip are available, and they are: *
11
* TMS320C25 Internal ROM one time programmed at TI *
12
* TMS320E25 Internal ROM programmable as a normal EPROM *
13
* TMS320P25 Internal ROM programmable once as a normal EPROM only *
14
* These devices can also be used as a MicroController with external ROM *
16
\***************************************************************************/
20
#ifndef __TMS32025_H__
21
#define __TMS32025_H__
26
#define TMS32025_BIO 0x10000 /* BIO input */
27
#define TMS32025_HOLD 0x10001 /* HOLD input */
28
#define TMS32025_HOLDA 0x10001 /* HOLD Acknowledge output */
29
#define TMS32025_XF 0x10002 /* XF output */
30
#define TMS32025_DR 0x10003 /* Serial Data Receive input */
31
#define TMS32025_DX 0x10003 /* Serial Data Transmit output */
35
/****************************************************************************
39
#define TMS32025_INT0 0 /* External INT0 */
40
#define TMS32025_INT1 1 /* External INT1 */
41
#define TMS32025_INT2 2 /* External INT2 */
42
#define TMS32025_TINT 3 /* Internal Timer interrupt */
43
#define TMS32025_RINT 4 /* Serial Port receive interrupt */
44
#define TMS32025_XINT 5 /* Serial Port transmit interrupt */
45
#define TMS32025_TRAP 6 /* Trap instruction */
46
#define TMS32025_INT_NONE -1
49
#define TMS32025_FSX 7 /* Frame synchronisation */
54
TMS32025_PFC, TMS32025_STR0, TMS32025_STR1, TMS32025_IFR,
55
TMS32025_RPTC, TMS32025_ACC, TMS32025_PREG, TMS32025_TREG,
56
TMS32025_AR0, TMS32025_AR1, TMS32025_AR2, TMS32025_AR3,
57
TMS32025_AR4, TMS32025_AR5, TMS32025_AR6, TMS32025_AR7,
58
TMS32025_STK0, TMS32025_STK1, TMS32025_STK2, TMS32025_STK3,
59
TMS32025_STK4, TMS32025_STK5, TMS32025_STK6, TMS32025_STK7,
60
TMS32025_DRR, TMS32025_DXR, TMS32025_TIM, TMS32025_PRD,
61
TMS32025_IMR, TMS32025_GREG
65
/****************************************************************************
69
DECLARE_LEGACY_CPU_DEVICE(TMS32025, tms32025);
70
DECLARE_LEGACY_CPU_DEVICE(TMS32026, tms32026);
72
CPU_DISASSEMBLE( tms32025 );
74
#endif /* __TMS32025_H__ */