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* Electric(tm) VLSI Design System
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* Generic technology description
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* Written by: Steven M. Rubin, Static Free Software
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* Copyright (c) 2000 Static Free Software.
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* Electric(tm) is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Electric(tm) is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with Electric(tm); see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 59 Temple Place, Suite 330,
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* Boston, Mass 02111-1307, USA.
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* Static Free Software
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* Portola Valley, California 94028
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* info@staticfreesoft.com
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#include "egraphics.h"
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#include "efunction.h"
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NODEPROTO *gen_univpinprim, *gen_invispinprim, *gen_unroutedpinprim, *gen_facetcenterprim,
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*gen_portprim, *gen_drcprim;
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ARCPROTO *gen_universalarc, *gen_invisiblearc, *gen_unroutedarc;
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ARCPROTO **gen_upconn = 0;
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/* prototypes for local routines */
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static void gen_makeunivlist(void);
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/******************** LAYERS ********************/
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#define MAXLAYERS 5 /* total layers below */
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#define LUNIV 0 /* universal layer (connects all) */
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#define LINVIS 1 /* invisible layer (nonelectrical) */
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#define LUNROUTED 2 /* unrouted layer (for routers) */
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#define LGLYPH 3 /* glyph layer (for menu icons) */
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#define LDRC 4 /* drc ignore layer */
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static GRAPHICS gen_un_lay = {LAYERO, MENTXT, SOLIDC, SOLIDC,
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/* univ */ {0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
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static GRAPHICS gen_in_lay = {LAYERO, GRAY, SOLIDC, SOLIDC,
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/* invis */ {0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
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static GRAPHICS gen_int_lay = {LAYERO, BLACK, SOLIDC, SOLIDC,
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/* invis text */ {0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
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static GRAPHICS gen_ur_lay = {LAYERO, DGRAY, SOLIDC, SOLIDC,
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/* unrouted */ {0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
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static GRAPHICS gen_gl_lay = {LAYERO, MENGLY, SOLIDC, SOLIDC,
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/* glyph */ {0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
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static GRAPHICS gen_dr_lay = {LAYERO, ORANGE, SOLIDC, SOLIDC,
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/* drc */ {0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
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/* these tables must be updated togehter */
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GRAPHICS *gen_layers[MAXLAYERS+1] = {&gen_un_lay, &gen_in_lay,
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&gen_ur_lay, &gen_gl_lay, &gen_dr_lay, NOGRAPHICS};
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static char *gen_layer_names[MAXLAYERS] = {"Universal", "Invisible",
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"Unrouted", "Glyph", "DRC"};
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static char *gen_cif_layers[MAXLAYERS] = {"", "", "", "", "DRC"};
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static INTBIG gen_layer_function[MAXLAYERS] = {LFUNKNOWN, LFUNKNOWN|LFNONELEC,
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LFUNKNOWN, LFART|LFNONELEC, LFART|LFNONELEC};
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static char *gen_layer_letters[MAXLAYERS] = {"u", "i", "r", "g", "d"};
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/******************** ARCS ********************/
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#define ARCPROTOCOUNT 3
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#define GENAUNROUTED 2
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static TECH_ARCLAY gen_al_u[] = {{LUNIV,0,FILLED}};
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static TECH_ARCS gen_a_u = {
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"Universal",0,GENAUNIV,NOARCPROTO, /* name */
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1,gen_al_u, /* layers */
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(APUNKNOWN<<AFUNCTIONSH)|WANTFIXANG|(45<<AANGLEINCSH)}; /* userbits */
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static TECH_ARCLAY gen_al_i[] = {{LINVIS,0,FILLED}};
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static TECH_ARCS gen_a_i = {
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"Invisible",0,GENAINVIS,NOARCPROTO, /* name */
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1,gen_al_i, /* layers */
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(APNONELEC<<AFUNCTIONSH)|WANTFIXANG|(45<<AANGLEINCSH)}; /* userbits */
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static TECH_ARCLAY gen_al_r[] = {{LUNROUTED,0,FILLED}};
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static TECH_ARCS gen_a_r = {
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"Unrouted",0,GENAUNROUTED,NOARCPROTO, /* name */
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1,gen_al_r, /* layers */
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(APUNROUTED<<AFUNCTIONSH)|(0<<AANGLEINCSH)}; /* userbits */
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TECH_ARCS *gen_arcprotos[ARCPROTOCOUNT+1] = {
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&gen_a_u, &gen_a_i, &gen_a_r, ((TECH_ARCS *)-1)};
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/******************** PORT CONNECTIONS **************************/
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/* these values are replaced with actual arcproto addresses */
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static INTBIG gen_pc_iu[] = {-1, GENAINVIS, GENAUNIV, -1};
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static INTBIG gen_pc_riu[] = {-1, GENAUNROUTED, GENAINVIS, GENAUNIV, -1};
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/******************** NODES ********************/
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#define NODEPROTOCOUNT 6
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#define NUNIV 1 /* universal pin */
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#define NINVIS 2 /* invisible pin */
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#define NUNROUTED 3 /* unrouted pin */
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#define NCENTER 4 /* facet center */
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#define NPORT 5 /* port declaration (for tech edit) */
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#define NDRC 6 /* drc ignore mask (for ECAD's DRC) */
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static INTBIG gen_fullbox[] = {LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE};
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static INTBIG gen_disccenter[] = {CENTER, CENTER, RIGHTEDGE, CENTER};
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static INTBIG gen_in2box[] = {LEFTIN2, BOTIN2, RIGHTIN2, TOPIN2};
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static INTBIG gen_center_lc[] = {LEFTEDGE, BOTEDGE, LEFTEDGE, BOTEDGE};
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static INTBIG gen_portabox[] = {CENTER, CENTER, CENTER, CENTER,
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static TECH_PORTS gen_u_p[] = { /* ports */
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{(INTBIG *)0, "univ", NOPORTPROTO, (180<<PORTARANGESH),
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CENTER, CENTER, CENTER, CENTER}};
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static TECH_POLYGON gen_u_l[] = { /* layers */
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{LUNIV, 0, 2, DISC, POINTS, gen_disccenter}};
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static TECH_NODES gen_u = {
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"Universal-Pin",NUNIV,NONODEPROTO, /* name */
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1,gen_u_p, /* ports */
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1,gen_u_l, /* layers */
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(NPPIN<<NFUNCTIONSH)|HOLDSTRACE|WIPEON1OR2, /* userbits */
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0,0,0,0,0,0,0,0,0}; /* characteristics */
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static TECH_PORTS gen_i_p[] = {{ /* ports */
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gen_pc_iu, "center", NOPORTPROTO, (180<<PORTARANGESH),
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CENTER, CENTER, CENTER, CENTER}};
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static TECH_POLYGON gen_i_l[] = { /* layers */
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{LINVIS, 0, 4, CLOSEDRECT, BOX, gen_fullbox}};
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static TECH_NODES gen_i = {
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"Invisible-Pin",NINVIS,NONODEPROTO, /* name */
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1,gen_i_p, /* ports */
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1,gen_i_l, /* layers */
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(NPPIN<<NFUNCTIONSH)|WIPEON1OR2, /* userbits */
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0,0,0,0,0,0,0,0,0}; /* characteristics */
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static TECH_PORTS gen_r_p[] = {{ /* ports */
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gen_pc_riu, "unrouted", NOPORTPROTO, (180<<PORTARANGESH),
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CENTER, CENTER, CENTER, CENTER}};
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static TECH_POLYGON gen_r_l[] = { /* layers */
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{LUNROUTED, 0, 2, DISC, POINTS, gen_disccenter}};
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static TECH_NODES gen_r = {
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"Unrouted-Pin",NUNROUTED,NONODEPROTO, /* name */
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1,gen_r_p, /* ports */
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1,gen_r_l, /* layers */
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(NPPIN<<NFUNCTIONSH)|WIPEON1OR2, /* userbits */
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0,0,0,0,0,0,0,0,0}; /* characteristics */
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static TECH_PORTS gen_c_p[] = {{ /* ports */
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gen_pc_iu, "center", NOPORTPROTO, (180<<PORTARANGESH),
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LEFTEDGE, BOTEDGE, LEFTEDGE, BOTEDGE}};
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static TECH_POLYGON gen_c_l[] = { /* layers */
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{LGLYPH, 0, 4, CLOSED, BOX, gen_fullbox},
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{LGLYPH, 0, 2, BIGCROSS, POINTS, gen_center_lc}};
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static TECH_NODES gen_c = {
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"Facet-Center",NCENTER,NONODEPROTO, /* name */
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1,gen_c_p, /* ports */
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2,gen_c_l, /* layers */
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(NPART<<NFUNCTIONSH), /* userbits */
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0,0,0,0,0,0,0,0,0}; /* characteristics */
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static TECH_PORTS gen_p_p[] = {{ /* ports */
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gen_pc_iu, "center", NOPORTPROTO, (180<<PORTARANGESH),
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CENTER, CENTER, CENTER, CENTER}};
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static TECH_POLYGON gen_p_l[] = { /* layers */
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{LGLYPH, 0, 4, CLOSED, BOX, gen_in2box},
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{LGLYPH, 0, 3, OPENED, POINTS, gen_portabox}};
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static TECH_NODES gen_p = {
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"Port",NPORT,NONODEPROTO, /* name */
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1,gen_p_p, /* ports */
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2,gen_p_l, /* layers */
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(NPART<<NFUNCTIONSH), /* userbits */
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0,0,0,0,0,0,0,0,0}; /* characteristics */
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static TECH_PORTS gen_d_p[] = {{ /* ports */
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gen_pc_iu, "center", NOPORTPROTO, (180<<PORTARANGESH),
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CENTER, CENTER, CENTER, CENTER}};
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static TECH_POLYGON gen_d_l[] = { /* layers */
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{LDRC, 0, 4, CLOSEDRECT, BOX, gen_fullbox}};
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static TECH_NODES gen_d = {
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"DRC-Node",NDRC,NONODEPROTO, /* name */
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1,gen_d_p, /* ports */
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1,gen_d_l, /* layers */
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(NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
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POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
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TECH_NODES *gen_nodeprotos[NODEPROTOCOUNT+1] = {&gen_u, &gen_i,
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&gen_r, &gen_c, &gen_p, &gen_d, ((TECH_NODES *)-1)};
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static INTBIG gen_node_widoff[NODEPROTOCOUNT*4] = {0,0,0,0, 0,0,0,0, 0,0,0,0,
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0,0,0,0, K2,K2,K2,K2, 0,0,0,0};
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/******************** VARIABLE AGGREGATION ********************/
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TECH_VARIABLES gen_variables[] =
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/* set general information about the technology */
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{"TECH_layer_names", (char *)gen_layer_names, 0.0,
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VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
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{"TECH_layer_function", (char *)gen_layer_function, 0.0,
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VINTEGER|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
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{"TECH_node_width_offset", (char *)gen_node_widoff, 0.0,
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VFRACT|VDONTSAVE|VISARRAY|((NODEPROTOCOUNT*4)<<VLENGTHSH)},
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/* set information for the I/O tool */
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{"IO_cif_layer_names", (char *)gen_cif_layers, 0.0,
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VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
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/* set information for the USER tool */
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{"USER_layer_letters", (char *)gen_layer_letters, 0.0,
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VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
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/******************** ROUTINES ********************/
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BOOLEAN gen_initprocess(TECHNOLOGY *tech, INTBIG pass)
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/* initialize the technology variable */
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/* create list of ALL arcs (now and when technologies change) */
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registertechnologycache(gen_makeunivlist, 0, 0);
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gen_univpinprim = getnodeproto("Generic:Universal-Pin");
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gen_invispinprim = getnodeproto("Generic:Invisible-Pin");
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gen_unroutedpinprim = getnodeproto("Generic:Unrouted-Pin");
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gen_facetcenterprim = getnodeproto("Generic:Facet-Center");
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gen_portprim = getnodeproto("Generic:Port");
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gen_drcprim = getnodeproto("Generic:DRC-Node");
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gen_universalarc = getarcproto("Generic:Universal");
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gen_invisiblearc = getarcproto("Generic:Invisible");
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gen_unroutedarc = getarcproto("Generic:Unrouted");
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/* set colors properly */
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gen_gl_lay.col = el_colmengly;
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void gen_termprocess(void)
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if (gen_upconn != 0) efree((char *)gen_upconn);
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* routine to update the connecitivity list for universal and invisible pins so that
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* they can connect to ALL arcs. This is called at initialization and again
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* whenever the number of technologies changes
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void gen_makeunivlist(void)
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REGISTER ARCPROTO *ap;
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REGISTER TECHNOLOGY *t;
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static BOOLEAN first = TRUE;
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/* count the number of arcs in all technologies */
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for(t = el_technologies; t != NOTECHNOLOGY; t = t->nexttechnology)
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for(ap = t->firstarcproto; ap != NOARCPROTO; ap = ap->nextarcproto) tot++;
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/* make an array for each arc */
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if (gen_upconn != 0) efree((char *)gen_upconn);
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gen_upconn = (ARCPROTO **)emalloc(((tot+2) * (sizeof (ARCPROTO *))), gen_tech->cluster);
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if (gen_upconn == 0) return;
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gen_upconn[tot++] = (ARCPROTO *)0;
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for(t = el_technologies; t != NOTECHNOLOGY; t = t->nexttechnology)
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for(ap = t->firstarcproto; ap != NOARCPROTO; ap = ap->nextarcproto)
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gen_upconn[tot++] = ap;
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gen_upconn[tot] = NOARCPROTO;
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/* store the array in this technology */
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/* on first entry, load the local descriptor */
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gen_u_p[0].portarcs = (INTBIG *)gen_upconn;
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gen_i_p[0].portarcs = (INTBIG *)gen_upconn;
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/* after initialization, simply change the connection array */
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gen_univpinprim->firstportproto->connects = gen_upconn;
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gen_invispinprim->firstportproto->connects = gen_upconn;
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INTBIG gen_nodepolys(NODEINST *ni, INTBIG *reasonable, WINDOWPART *win)
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REGISTER INTBIG pindex, count;
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REGISTER INTBIG start, end;
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REGISTER INTBIG lambda;
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static INTBIG portanglekey = 0, portrangekey = 0;
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REGISTER VARIABLE *var, *var2;
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pindex = ni->proto->primindex;
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count = gen_nodeprotos[pindex-1]->layercount;
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if (pindex == NUNIV || pindex == NINVIS || pindex == NUNROUTED)
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if (tech_pinusecount(ni, win)) count = 0;
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if (pindex == NINVIS)
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gen_in_lay.bits = LAYERO;
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gen_in_lay.col = GRAY;
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gen_int_lay.bits = LAYERO;
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gen_int_lay.col = BLACK;
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var = getvalkey((INTBIG)ni, VNODEINST, VINTEGER, art_colorkey);
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if (var != NOVARIABLE)
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case LAYERT1: gen_in_lay.col = COLORT1; gen_in_lay.bits = LAYERT1; break;
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case LAYERT2: gen_in_lay.col = COLORT2; gen_in_lay.bits = LAYERT2; break;
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case LAYERT3: gen_in_lay.col = COLORT3; gen_in_lay.bits = LAYERT3; break;
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case LAYERT4: gen_in_lay.col = COLORT4; gen_in_lay.bits = LAYERT4; break;
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case LAYERT5: gen_in_lay.col = COLORT5; gen_in_lay.bits = LAYERT5; break;
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if ((var->addr&(LAYERG|LAYERH|LAYEROE)) == LAYEROE)
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gen_in_lay.bits = LAYERO; else
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gen_in_lay.bits = LAYERA;
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gen_in_lay.col = var->addr;
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gen_int_lay.bits = gen_in_lay.bits;
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gen_int_lay.col = gen_in_lay.col;
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} else if (pindex == NPORT)
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if (portanglekey == 0) portanglekey = makekey("EDTEC_portangle");
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if (portrangekey == 0) portrangekey = makekey("EDTEC_portrange");
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/* port node becomes a cross when it is 1x1 */
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lambda = lambdaofnode(ni);
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if (ni->highx-ni->lowx == lambda*2 && ni->highy-ni->lowy == lambda*2)
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gen_p_l[0].style = CROSS; else gen_p_l[0].style = CLOSED;
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var = getvalkey((INTBIG)ni, VNODEINST, VINTEGER, portanglekey);
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var2 = getvalkey((INTBIG)ni, VNODEINST, VINTEGER, portrangekey);
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if (var == NOVARIABLE || var2 == NOVARIABLE) count--; else
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start = (var->addr - var2->addr) * 10;
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end = (var->addr + var2->addr) * 10;
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while (start < 0) start += 3600;
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while (start > 3600) start -= 3600;
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while (end < 0) end += 3600;
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while (end > 3600) end -= 3600;
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gen_portabox[1] = mult(cosine(start), K2);
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gen_portabox[3] = mult(sine(start), K2);
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gen_portabox[9] = mult(cosine(end), K2);
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gen_portabox[11] = mult(sine(end), K2);
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/* add in displayable variables */
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tech_realpolys = count;
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count += tech_displayablenvars(ni, tech_curwindowpart);
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if (reasonable != 0) *reasonable = count;
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void gen_shapenodepoly(NODEINST *ni, INTBIG box, POLYGON *poly)
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REGISTER TECH_POLYGON *lay;
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REGISTER INTBIG pindex, count, i, j;
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REGISTER INTBIG x, y, xoff, yoff, cross, lambda;
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REGISTER VARIABLE *var;
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/* handle displayable variables */
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pindex = ni->proto->primindex;
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if (box >= tech_realpolys)
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(void)tech_filldisplayablenvar(ni, poly, tech_curwindowpart, 0);
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if (pindex == NINVIS) poly->desc = &gen_int_lay;
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lambda = lambdaofnode(ni);
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lay = &gen_nodeprotos[pindex - 1]->layerlist[box];
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if (lay->portnum < 0) poly->portproto = NOPORTPROTO; else
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poly->portproto = ni->proto->tech->nodeprotos[pindex-1]->portlist[lay->portnum].addr;
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/* universal pins may have trace information */
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var = getvalkey((INTBIG)ni, VNODEINST, VINTEGER|VISARRAY, el_trace_key);
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if (var != NOVARIABLE)
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/* make sure polygon can hold this description */
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count = getlength(var) / 2;
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j = count*4 + (count-1)*2;
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if (poly->limit < j) (void)extendpolygon(poly, j);
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/* fill the polygon */
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xoff = (ni->highx + ni->lowx) / 2;
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yoff = (ni->highy + ni->lowy) / 2;
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for(i=0; i<count; i++)
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x = ((INTBIG *)var->addr)[i*2];
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y = ((INTBIG *)var->addr)[i*2+1];
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poly->xv[j] = x-cross+xoff;
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poly->yv[j] = y-cross+yoff; j++;
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poly->xv[j] = x+cross+xoff;
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poly->yv[j] = y+cross+yoff; j++;
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poly->xv[j] = x-cross+xoff;
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poly->yv[j] = y+cross+yoff; j++;
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poly->xv[j] = x+cross+xoff;
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poly->yv[j] = y-cross+yoff; j++;
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for(i=1; i<count; i++)
463
poly->xv[j] = ((INTBIG *)var->addr)[(i-1)*2]+xoff;
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poly->yv[j] = ((INTBIG *)var->addr)[(i-1)*2+1]+yoff; j++;
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poly->xv[j] = ((INTBIG *)var->addr)[i*2]+xoff;
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poly->yv[j] = ((INTBIG *)var->addr)[i*2+1]+yoff; j++;
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/* add in peripheral information */
470
poly->layer = lay->layernum;
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poly->style = VECTORS;
473
poly->desc = gen_layers[poly->layer];
478
/* nontrace pins draw the normal way */
479
tech_fillpoly(poly, lay, ni, lambda, FILLED);
480
poly->desc = gen_layers[poly->layer];
483
void gen_shapeportpoly(NODEINST *ni, PORTPROTO *pp, POLYGON *poly, XARRAY trans,
486
REGISTER INTBIG pindex;
488
pindex = ni->proto->primindex;
489
tech_fillportpoly(ni, pp, poly, trans, gen_nodeprotos[pindex-1], OPENED);
492
INTBIG gen_arcpolys(ARCINST *ai, WINDOWPART *win)
496
i = gen_arcprotos[ai->proto->arcindex]->laycount;
498
/* add in displayable variables */
500
i += tech_displayableavars(ai, win);
504
void gen_shapearcpoly(ARCINST *ai, INTBIG box, POLYGON *poly)
506
REGISTER INTBIG aindex;
507
REGISTER TECH_ARCLAY *thista;
509
/* handle displayable variables */
510
if (box >= tech_realpolys)
512
(void)tech_filldisplayableavar(ai, poly, tech_curwindowpart, 0);
516
aindex = ai->proto->arcindex;
517
thista = &gen_arcprotos[aindex]->list[box];
518
makearcpoly(ai->length, ai->width-thista->off*lambdaofarc(ai)/WHOLE, ai, poly, thista->style);
519
poly->layer = thista->lay;
520
poly->desc = gen_layers[poly->layer];
added
removed
src/tec/tecgen.c
