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/*************************************************************************************
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* Author: Alexander 'E-Razor' Krause (admin@erazor-zone.de)
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* Copyright: (c) 2005 Alexander Krause
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* Release Version: 1.0.7.15
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* CVS Revision Version: $Revision: 1.13.2.5 $
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* Date Started: 2005/06/15
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* Last Modified: $Date: 2006/09/23 02:05:48 $
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* VHDL (VHSICADL, very high speed integrated circuit HDL) language file for GeSHi.
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*************************************************************************************
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* This file is part of GeSHi.
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* GeSHi is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* GeSHi is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with GeSHi; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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************************************************************************************/
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$language_data = array (
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'LANG_NAME' => 'VHDL',
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'COMMENT_SINGLE' => array(1 => '--'),
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'COMMENT_MULTI' => array(),
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'CASE_KEYWORDS' => GESHI_CAPS_NO_CHANGE,
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'QUOTEMARKS' => array('"'),
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'access','after','alias','all','assert','architecture','begin',
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'block','body','buffer','bus','case','component','configuration','constant',
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'disconnect','downto','else','elsif','end','entity','exit','file','for',
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'function','generate','generic','group','guarded','if','impure','in',
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'inertial','inout','is','label','library','linkage','literal','loop',
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'map','new','next','null','of','on','open','others','out','package',
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'port','postponed','procedure','process','pure','range','record','register',
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'reject','report','return','select','severity','signal','shared','subtype',
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'then','to','transport','type','unaffected','units','until','use','variable',
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'wait','when','while','with','note','warning','error','failure','and',
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'or','xor','not','nor'
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'bit','bit_vector','character','boolean','integer','real','time','string',
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'severity_level','positive','natural','signed','unsigned','line','text',
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'std_logic','std_logic_vector','std_ulogic','std_ulogic_vector','qsim_state',
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'qsim_state_vector','qsim_12state','qsim_12state_vector','qsim_strength',
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'mux_bit','mux_vector','reg_bit','reg_vector','wor_bit','wor_vector'
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'=','<=',':=','=>','=='
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'[', ']', '(', ')',';','<','>',':'
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'CASE_SENSITIVE' => array(
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GESHI_COMMENTS => true,
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1 => 'color: #000000; font-weight: bold;',
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2 => 'color: #aa0000;'
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1 => 'color: #adadad; font-style: italic;'
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'ESCAPE_CHAR' => array(
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0 => 'color: #000099; font-weight: bold;'
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0 => 'color: #66cc66;'
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0 => 'color: #7f007f;'
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0 => 'color: #ff0000;'
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0 => 'color: #66cc66;'
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0 => 'color: #ff0000;',
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1 => 'color: #ff0000;',
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2 => 'color: #ff0000;',
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3 => 'color: #ff0000;'
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'OBJECT_SPLITTERS' => array(
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0 => '(\b(0x)[0-9a-fA-F]{2,}[hH]?|\b(0x)?[0-9a-fA-F]{2,}[hH])|'.
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'(\b[0-9]{1,}((\.){1}[0-9]{1,}){0,1}(E)[\-]{0,1}[0-9]{1,})|'.
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'STRICT_MODE_APPLIES' => GESHI_NEVER,
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'SCRIPT_DELIMITERS' => array(
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'HIGHLIGHT_STRICT_BLOCK' => array(