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/* Copyright (c) 2009 Atmel Corporation
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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/* $Id: iotn4.h 2063 2009-11-18 22:06:28Z arcanum $ */
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/* avr/iotn4.h - definitions for ATtiny4 */
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/* This file should only be included from <avr/io.h>, never directly. */
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# error "Include <avr/io.h> instead of this file."
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# define _AVR_IOXXX_H_ "iotn4.h"
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# error "Attempt to include more than one <avr/ioXXX.h> file."
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#ifndef _AVR_ATtiny4_H_
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#define _AVR_ATtiny4_H_ 1
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/* Registers and associated bit numbers. */
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#define PINB _SFR_IO8(0x00)
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#define DDRB _SFR_IO8(0x01)
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#define PORTB _SFR_IO8(0x02)
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#define PUEB _SFR_IO8(0x03)
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#define PORTCR _SFR_IO8(0x0C)
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#define PCMSK _SFR_IO8(0x10)
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#define PCIFR _SFR_IO8(0x11)
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#define PCICR _SFR_IO8(0x12)
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#define EIMSK _SFR_IO8(0x13)
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#define EIFR _SFR_IO8(0x14)
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#define EICRA _SFR_IO8(0x15)
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#define DIDR0 _SFR_IO8(0x17)
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#define ACSR _SFR_IO8(0x1F)
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#define ICR0 _SFR_IO16(0x22)
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#define ICR0L _SFR_IO8(0x22)
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#define ICR0H _SFR_IO8(0x23)
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#define OCR0B _SFR_IO16(0x24)
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#define OCR0BL _SFR_IO8(0x24)
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#define OCR0BH _SFR_IO8(0x25)
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#define OCR0A _SFR_IO16(0x26)
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#define OCR0AL _SFR_IO8(0x26)
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#define OCR0AH _SFR_IO8(0x27)
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#define TCNT0 _SFR_IO16(0x28)
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#define TCNT0L _SFR_IO8(0x28)
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#define TCNT0H _SFR_IO8(0x29)
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#define TIFR0 _SFR_IO8(0x2A)
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#define TIMSK0 _SFR_IO8(0x2B)
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#define TCCR0C _SFR_IO8(0x2C)
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#define TCCR0B _SFR_IO8(0x2D)
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#define TCCR0A _SFR_IO8(0x2E)
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#define GTCCR _SFR_IO8(0x2F)
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#define WDTCSR _SFR_IO8(0x31)
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#define NVMCSR _SFR_IO8(0x32)
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#define NVMCMD _SFR_IO8(0x33)
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#define VLMCSR _SFR_IO8(0x34)
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#define PRR _SFR_IO8(0x35)
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#define CLKPSR _SFR_IO8(0x36)
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#define CLKMSR _SFR_IO8(0x37)
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#define OSCCAL _SFR_IO8(0x39)
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#define SMCR _SFR_IO8(0x3A)
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#define RSTFLR _SFR_IO8(0x3B)
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#define CCP _SFR_IO8(0x3C)
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/* Interrupt vectors */
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/* Vector 0 is the reset vector */
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#define INT0_vect_num 1
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#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */
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#define PCINT0_vect_num 2
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#define PCINT0_vect _VECTOR(2) /* Pin Change Interrupt Request 0 */
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#define TIM0_CAPT_vect_num 3
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#define TIM0_CAPT_vect _VECTOR(3) /* Timer/Counter0 Input Capture */
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#define TIM0_OVF_vect_num 4
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#define TIM0_OVF_vect _VECTOR(4) /* Timer/Counter0 Overflow */
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#define TIM0_COMPA_vect_num 5
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#define TIM0_COMPA_vect _VECTOR(5) /* Timer/Counter Compare Match A */
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#define TIM0_COMPB_vect_num 6
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#define TIM0_COMPB_vect _VECTOR(6) /* Timer/Counter Compare Match B */
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#define ANA_COMP_vect_num 7
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#define ANA_COMP_vect _VECTOR(7) /* Analog Comparator */
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#define WDT_vect_num 8
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#define WDT_vect _VECTOR(8) /* Watchdog Time-out */
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#define VLM_vect_num 9
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#define VLM_vect _VECTOR(9) /* Vcc Voltage Level Monitor */
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#define _VECTOR_SIZE 2 /* Size of individual vector. */
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#define _VECTORS_SIZE (10 * _VECTOR_SIZE)
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#define SPM_PAGESIZE (32)
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#define RAMSTART (0x40)
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#define RAMEND (RAMSTART + RAMSIZE - 1)
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#define XRAMSTART (NA)
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#define XRAMEND (RAMEND)
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#define E2PAGESIZE (0)
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#define FLASHEND (0x1FF)
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#define FUSE_MEMORY_SIZE 0
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#define __LOCK_BITS_EXIST
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#define SIGNATURE_0 0x1E
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#define SIGNATURE_1 0x90
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#define SIGNATURE_2 0x0A
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/* Device Pin Definitions */
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#define SPDATA_DDR DDRCINT
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#define SPDATA_PORT PORTCINT
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#define SPDATA_PIN PINCINT
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#define SPDATA_BIT INT0
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#define OC0A_DDR DDRCINT
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#define OC0A_PORT PORTCINT
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#define OC0A_PIN PINCINT
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#define OC0A_BIT INT0
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#define ADC0_DDR DDRCINT
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#define ADC0_PORT PORTCINT
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#define ADC0_PIN PINCINT
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#define ADC0_BIT INT0
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#define AIN0_DDR DDRCINT
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#define AIN0_PORT PORTCINT
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#define AIN0_PIN PINCINT
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#define AIN0_BIT INT0
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#define PB0_DDR DDRCINT
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#define PB0_PORT PORTCINT
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#define PB0_PIN PINCINT
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#define SPCLK_DDR DDRCINT
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#define SPCLK_PORT PORTCINT
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#define SPCLK_PIN PINCINT
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#define SPCLK_BIT INT1
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#define CLKI_DDR DDRCINT
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#define CLKI_PORT PORTCINT
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#define CLKI_PIN PINCINT
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#define CLKI_BIT INT1
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#define ICP0_DDR DDRCINT
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#define ICP0_PORT PORTCINT
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#define ICP0_PIN PINCINT
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#define ICP0_BIT INT1
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#define OC0B_DDR DDRCINT
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#define OC0B_PORT PORTCINT
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#define OC0B_PIN PINCINT
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#define OC0B_BIT INT1
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#define ADC1_DDR DDRCINT
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#define ADC1_PORT PORTCINT
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#define ADC1_PIN PINCINT
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#define ADC1_BIT INT1
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#define AIN1_DDR DDRCINT
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#define AIN1_PORT PORTCINT
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#define AIN1_PIN PINCINT
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#define AIN1_BIT INT1
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#define PB1_DDR DDRCINT
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#define PB1_PORT PORTCINT
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#define PB1_PIN PINCINT
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#define CLKO_DDR DDRT
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#define CLKO_PORT PORTT
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#define CLKO_PIN PINT
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#define PCINT2_DDR DDRT
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#define PCINT2_PORT PORTT
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#define PCINT2_PIN PINT
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#define PCINT2_BIT T0
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#define INT0_DDR DDRT
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#define INT0_PORT PORTT
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#define INT0_PIN PINT
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#define ADC2_DDR DDRT
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#define ADC2_PORT PORTT
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#define ADC2_PIN PINT
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#define PB2_PORT PORTT
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#define PCINT3_DDR DDRRESET
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#define PCINT3_PORT PORTRESET
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#define PCINT3_PIN PINRESET
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#define PCINT3_BIT RESET
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#define ADC3_DDR DDRRESET
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#define ADC3_PORT PORTRESET
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#define ADC3_PIN PINRESET
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#define ADC3_BIT RESET
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#define PB3_DDR DDRRESET
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#define PB3_PORT PORTRESET
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#define PB3_PIN PINRESET
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#define PB3_BIT RESET
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#endif /* _AVR_ATtiny4_H_ */
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removed
include/avr/iotn4.h
