989
989
/* Interrupt vectors */
990
990
/* Vector 0 is the reset vector */
991
992
/* External Interrupt Request 0 */
993
#define INT0_vect_num 1
992
994
#define INT0_vect _VECTOR(1)
993
995
#define SIG_INTERRUPT0 _VECTOR(1)
995
997
/* Pin Change Interrupt Request 0 */
998
#define PCINT0_vect_num 2
996
999
#define PCINT0_vect _VECTOR(2)
997
1000
#define SIG_PIN_CHANGE0 _VECTOR(2)
999
1002
/* Pin Change Interrupt Request 1 */
1003
#define PCINT1_vect_num 3
1000
1004
#define PCINT1_vect _VECTOR(3)
1001
1005
#define SIG_PIN_CHANGE1 _VECTOR(3)
1003
1007
/* Timer/Counter2 Compare Match */
1008
#define TIMER2_COMP_vect_num 4
1004
1009
#define TIMER2_COMP_vect _VECTOR(4)
1005
1010
#define SIG_OUTPUT_COMPARE2 _VECTOR(4)
1007
1012
/* Timer/Counter2 Overflow */
1013
#define TIMER2_OVF_vect_num 5
1008
1014
#define TIMER2_OVF_vect _VECTOR(5)
1009
1015
#define SIG_OVERFLOW2 _VECTOR(5)
1011
1017
/* Timer/Counter1 Capture Event */
1018
#define TIMER1_CAPT_vect_num 6
1012
1019
#define TIMER1_CAPT_vect _VECTOR(6)
1013
1020
#define SIG_INPUT_CAPTURE1 _VECTOR(6)
1015
1022
/* Timer/Counter1 Compare Match A */
1023
#define TIMER1_COMPA_vect_num 7
1016
1024
#define TIMER1_COMPA_vect _VECTOR(7)
1017
1025
#define SIG_OUTPUT_COMPARE1A _VECTOR(7)
1019
1027
/* Timer/Counter Compare Match B */
1028
#define TIMER1_COMPB_vect_num 8
1020
1029
#define TIMER1_COMPB_vect _VECTOR(8)
1021
1030
#define SIG_OUTPUT_COMPARE1B _VECTOR(8)
1023
1032
/* Timer/Counter1 Overflow */
1033
#define TIMER1_OVF_vect_num 9
1024
1034
#define TIMER1_OVF_vect _VECTOR(9)
1025
1035
#define SIG_OVERFLOW1 _VECTOR(9)
1027
1037
/* Timer/Counter0 Compare Match */
1038
#define TIMER0_COMP_vect_num 10
1028
1039
#define TIMER0_COMP_vect _VECTOR(10)
1029
1040
#define SIG_OUTPUT_COMPARE0 _VECTOR(10)
1031
1042
/* Timer/Counter0 Overflow */
1043
#define TIMER0_OVF_vect_num 11
1032
1044
#define TIMER0_OVF_vect _VECTOR(11)
1033
1045
#define SIG_OVERFLOW0 _VECTOR(11)
1035
1047
/* SPI Serial Transfer Complete */
1048
#define SPI_STC_vect_num 12
1036
1049
#define SPI_STC_vect _VECTOR(12)
1037
1050
#define SIG_SPI _VECTOR(12)
1039
1052
/* USART, Rx Complete */
1053
#define USART_RX_vect_num 13
1040
1054
#define USART_RX_vect _VECTOR(13)
1041
1055
#define SIG_UART_RECV _VECTOR(13)
1043
1057
/* USART Data register Empty */
1058
#define USART_UDRE_vect_num 14
1044
1059
#define USART_UDRE_vect _VECTOR(14)
1045
1060
#define SIG_UART_DATA _VECTOR(14)
1047
1062
/* USART0, Tx Complete */
1063
#define USART0_TX_vect_num 15
1048
1064
#define USART0_TX_vect _VECTOR(15)
1049
1065
#define SIG_UART_TRANS _VECTOR(15)
1051
1067
/* USI Start Condition */
1068
#define USI_START_vect_num 16
1052
1069
#define USI_START_vect _VECTOR(16)
1053
1070
#define SIG_USI_START _VECTOR(16)
1055
1072
/* USI Overflow */
1073
#define USI_OVERFLOW_vect_num 17
1056
1074
#define USI_OVERFLOW_vect _VECTOR(17)
1057
1075
#define SIG_USI_OVERFLOW _VECTOR(17)
1059
1077
/* Analog Comparator */
1078
#define ANALOG_COMP_vect_num 18
1060
1079
#define ANALOG_COMP_vect _VECTOR(18)
1061
1080
#define SIG_COMPARATOR _VECTOR(18)
1063
1082
/* ADC Conversion Complete */
1083
#define ADC_vect_num 19
1064
1084
#define ADC_vect _VECTOR(19)
1065
1085
#define SIG_ADC _VECTOR(19)
1067
1087
/* EEPROM Ready */
1088
#define EE_READY_vect_num 20
1068
1089
#define EE_READY_vect _VECTOR(20)
1069
1090
#define SIG_EEPROM_READY _VECTOR(20)
1071
1092
/* Store Program Memory Read */
1093
#define SPM_READY_vect_num 21
1072
1094
#define SPM_READY_vect _VECTOR(21)
1073
1095
#define SIG_SPM_READY _VECTOR(21)
1075
1097
/* LCD Start of Frame */
1098
#define LCD_vect_num 22
1076
1099
#define LCD_vect _VECTOR(22)
1077
1100
#define SIG_LCD _VECTOR(22)
1079
1102
/* Pin Change Interrupt Request 2 */
1103
#define PCINT2_vect_num 23
1080
1104
#define PCINT2_vect _VECTOR(23)
1081
1105
#define SIG_PIN_CHANGE2 _VECTOR(23)
1083
1107
/* Pin Change Interrupt Request 3 */
1108
#define PCINT3_vect_num 24
1084
1109
#define PCINT3_vect _VECTOR(24)
1085
1110
#define SIG_PIN_CHANGE3 _VECTOR(24)