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  • Committer: Bazaar Package Importer
  • Author(s): Vince Mulhollon
  • Date: 2007-04-13 20:16:15 UTC
  • mfrom: (1.1.7 upstream) (2.1.3 lenny)
  • Revision ID: james.westby@ubuntu.com-20070413201615-jiar46bgkrs0dw2h
Tags: 3.7.0-1
* New upstream released 03-Feb-2007
* i7094 added which emulates the IBM 7090/7094
* Upstream has converted almost entirely to pdf format for docs
* All manpages updated
* All docs are registered with the doc-base system

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Lines of Context:
PDP11/pdp11_tc.c
640
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641
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    case DTS_OFR:                                       /* off reel */
642
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        if (dir) newpos = -1000;                        /* rev? < start */
643
 
        else newpos = DTU_FWDEZ (uptr) + DT_EZLIN + 1000;       /* fwd? > end */
 
643
        else newpos = DTU_FWDEZ (uptr) + DT_EZLIN + 1000; /* fwd? > end */
644
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        break;
645
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    case FNC_SRCH:                                      /* search */
811
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            return IORETURN (dt_stopoffr, STOP_DTOFF);
812
812
        uptr->STATE = DTS_NXTSTA (uptr->STATE);         /* advance state */
813
813
        if (uptr->STATE)                                /* not stopped? */
814
 
            sim_activate (uptr, dt_dctime - (dt_dctime >> 2));  /* reversing */
 
814
            sim_activate (uptr, dt_dctime - (dt_dctime >> 2)); /* reversing */
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815
        return SCPE_OK;
816
816
 
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    case DTS_ACCF: case DTS_ACCR:                       /* accelerating */
1061
1061
 
1062
1062
if (wrd == DT_BLKWD) return blk;                        /* fwd blknum */
1063
1063
if (wrd == DT_CSMWD) return 077;                        /* rev csum */
1064
 
if (wrd == (2 * DT_HTWRD + DTU_BSIZE (uptr) - DT_CSMWD - 1))    /* fwd csum */
 
1064
if (wrd == (2 * DT_HTWRD + DTU_BSIZE (uptr) - DT_CSMWD - 1)) /* fwd csum */
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    return (dt_csum (uptr, blk) << 12);
1066
 
if (wrd == (2 * DT_HTWRD + DTU_BSIZE (uptr) - DT_BLKWD - 1))    /* rev blkno */
 
1066
if (wrd == (2 * DT_HTWRD + DTU_BSIZE (uptr) - DT_BLKWD - 1)) /* rev blkno */
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    return dt_comobv (blk);
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return 0;                                               /* all others */
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1069
}
1107
1107
#define BOOT_LEN        (sizeof (boot_rom) / sizeof (int16))
1108
1108
 
1109
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static const uint16 boot_rom[] = {
1110
 
    0042124,                            /* "TD" */
1111
 
    0012706, BOOT_START,                /* MOV #boot_start, SP */
1112
 
    0012700, 0000000,                   /* MOV #unit, R0        ; unit number */
1113
 
    0010003,                            /* MOV R0, R3 */
1114
 
    0000303,                            /* SWAB R3 */
1115
 
    0012701, 0177342,                   /* MOV #TCCM, R1        ; csr */
1116
 
    0012702, 0004003,                   /* RW: MOV #4003, R2    ; rev+rnum+go */
1117
 
    0050302,                            /* BIS R3, R2 */
1118
 
    0010211,                            /* MOV R2, (R1)         ; load csr */
1119
 
    0032711, 0100200,                   /* BIT #100200, (R1)    ; wait */
1120
 
    0001775,                            /* BEQ .-4 */
1121
 
    0100370,                            /* BPL RW               ; no err, cont */
1122
 
    0005761, 0177776,                   /* TST -2(R1)           ; end zone? */
1123
 
    0100036,                            /* BPL ER               ; no, err */
1124
 
    0012702, 0000003,                   /* MOV #3, R2           ; rnum+go */
1125
 
    0050302,                            /* BIS R3, R2 */
1126
 
    0010211,                            /* MOV R2, (R1)         ; load csr */
1127
 
    0032711, 0100200,                   /* BIT #100200, (R1)    ; wait */
1128
 
    0001775,                            /* BEQ .-4 */
1129
 
    0100426,                            /* BMI ER               ; err, die */
1130
 
    0005761, 0000006,                   /* TST 6(R1)            ; blk 0? */
1131
 
    0001023,                            /* BNE ER               ; no, die */
1132
 
    0012761, 0177000, 0000002,          /* MOV #-256.*2, 2(R1)  ; load wc */
1133
 
    0005061, 0000004,                   /* CLR 4(R1)            ; clear ba */
1134
 
    0012702, 0000005,                   /* MOV #READ+GO, R2     ; read & go */
1135
 
    0050302,                            /* BIS R3, R2 */
1136
 
    0010211,                            /* MOV R2, (R1)         ; load csr */
1137
 
    0005002,                            /* CLR R2 */
1138
 
    0005003,                            /* CLR R3 */
1139
 
    0012704, BOOT_START+020,            /* MOV #START+20, R4 */
1140
 
    0005005,                            /* CLR R5 */
1141
 
    0032711, 0100200,                   /* BIT #100200, (R1)    ; wait */
1142
 
    0001775,                            /* BEQ .-4 */
1143
 
    0100401,                            /* BMI ER               ; err, die */
1144
 
    0005007,                            /* CLR PC */
1145
 
    0012711, 0000001,                   /* ER: MOV #1, (R1)     ; stop all */
1146
 
    0000000                             /* HALT */
 
1110
    0042124,                        /* "TD" */
 
1111
    0012706, BOOT_START,            /* MOV #boot_start, SP */
 
1112
    0012700, 0000000,               /* MOV #unit, R0        ; unit number */
 
1113
    0010003,                        /* MOV R0, R3 */
 
1114
    0000303,                        /* SWAB R3 */
 
1115
    0012701, 0177342,               /* MOV #TCCM, R1        ; csr */
 
1116
    0012702, 0004003,               /* RW: MOV #4003, R2    ; rev+rnum+go */
 
1117
    0050302,                        /* BIS R3, R2 */
 
1118
    0010211,                        /* MOV R2, (R1)         ; load csr */
 
1119
    0032711, 0100200,               /* BIT #100200, (R1)    ; wait */
 
1120
    0001775,                        /* BEQ .-4 */
 
1121
    0100370,                        /* BPL RW               ; no err, cont */
 
1122
    0005761, 0177776,               /* TST -2(R1)           ; end zone? */
 
1123
    0100036,                        /* BPL ER               ; no, err */
 
1124
    0012702, 0000003,               /* MOV #3, R2           ; rnum+go */
 
1125
    0050302,                        /* BIS R3, R2 */
 
1126
    0010211,                        /* MOV R2, (R1)         ; load csr */
 
1127
    0032711, 0100200,               /* BIT #100200, (R1)    ; wait */
 
1128
    0001775,                        /* BEQ .-4 */
 
1129
    0100426,                        /* BMI ER               ; err, die */
 
1130
    0005761, 0000006,               /* TST 6(R1)            ; blk 0? */
 
1131
    0001023,                        /* BNE ER               ; no, die */
 
1132
    0012761, 0177000, 0000002,      /* MOV #-256.*2, 2(R1)  ; load wc */
 
1133
    0005061, 0000004,               /* CLR 4(R1)            ; clear ba */
 
1134
    0012702, 0000005,               /* MOV #READ+GO, R2     ; read & go */
 
1135
    0050302,                        /* BIS R3, R2 */
 
1136
    0010211,                        /* MOV R2, (R1)         ; load csr */
 
1137
    0005002,                        /* CLR R2 */
 
1138
    0005003,                        /* CLR R3 */
 
1139
    0012704, BOOT_START+020,        /* MOV #START+20, R4 */
 
1140
    0005005,                        /* CLR R5 */
 
1141
    0032711, 0100200,               /* BIT #100200, (R1)    ; wait */
 
1142
    0001775,                        /* BEQ .-4 */
 
1143
    0100401,                        /* BMI ER               ; err, die */
 
1144
    0005007,                        /* CLR PC */
 
1145
    0012711, 0000001,               /* ER: MOV #1, (R1)     ; stop all */
 
1146
    0000000                         /* HALT */
1147
1147
    };
1148
1148
 
1149
1149
t_stat dt_boot (int32 unitno, DEVICE *dptr)
1179
1179
r = attach_unit (uptr, cptr);                           /* attach */
1180
1180
if (r != SCPE_OK) return r;                             /* fail? */
1181
1181
if ((sim_switches & SIM_SW_REST) == 0) {                /* not from rest? */
1182
 
    uptr->flags = (uptr->flags | UNIT_11FMT) & ~UNIT_8FMT;      /* default 16b */
 
1182
    uptr->flags = (uptr->flags | UNIT_11FMT) & ~UNIT_8FMT; /* default 16b */
1183
1183
    if (sim_switches & SWMASK ('T'))                    /* att 12b? */
1184
1184
        uptr->flags = (uptr->flags | UNIT_8FMT) & ~UNIT_11FMT;
1185
1185
    else if (sim_switches & SWMASK ('F'))               /* att 18b? */