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Viewing changes to host/lib/usrp/x300/x300_regs.hpp

  • Committer: Package Import Robot
  • Author(s): A. Maitland Bottoms
  • Date: 2014-07-01 22:34:32 UTC
  • mfrom: (9.1.11 sid)
  • Revision ID: package-import@ubuntu.com-20140701223432-beg73ip3q8b3lgeg
Tags: 3.7.1-2
* Apply maint branch fixes through release_003_007_001-49-gdf4cf6d
* Fix B2xx udev rules

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host/lib/usrp/x300/x300_regs.hpp
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#ifndef INCLUDED_X300_REGS_HPP
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#define INCLUDED_X300_REGS_HPP
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#include <stdint.h>
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#include <boost/cstdint.hpp>
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#define TOREG(x) ((x)*4)
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static const uint32_t FPGA_CNTR_LO_REG      = PCIE_FPGA_REG(0x0004);
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static const uint32_t FPGA_CNTR_HI_REG      = PCIE_FPGA_REG(0x0008);
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static const uint32_t FPGA_CNTR_FREQ_REG    = PCIE_FPGA_REG(0x000C);
 
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static const uint32_t FPGA_STATUS_REG       = PCIE_FPGA_REG(0x0020);
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static const uint32_t FPGA_USR_SIG_REG_BASE = PCIE_FPGA_REG(0x0030);
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static const uint32_t FPGA_USR_SIG_REG_SIZE = 16;
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static const uint32_t FPGA_STATUS_DMA_ACTIVE_MASK = 0x3F3F0000;
 
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static const uint32_t PCIE_TX_DMA_REG_BASE  = PCIE_FPGA_REG(0x0200);
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static const uint32_t PCIE_RX_DMA_REG_BASE  = PCIE_FPGA_REG(0x0400);
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#define PCIE_TX_DMA_REG(REG, CHAN)          (PCIE_TX_DMA_REG_BASE + (CHAN*DMA_REG_GRP_SIZE) + REG)
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#define PCIE_RX_DMA_REG(REG, CHAN)          (PCIE_RX_DMA_REG_BASE + (CHAN*DMA_REG_GRP_SIZE) + REG)
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static const uint32_t DMA_CTRL_RESET        = 1;
 
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static const uint32_t DMA_CTRL_DISABLED     = 0x00000000;
 
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static const uint32_t DMA_CTRL_ENABLED      = 0x00000002;
 
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static const uint32_t DMA_CTRL_CLEAR_STB    = 0x00000001;
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static const uint32_t DMA_CTRL_SW_BUF_U64   = (3 << 4);
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static const uint32_t DMA_CTRL_SW_BUF_U32   = (2 << 4);
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static const uint32_t DMA_CTRL_SW_BUF_U16   = (1 << 4);
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static const uint32_t DMA_CTRL_SW_BUF_U8    = (0 << 4);
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static const uint32_t DMA_STATUS_ERROR      = 1;
 
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static const uint32_t DMA_STATUS_ERROR      = 0x00000001;
 
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static const uint32_t DMA_STATUS_BUSY       = 0x00000002;
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static const uint32_t PCIE_ROUTER_REG_BASE  = PCIE_FPGA_REG(0x0500);
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#define PCIE_ROUTER_REG(X)                  (PCIE_ROUTER_REG_BASE + X)