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Viewing changes to drivers/net/altera_tse.c

  • Committer: Package Import Robot
  • Author(s): Clint Adams
  • Date: 2012-01-02 17:49:39 UTC
  • mfrom: (1.2.7)
  • Revision ID: package-import@ubuntu.com-20120102174939-iddq37p3372x10yp
Tags: 2011.12-1
* New upstream version.
  - Drop build-timestamp_autogenerated.h-without-config.patch (merged).
  - Drop ublimage-NAND-block-size-isn-t-set-at-build-time.patch (merged).
  - Update kerma-sheevaplug-mvsdio.diff
  - Update mipsel-native-endianness.diff
  - Drop dreamplug-v8.patch (merged).

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Lines of Context:
drivers/net/altera_tse.c
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                debug("Timeout waiting sgdma in do async!\n");
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        /*
 
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         * Clear the RUN bit in the control register. This is needed
 
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         * to restart the SGDMA engine later on.
 
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         */
 
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        dev->control = 0;
 
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        /*
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         * Clear any (previous) status register information
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         * that might occlude our error checking later.
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         */
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                /* setup the sgdma */
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                alt_sgdma_do_async_transfer(priv->sgdma_rx, &rx_desc[0]);
 
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                return packet_length;
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        }
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        return -1;
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        if (counter >= ALT_TSE_SGDMA_BUSY_WATCHDOG_CNTR) {
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                debug("Timeout waiting for rx sgdma!\n");
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                rx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
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                rx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
 
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                rx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
 
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                rx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
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        }
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        counter = 0;
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        if (counter >= ALT_TSE_SGDMA_BUSY_WATCHDOG_CNTR) {
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                debug("Timeout waiting for tx sgdma!\n");
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                tx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
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                tx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
 
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                tx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
 
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                tx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
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        }
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        /* reset the mac */
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        mac_dev->command_config.bits.transmit_enable = 1;
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{
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        uint mii_data = tse_mdio_read(priv, mii_reg);
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        mii_data &= 0xfff0;
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        mii_data |= 0xb;
 
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        if ((priv->flags >= 1) && (priv->flags <= 4))
 
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                mii_data |= 0xb;
 
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        else if (priv->flags == 5)
 
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                mii_data |= 0x4;
 
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        return mii_data;
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}
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{
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        uint mii_data = tse_mdio_read(priv, mii_reg);
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        mii_data &= ~0x82;
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        mii_data |= 0x82;
 
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        if ((priv->flags >= 1) && (priv->flags <= 4))
 
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                mii_data |= 0x82;
 
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        return mii_data;
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}
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/* TSE init code */
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int altera_tse_initialize(u8 dev_num, int mac_base,
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                          int sgdma_rx_base, int sgdma_tx_base)
 
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                          int sgdma_rx_base, int sgdma_tx_base,
 
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                          u32 sgdma_desc_base, u32 sgdma_desc_size)
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{
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        struct altera_tse_priv *priv;
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        struct eth_device *dev;
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                free(dev);
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                return 0;
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        }
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        tx_desc = dma_alloc_coherent(sizeof(*tx_desc) * (3 + PKTBUFSRX),
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                                     &dma_handle);
 
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        if (sgdma_desc_size) {
 
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                if (sgdma_desc_size < (sizeof(*tx_desc) * (3 + PKTBUFSRX))) {
 
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                        printf("ALTERA_TSE-%hu: "
 
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                               "descriptor memory is too small\n", dev_num);
 
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                        free(priv);
 
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                        free(dev);
 
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                        return 0;
 
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                }
 
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                tx_desc = (struct alt_sgdma_descriptor *)sgdma_desc_base;
 
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        } else {
 
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                tx_desc = dma_alloc_coherent(sizeof(*tx_desc) * (3 + PKTBUFSRX),
 
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                                             &dma_handle);
 
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        }
 
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        rx_desc = tx_desc + 2;
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        debug("tx desc: address = 0x%x\n", (unsigned int)tx_desc);
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        debug("rx desc: address = 0x%x\n", (unsigned int)rx_desc);