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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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* Dave Liu <daveliu@freescale.com>
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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#include <asm/errno.h>
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#include "../../qe/qe.h" /* For struct qe_firmware */
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#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
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#elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
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#include <spi_flash.h>
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#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_MMC)
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struct fm_muram muram[CONFIG_SYS_NUM_FMAN];
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u32 fm_muram_base(int fm_idx)
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return muram[fm_idx].base;
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u32 fm_muram_alloc(int fm_idx, u32 size, u32 align)
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align_mask = align - 1;
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save = muram[fm_idx].alloc;
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off = save & align_mask;
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muram[fm_idx].alloc += (align - off);
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off = size & align_mask;
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size += (align - off);
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if ((muram[fm_idx].alloc + size) >= muram[fm_idx].top) {
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muram[fm_idx].alloc = save;
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printf("%s: run out of ram.\n", __func__);
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ret = muram[fm_idx].alloc;
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muram[fm_idx].alloc += size;
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memset((void *)ret, 0, size);
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static void fm_init_muram(int fm_idx, void *reg)
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muram[fm_idx].base = base;
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muram[fm_idx].size = CONFIG_SYS_FM_MURAM_SIZE;
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muram[fm_idx].alloc = base + FM_MURAM_RES_SIZE;
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muram[fm_idx].top = base + CONFIG_SYS_FM_MURAM_SIZE;
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* fm_upload_ucode - Fman microcode upload worker function
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* This function does the actual uploading of an Fman microcode
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static void fm_upload_ucode(int fm_idx, struct fm_imem *imem,
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u32 *ucode, unsigned int size)
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unsigned int timeout = 1000000;
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/* enable address auto increase */
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out_be32(&imem->iadd, IRAM_IADD_AIE);
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/* write microcode to IRAM */
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for (i = 0; i < size / 4; i++)
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out_be32(&imem->idata, ucode[i]);
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/* verify if the writing is over */
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out_be32(&imem->iadd, 0);
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while ((in_be32(&imem->idata) != ucode[0]) && --timeout)
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printf("Fman%u: microcode upload timeout\n", fm_idx + 1);
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/* enable microcode from IRAM */
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out_be32(&imem->iready, IRAM_READY);
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* Upload an Fman firmware
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* This function is similar to qe_upload_firmware(), exception that it uploads
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* a microcode to the Fman instead of the QE.
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* Because the process for uploading a microcode to the Fman is similar for
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* that of the QE, the QE firmware binary format is used for Fman microcode.
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* It should be possible to unify these two functions, but for now we keep them
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static int fman_upload_firmware(int fm_idx,
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struct fm_imem *fm_imem,
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const struct qe_firmware *firmware)
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size_t calc_size = sizeof(struct qe_firmware);
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const struct qe_header *hdr;
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printf("Fman%u: Invalid address for firmware\n", fm_idx + 1);
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hdr = &firmware->header;
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length = be32_to_cpu(hdr->length);
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/* Check the magic */
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if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
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(hdr->magic[2] != 'F')) {
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printf("Fman%u: Data at %p is not a firmware\n", fm_idx + 1,
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/* Check the version */
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if (hdr->version != 1) {
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printf("Fman%u: Unsupported firmware version %u\n", fm_idx + 1,
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/* Validate some of the fields */
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if ((firmware->count != 1)) {
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printf("Fman%u: Invalid data in firmware header\n", fm_idx + 1);
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/* Validate the length and check if there's a CRC */
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calc_size += (firmware->count - 1) * sizeof(struct qe_microcode);
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for (i = 0; i < firmware->count; i++)
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* For situations where the second RISC uses the same microcode
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* as the first, the 'code_offset' and 'count' fields will be
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* zero, so it's okay to add those.
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calc_size += sizeof(u32) *
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be32_to_cpu(firmware->microcode[i].count);
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/* Validate the length */
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if (length != calc_size + sizeof(u32)) {
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printf("Fman%u: Invalid length in firmware header\n",
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* Validate the CRC. We would normally call crc32_no_comp(), but that
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* function isn't available unless you turn on JFFS support.
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crc = be32_to_cpu(*(u32 *)((void *)firmware + calc_size));
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if (crc != (crc32(-1, (const void *)firmware, calc_size) ^ -1)) {
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printf("Fman%u: Firmware CRC is invalid\n", fm_idx + 1);
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/* Loop through each microcode. */
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for (i = 0; i < firmware->count; i++) {
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const struct qe_microcode *ucode = &firmware->microcode[i];
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/* Upload a microcode if it's present */
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if (ucode->code_offset) {
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printf("Fman%u: Uploading microcode version %u.%u.%u\n",
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fm_idx + 1, ucode->major, ucode->minor,
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code = (void *)firmware + ucode->code_offset;
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ucode_size = sizeof(u32) * ucode->count;
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fm_upload_ucode(fm_idx, fm_imem, code, ucode_size);
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static u32 fm_assign_risc(int port_id)
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risc_sel = (port_id & 0x1) ? FMFPPRC_RISC2 : FMFPPRC_RISC1;
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val = (port_id << FMFPPRC_PORTID_SHIFT) & FMFPPRC_PORTID_MASK;
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val |= ((risc_sel << FMFPPRC_ORA_SHIFT) | risc_sel);
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static void fm_init_fpm(struct fm_fpm *fpm)
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setbits_be32(&fpm->fmfpee, FMFPEE_EHM | FMFPEE_UEC |
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FMFPEE_CER | FMFPEE_DER);
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/* IM mode, each even port ID to RISC#1, each odd port ID to RISC#2 */
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/* offline/parser port */
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for (i = 0; i < MAX_NUM_OH_PORT; i++) {
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port_id = OH_PORT_ID_BASE + i;
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val = fm_assign_risc(port_id);
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out_be32(&fpm->fpmprc, val);
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for (i = 0; i < MAX_NUM_RX_PORT_1G; i++) {
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port_id = RX_PORT_1G_BASE + i;
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val = fm_assign_risc(port_id);
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out_be32(&fpm->fpmprc, val);
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for (i = 0; i < MAX_NUM_TX_PORT_1G; i++) {
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port_id = TX_PORT_1G_BASE + i;
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val = fm_assign_risc(port_id);
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out_be32(&fpm->fpmprc, val);
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port_id = RX_PORT_10G_BASE;
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val = fm_assign_risc(port_id);
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out_be32(&fpm->fpmprc, val);
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port_id = TX_PORT_10G_BASE;
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val = fm_assign_risc(port_id);
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out_be32(&fpm->fpmprc, val);
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/* disable the dispatch limit in IM case */
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out_be32(&fpm->fpmflc, FMFP_FLC_DISP_LIM_NONE);
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out_be32(&fpm->fmfpee, FMFPEE_CLEAR_EVENT);
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/* clear risc events */
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for (i = 0; i < 4; i++)
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out_be32(&fpm->fpmcev[i], 0xffffffff);
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out_be32(&fpm->fpmrcr, FMFP_RCR_MDEC | FMFP_RCR_IDEC);
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static int fm_init_bmi(int fm_idx, struct fm_bmi_common *bmi)
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u32 val, offset, base;
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/* alloc free buffer pool in MURAM */
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base = fm_muram_alloc(fm_idx, FM_FREE_POOL_SIZE, FM_FREE_POOL_ALIGN);
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printf("%s: no muram for free buffer pool\n", __func__);
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offset = base - fm_muram_base(fm_idx);
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/* Need 128KB total free buffer pool size */
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blk = FM_FREE_POOL_SIZE / 256;
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/* in IM, we must not begin from offset 0 in MURAM */
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val |= ((blk - 1) << FMBM_CFG1_FBPS_SHIFT);
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out_be32(&bmi->fmbm_cfg1, val);
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/* disable all BMI interrupt */
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out_be32(&bmi->fmbm_ier, FMBM_IER_DISABLE_ALL);
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/* clear all events */
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out_be32(&bmi->fmbm_ievr, FMBM_IEVR_CLEAR_ALL);
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* set port parameters - FMBM_PP_x
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* max tasks 10G Rx/Tx=12, 1G Rx/Tx 4, others is 1
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* max dma 10G Rx/Tx=3, others is 1
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* set port FIFO size - FMBM_PFS_x
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* 4KB for all Rx and Tx ports
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/* offline/parser port */
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for (i = 0; i < MAX_NUM_OH_PORT; i++) {
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port_id = OH_PORT_ID_BASE + i - 1;
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/* max tasks=1, max dma=1, no extra */
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out_be32(&bmi->fmbm_pp[port_id], 0);
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/* port FIFO size - 256 bytes, no extra */
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out_be32(&bmi->fmbm_pfs[port_id], 0);
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for (i = 0; i < MAX_NUM_RX_PORT_1G; i++) {
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port_id = RX_PORT_1G_BASE + i - 1;
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/* max tasks=4, max dma=1, no extra */
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out_be32(&bmi->fmbm_pp[port_id], FMBM_PP_MXT(4));
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/* FIFO size - 4KB, no extra */
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out_be32(&bmi->fmbm_pfs[port_id], FMBM_PFS_IFSZ(0xf));
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/* Tx 1G port FIFO size - 4KB, no extra */
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for (i = 0; i < MAX_NUM_TX_PORT_1G; i++) {
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port_id = TX_PORT_1G_BASE + i - 1;
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/* max tasks=4, max dma=1, no extra */
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out_be32(&bmi->fmbm_pp[port_id], FMBM_PP_MXT(4));
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/* FIFO size - 4KB, no extra */
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out_be32(&bmi->fmbm_pfs[port_id], FMBM_PFS_IFSZ(0xf));
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port_id = RX_PORT_10G_BASE - 1;
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/* max tasks=12, max dma=3, no extra */
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out_be32(&bmi->fmbm_pp[port_id], FMBM_PP_MXT(12) | FMBM_PP_MXD(3));
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/* FIFO size - 4KB, no extra */
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out_be32(&bmi->fmbm_pfs[port_id], FMBM_PFS_IFSZ(0xf));
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port_id = TX_PORT_10G_BASE - 1;
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/* max tasks=12, max dma=3, no extra */
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out_be32(&bmi->fmbm_pp[port_id], FMBM_PP_MXT(12) | FMBM_PP_MXD(3));
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/* FIFO size - 4KB, no extra */
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out_be32(&bmi->fmbm_pfs[port_id], FMBM_PFS_IFSZ(0xf));
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/* initialize internal buffers data base (linked list) */
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out_be32(&bmi->fmbm_init, FMBM_INIT_START);
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static void fm_init_qmi(struct fm_qmi_common *qmi)
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/* disable enqueue and dequeue of QMI */
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clrbits_be32(&qmi->fmqm_gc, FMQM_GC_ENQ_EN | FMQM_GC_DEQ_EN);
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/* disable all error interrupts */
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out_be32(&qmi->fmqm_eien, FMQM_EIEN_DISABLE_ALL);
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/* clear all error events */
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out_be32(&qmi->fmqm_eie, FMQM_EIE_CLEAR_ALL);
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/* disable all interrupts */
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out_be32(&qmi->fmqm_ien, FMQM_IEN_DISABLE_ALL);
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/* clear all interrupts */
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out_be32(&qmi->fmqm_ie, FMQM_IE_CLEAR_ALL);
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/* Init common part of FM, index is fm num# like fm as above */
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int fm_init_common(int index, struct ccsr_fman *reg)
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#if defined(CONFIG_SYS_QE_FMAN_FW_IN_NOR)
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void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR;
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#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_NAND)
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size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
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void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
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rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_ADDR,
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&fw_length, (u_char *)addr);
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if (rc == -EUCLEAN) {
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printf("NAND read of FMAN firmware at offset 0x%x failed %d\n",
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CONFIG_SYS_QE_FMAN_FW_ADDR, rc);
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#elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
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struct spi_flash *ucode_flash;
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void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
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ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
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CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
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printf("SF: probe for ucode failed\n");
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ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FMAN_FW_ADDR,
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CONFIG_SYS_QE_FMAN_FW_LENGTH, addr);
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printf("SF: read for ucode failed\n");
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spi_flash_free(ucode_flash);
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#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_MMC)
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int dev = CONFIG_SYS_MMC_ENV_DEV;
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void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
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u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512;
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u32 blk = CONFIG_SYS_QE_FMAN_FW_ADDR / 512;
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struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
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printf("\nMMC cannot find device for ucode\n");
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printf("\nMMC read: dev # %u, block # %u, count %u ...\n",
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(void)mmc->block_dev.block_read(dev, blk, cnt, addr);
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/* flush cache after read */
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flush_cache((ulong)addr, cnt * 512);
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/* Upload the Fman microcode if it's present */
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rc = fman_upload_firmware(index, ®->fm_imem, addr);
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sprintf(env_addr, "0x%lx", (long unsigned int)addr);
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setenv("fman_ucode", env_addr);
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fm_init_muram(index, ®->muram);
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fm_init_qmi(®->fm_qmi_common);
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fm_init_fpm(®->fm_fpm);
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/* clear DMA status */
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setbits_be32(®->fm_dma.fmdmsr, FMDMSR_CLEAR_ALL);
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setbits_be32(®->fm_dma.fmdmmr, FMDMMR_SBER);
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return fm_init_bmi(index, ®->fm_bmi_common);