32
by bellard
added flags computation optimization |
1 |
/* Interface between the opcode library and its callers.
|
2 |
Written by Cygnus Support, 1993.
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3 |
||
4 |
The opcode library (libopcodes.a) provides instruction decoders for
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5 |
a large variety of instruction sets, callable with an identical
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6 |
interface, for making instruction-processing programs more independent
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7 |
of the instruction set being processed. */
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8 |
||
9 |
#ifndef DIS_ASM_H
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10 |
#define DIS_ASM_H
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11 |
||
1184
by bellard
64 bit target support |
12 |
#include <stdlib.h> |
32
by bellard
added flags computation optimization |
13 |
#include <stdio.h> |
34
by bellard
ppc port |
14 |
#include <string.h> |
73
by bellard
bfd.h dependancy removed |
15 |
#include <inttypes.h> |
16 |
||
17 |
#define PARAMS(x) x
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18 |
typedef void *PTR; |
|
19 |
typedef uint64_t bfd_vma; |
|
667
by bellard
initial x86-64 host support (Gwenole Beauchesne) |
20 |
typedef int64_t bfd_signed_vma; |
73
by bellard
bfd.h dependancy removed |
21 |
typedef uint8_t bfd_byte; |
667
by bellard
initial x86-64 host support (Gwenole Beauchesne) |
22 |
#define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
|
5033
by blueswir1
Fix OpenBSD linker warnings |
23 |
#define snprintf_vma(s,ss,x) snprintf (s, ss, "%0" PRIx64, x)
|
73
by bellard
bfd.h dependancy removed |
24 |
|
1184
by bellard
64 bit target support |
25 |
#define BFD64
|
26 |
||
73
by bellard
bfd.h dependancy removed |
27 |
enum bfd_flavour { |
28 |
bfd_target_unknown_flavour, |
|
29 |
bfd_target_aout_flavour, |
|
30 |
bfd_target_coff_flavour, |
|
31 |
bfd_target_ecoff_flavour, |
|
32 |
bfd_target_elf_flavour, |
|
33 |
bfd_target_ieee_flavour, |
|
34 |
bfd_target_nlm_flavour, |
|
35 |
bfd_target_oasys_flavour, |
|
36 |
bfd_target_tekhex_flavour, |
|
37 |
bfd_target_srec_flavour, |
|
38 |
bfd_target_ihex_flavour, |
|
39 |
bfd_target_som_flavour, |
|
40 |
bfd_target_os9k_flavour, |
|
41 |
bfd_target_versados_flavour, |
|
42 |
bfd_target_msdos_flavour, |
|
43 |
bfd_target_evax_flavour
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|
44 |
};
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45 |
||
46 |
enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; |
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47 |
||
3163
by ths
find -type f | xargs sed -i 's/[\t ]$//g' # on most files |
48 |
enum bfd_architecture |
73
by bellard
bfd.h dependancy removed |
49 |
{
|
50 |
bfd_arch_unknown, /* File arch not known */ |
|
51 |
bfd_arch_obscure, /* Arch known, not one of these */ |
|
52 |
bfd_arch_m68k, /* Motorola 68xxx */ |
|
53 |
#define bfd_mach_m68000 1
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54 |
#define bfd_mach_m68008 2
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55 |
#define bfd_mach_m68010 3
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56 |
#define bfd_mach_m68020 4
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57 |
#define bfd_mach_m68030 5
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58 |
#define bfd_mach_m68040 6
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59 |
#define bfd_mach_m68060 7
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1598
by bellard
m68k disassembler (Paul Brook) |
60 |
#define bfd_mach_cpu32 8
|
61 |
#define bfd_mach_mcf5200 9
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62 |
#define bfd_mach_mcf5206e 10
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63 |
#define bfd_mach_mcf5307 11
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64 |
#define bfd_mach_mcf5407 12
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65 |
#define bfd_mach_mcf528x 13
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66 |
#define bfd_mach_mcfv4e 14
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67 |
#define bfd_mach_mcf521x 15
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68 |
#define bfd_mach_mcf5249 16
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|
69 |
#define bfd_mach_mcf547x 17
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|
70 |
#define bfd_mach_mcf548x 18
|
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3167
by ths
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. |
71 |
bfd_arch_vax, /* DEC Vax */ |
73
by bellard
bfd.h dependancy removed |
72 |
bfd_arch_i960, /* Intel 960 */ |
73 |
/* The order of the following is important.
|
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3163
by ths
find -type f | xargs sed -i 's/[\t ]$//g' # on most files |
74 |
lower number indicates a machine type that
|
73
by bellard
bfd.h dependancy removed |
75 |
only accepts a subset of the instructions
|
76 |
available to machines with higher numbers.
|
|
77 |
The exception is the "ca", which is
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3163
by ths
find -type f | xargs sed -i 's/[\t ]$//g' # on most files |
78 |
incompatible with all other machines except
|
73
by bellard
bfd.h dependancy removed |
79 |
"core". */
|
80 |
||
81 |
#define bfd_mach_i960_core 1
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82 |
#define bfd_mach_i960_ka_sa 2
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83 |
#define bfd_mach_i960_kb_sb 3
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|
84 |
#define bfd_mach_i960_mc 4
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|
85 |
#define bfd_mach_i960_xa 5
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|
86 |
#define bfd_mach_i960_ca 6
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|
87 |
#define bfd_mach_i960_jx 7
|
|
88 |
#define bfd_mach_i960_hx 8
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89 |
||
90 |
bfd_arch_a29k, /* AMD 29000 */ |
|
91 |
bfd_arch_sparc, /* SPARC */ |
|
92 |
#define bfd_mach_sparc 1
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212
by bellard
added ARM and Sparc disassemblers |
93 |
/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
|
73
by bellard
bfd.h dependancy removed |
94 |
#define bfd_mach_sparc_sparclet 2
|
95 |
#define bfd_mach_sparc_sparclite 3
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|
96 |
#define bfd_mach_sparc_v8plus 4
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212
by bellard
added ARM and Sparc disassemblers |
97 |
#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ |
98 |
#define bfd_mach_sparc_sparclite_le 6
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|
99 |
#define bfd_mach_sparc_v9 7
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|
100 |
#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ |
|
101 |
#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ |
|
102 |
#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ |
|
103 |
/* Nonzero if MACH has the v9 instruction set. */
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73
by bellard
bfd.h dependancy removed |
104 |
#define bfd_mach_sparc_v9_p(mach) \
|
212
by bellard
added ARM and Sparc disassemblers |
105 |
((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
|
106 |
&& (mach) != bfd_mach_sparc_sparclite_le)
|
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73
by bellard
bfd.h dependancy removed |
107 |
bfd_arch_mips, /* MIPS Rxxxx */ |
108 |
#define bfd_mach_mips3000 3000
|
|
109 |
#define bfd_mach_mips3900 3900
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|
110 |
#define bfd_mach_mips4000 4000
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|
111 |
#define bfd_mach_mips4010 4010
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112 |
#define bfd_mach_mips4100 4100
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113 |
#define bfd_mach_mips4300 4300
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|
114 |
#define bfd_mach_mips4400 4400
|
|
115 |
#define bfd_mach_mips4600 4600
|
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116 |
#define bfd_mach_mips4650 4650
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|
117 |
#define bfd_mach_mips5000 5000
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|
118 |
#define bfd_mach_mips6000 6000
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|
119 |
#define bfd_mach_mips8000 8000
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|
120 |
#define bfd_mach_mips10000 10000
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|
121 |
#define bfd_mach_mips16 16
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122 |
bfd_arch_i386, /* Intel 386 */ |
|
123 |
#define bfd_mach_i386_i386 0
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|
124 |
#define bfd_mach_i386_i8086 1
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|
667
by bellard
initial x86-64 host support (Gwenole Beauchesne) |
125 |
#define bfd_mach_i386_i386_intel_syntax 2
|
126 |
#define bfd_mach_x86_64 3
|
|
127 |
#define bfd_mach_x86_64_intel_syntax 4
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73
by bellard
bfd.h dependancy removed |
128 |
bfd_arch_we32k, /* AT&T WE32xxx */ |
129 |
bfd_arch_tahoe, /* CCI/Harris Tahoe */ |
|
130 |
bfd_arch_i860, /* Intel 860 */ |
|
131 |
bfd_arch_romp, /* IBM ROMP PC/RT */ |
|
132 |
bfd_arch_alliant, /* Alliant */ |
|
133 |
bfd_arch_convex, /* Convex */ |
|
134 |
bfd_arch_m88k, /* Motorola 88xxx */ |
|
135 |
bfd_arch_pyramid, /* Pyramid Technology */ |
|
136 |
bfd_arch_h8300, /* Hitachi H8/300 */ |
|
137 |
#define bfd_mach_h8300 1
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|
138 |
#define bfd_mach_h8300h 2
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|
139 |
#define bfd_mach_h8300s 3
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140 |
bfd_arch_powerpc, /* PowerPC */ |
|
1517
by bellard
ppc64 target |
141 |
#define bfd_mach_ppc 0
|
142 |
#define bfd_mach_ppc64 1
|
|
143 |
#define bfd_mach_ppc_403 403
|
|
144 |
#define bfd_mach_ppc_403gc 4030
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145 |
#define bfd_mach_ppc_505 505
|
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146 |
#define bfd_mach_ppc_601 601
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147 |
#define bfd_mach_ppc_602 602
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148 |
#define bfd_mach_ppc_603 603
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|
149 |
#define bfd_mach_ppc_ec603e 6031
|
|
150 |
#define bfd_mach_ppc_604 604
|
|
151 |
#define bfd_mach_ppc_620 620
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|
152 |
#define bfd_mach_ppc_630 630
|
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153 |
#define bfd_mach_ppc_750 750
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154 |
#define bfd_mach_ppc_860 860
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155 |
#define bfd_mach_ppc_a35 35
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156 |
#define bfd_mach_ppc_rs64ii 642
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157 |
#define bfd_mach_ppc_rs64iii 643
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158 |
#define bfd_mach_ppc_7400 7400
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73
by bellard
bfd.h dependancy removed |
159 |
bfd_arch_rs6000, /* IBM RS/6000 */ |
160 |
bfd_arch_hppa, /* HP PA RISC */ |
|
4188
by aurel32
HPPA (PA-RISC) host support |
161 |
#define bfd_mach_hppa10 10
|
162 |
#define bfd_mach_hppa11 11
|
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163 |
#define bfd_mach_hppa20 20
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164 |
#define bfd_mach_hppa20w 25
|
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73
by bellard
bfd.h dependancy removed |
165 |
bfd_arch_d10v, /* Mitsubishi D10V */ |
166 |
bfd_arch_z8k, /* Zilog Z8000 */ |
|
167 |
#define bfd_mach_z8001 1
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168 |
#define bfd_mach_z8002 2
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169 |
bfd_arch_h8500, /* Hitachi H8/500 */ |
|
170 |
bfd_arch_sh, /* Hitachi SH */ |
|
1854
by bellard
sh4 target (Samuel Tardieu) |
171 |
#define bfd_mach_sh 1
|
172 |
#define bfd_mach_sh2 0x20
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173 |
#define bfd_mach_sh_dsp 0x2d
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174 |
#define bfd_mach_sh2a 0x2a
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175 |
#define bfd_mach_sh2a_nofpu 0x2b
|
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176 |
#define bfd_mach_sh2e 0x2e
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73
by bellard
bfd.h dependancy removed |
177 |
#define bfd_mach_sh3 0x30
|
1854
by bellard
sh4 target (Samuel Tardieu) |
178 |
#define bfd_mach_sh3_nommu 0x31
|
179 |
#define bfd_mach_sh3_dsp 0x3d
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73
by bellard
bfd.h dependancy removed |
180 |
#define bfd_mach_sh3e 0x3e
|
181 |
#define bfd_mach_sh4 0x40
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|
1854
by bellard
sh4 target (Samuel Tardieu) |
182 |
#define bfd_mach_sh4_nofpu 0x41
|
183 |
#define bfd_mach_sh4_nommu_nofpu 0x42
|
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184 |
#define bfd_mach_sh4a 0x4a
|
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185 |
#define bfd_mach_sh4a_nofpu 0x4b
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186 |
#define bfd_mach_sh4al_dsp 0x4d
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187 |
#define bfd_mach_sh5 0x50
|
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73
by bellard
bfd.h dependancy removed |
188 |
bfd_arch_alpha, /* Dec Alpha */ |
2591
by j_mayer
Integrate Alpha target in Qemu core. |
189 |
#define bfd_mach_alpha 1
|
73
by bellard
bfd.h dependancy removed |
190 |
bfd_arch_arm, /* Advanced Risc Machines ARM */ |
3555
by pbrook
Update ARM disassembler. |
191 |
#define bfd_mach_arm_unknown 0
|
192 |
#define bfd_mach_arm_2 1
|
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193 |
#define bfd_mach_arm_2a 2
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194 |
#define bfd_mach_arm_3 3
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195 |
#define bfd_mach_arm_3M 4
|
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196 |
#define bfd_mach_arm_4 5
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197 |
#define bfd_mach_arm_4T 6
|
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198 |
#define bfd_mach_arm_5 7
|
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199 |
#define bfd_mach_arm_5T 8
|
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200 |
#define bfd_mach_arm_5TE 9
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201 |
#define bfd_mach_arm_XScale 10
|
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202 |
#define bfd_mach_arm_ep9312 11
|
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203 |
#define bfd_mach_arm_iWMMXt 12
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204 |
#define bfd_mach_arm_iWMMXt2 13
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73
by bellard
bfd.h dependancy removed |
205 |
bfd_arch_ns32k, /* National Semiconductors ns32000 */ |
206 |
bfd_arch_w65, /* WDC 65816 */ |
|
207 |
bfd_arch_tic30, /* Texas Instruments TMS320C30 */ |
|
208 |
bfd_arch_v850, /* NEC V850 */ |
|
209 |
#define bfd_mach_v850 0
|
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210 |
bfd_arch_arc, /* Argonaut RISC Core */ |
|
211 |
#define bfd_mach_arc_base 0
|
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212 |
bfd_arch_m32r, /* Mitsubishi M32R/D */ |
|
213 |
#define bfd_mach_m32r 0 /* backwards compatibility */ |
|
214 |
bfd_arch_mn10200, /* Matsushita MN10200 */ |
|
215 |
bfd_arch_mn10300, /* Matsushita MN10300 */ |
|
3347
by ths
Wire up CRIS disassembler, by Edgar E. Iglesias. |
216 |
bfd_arch_cris, /* Axis CRIS */ |
217 |
#define bfd_mach_cris_v0_v10 255
|
|
218 |
#define bfd_mach_cris_v32 32
|
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219 |
#define bfd_mach_cris_v10_v32 1032
|
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73
by bellard
bfd.h dependancy removed |
220 |
bfd_arch_last
|
221 |
};
|
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3094
by ths
s390 disassembler support, by Ulrich Hecht. |
222 |
#define bfd_mach_s390_31 31
|
223 |
#define bfd_mach_s390_64 64
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73
by bellard
bfd.h dependancy removed |
224 |
|
225 |
typedef struct symbol_cache_entry |
|
226 |
{
|
|
227 |
const char *name; |
|
228 |
union
|
|
229 |
{
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|
230 |
PTR p; |
|
231 |
bfd_vma i; |
|
232 |
} udata; |
|
233 |
} asymbol; |
|
32
by bellard
added flags computation optimization |
234 |
|
235 |
typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...)); |
|
236 |
||
237 |
enum dis_insn_type { |
|
238 |
dis_noninsn, /* Not a valid instruction */ |
|
239 |
dis_nonbranch, /* Not a branch instruction */ |
|
240 |
dis_branch, /* Unconditional branch */ |
|
241 |
dis_condbranch, /* Conditional branch */ |
|
242 |
dis_jsr, /* Jump to subroutine */ |
|
243 |
dis_condjsr, /* Conditional jump to subroutine */ |
|
244 |
dis_dref, /* Data reference instruction */ |
|
245 |
dis_dref2 /* Two data references in instruction */ |
|
246 |
};
|
|
247 |
||
3163
by ths
find -type f | xargs sed -i 's/[\t ]$//g' # on most files |
248 |
/* This struct is passed into the instruction decoding routine,
|
32
by bellard
added flags computation optimization |
249 |
and is passed back out into each callback. The various fields are used
|
250 |
for conveying information from your main routine into your callbacks,
|
|
251 |
for passing information into the instruction decoders (such as the
|
|
252 |
addresses of the callback functions), or for passing information
|
|
253 |
back from the instruction decoders to their callers.
|
|
254 |
||
255 |
It must be initialized before it is first passed; this can be done
|
|
256 |
by hand, or using one of the initialization macros below. */
|
|
257 |
||
258 |
typedef struct disassemble_info { |
|
259 |
fprintf_ftype fprintf_func; |
|
260 |
FILE *stream; |
|
261 |
PTR application_data; |
|
262 |
||
263 |
/* Target description. We could replace this with a pointer to the bfd,
|
|
264 |
but that would require one. There currently isn't any such requirement
|
|
265 |
so to avoid introducing one we record these explicitly. */
|
|
266 |
/* The bfd_flavour. This can be bfd_target_unknown_flavour. */
|
|
267 |
enum bfd_flavour flavour; |
|
268 |
/* The bfd_arch value. */
|
|
269 |
enum bfd_architecture arch; |
|
270 |
/* The bfd_mach value. */
|
|
271 |
unsigned long mach; |
|
272 |
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
|
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273 |
enum bfd_endian endian; |
|
274 |
||
275 |
/* An array of pointers to symbols either at the location being disassembled
|
|
276 |
or at the start of the function being disassembled. The array is sorted
|
|
277 |
so that the first symbol is intended to be the one used. The others are
|
|
278 |
present for any misc. purposes. This is not set reliably, but if it is
|
|
279 |
not NULL, it is correct. */
|
|
280 |
asymbol **symbols; |
|
281 |
/* Number of symbols in array. */
|
|
282 |
int num_symbols; |
|
283 |
||
284 |
/* For use by the disassembler.
|
|
285 |
The top 16 bits are reserved for public use (and are documented here).
|
|
286 |
The bottom 16 bits are for the internal use of the disassembler. */
|
|
287 |
unsigned long flags; |
|
288 |
#define INSN_HAS_RELOC 0x80000000
|
|
289 |
PTR private_data; |
|
290 |
||
291 |
/* Function used to get bytes to disassemble. MEMADDR is the
|
|
292 |
address of the stuff to be disassembled, MYADDR is the address to
|
|
293 |
put the bytes in, and LENGTH is the number of bytes to read.
|
|
294 |
INFO is a pointer to this struct.
|
|
295 |
Returns an errno value or 0 for success. */
|
|
296 |
int (*read_memory_func) |
|
297 |
PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length, |
|
298 |
struct disassemble_info *info)); |
|
299 |
||
300 |
/* Function which should be called if we get an error that we can't
|
|
301 |
recover from. STATUS is the errno value from read_memory_func and
|
|
302 |
MEMADDR is the address that we were trying to read. INFO is a
|
|
303 |
pointer to this struct. */
|
|
304 |
void (*memory_error_func) |
|
305 |
PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info)); |
|
306 |
||
307 |
/* Function called to print ADDR. */
|
|
308 |
void (*print_address_func) |
|
309 |
PARAMS ((bfd_vma addr, struct disassemble_info *info)); |
|
310 |
||
311 |
/* Function called to determine if there is a symbol at the given ADDR.
|
|
312 |
If there is, the function returns 1, otherwise it returns 0.
|
|
313 |
This is used by ports which support an overlay manager where
|
|
314 |
the overlay number is held in the top part of an address. In
|
|
315 |
some circumstances we want to include the overlay number in the
|
|
316 |
address, (normally because there is a symbol associated with
|
|
317 |
that address), but sometimes we want to mask out the overlay bits. */
|
|
318 |
int (* symbol_at_address_func) |
|
319 |
PARAMS ((bfd_vma addr, struct disassemble_info * info)); |
|
320 |
||
321 |
/* These are for buffer_read_memory. */
|
|
322 |
bfd_byte *buffer; |
|
323 |
bfd_vma buffer_vma; |
|
324 |
int buffer_length; |
|
325 |
||
326 |
/* This variable may be set by the instruction decoder. It suggests
|
|
327 |
the number of bytes objdump should display on a single line. If
|
|
328 |
the instruction decoder sets this, it should always set it to
|
|
329 |
the same value in order to get reasonable looking output. */
|
|
330 |
int bytes_per_line; |
|
331 |
||
332 |
/* the next two variables control the way objdump displays the raw data */
|
|
333 |
/* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
|
|
334 |
/* output will look like this:
|
|
335 |
00: 00000000 00000000
|
|
336 |
with the chunks displayed according to "display_endian". */
|
|
337 |
int bytes_per_chunk; |
|
338 |
enum bfd_endian display_endian; |
|
339 |
||
340 |
/* Results from instruction decoders. Not all decoders yet support
|
|
341 |
this information. This info is set each time an instruction is
|
|
342 |
decoded, and is only valid for the last such instruction.
|
|
343 |
||
344 |
To determine whether this decoder supports this information, set
|
|
345 |
insn_info_valid to 0, decode an instruction, then check it. */
|
|
346 |
||
347 |
char insn_info_valid; /* Branch info has been set. */ |
|
348 |
char branch_delay_insns; /* How many sequential insn's will run before |
|
349 |
a branch takes effect. (0 = normal) */
|
|
350 |
char data_size; /* Size of data reference in insn, in bytes */ |
|
351 |
enum dis_insn_type insn_type; /* Type of instruction */ |
|
352 |
bfd_vma target; /* Target address of branch or dref, if known; |
|
353 |
zero if unknown. */
|
|
354 |
bfd_vma target2; /* Second target address for dref2 */ |
|
355 |
||
212
by bellard
added ARM and Sparc disassemblers |
356 |
/* Command line options specific to the target disassembler. */
|
357 |
char * disassembler_options; |
|
358 |
||
32
by bellard
added flags computation optimization |
359 |
} disassemble_info; |
360 |
||
361 |
||
362 |
/* Standard disassemblers. Disassemble one instruction at the given
|
|
363 |
target address. Return number of bytes processed. */
|
|
364 |
typedef int (*disassembler_ftype) |
|
365 |
PARAMS((bfd_vma, disassemble_info *)); |
|
366 |
||
367 |
extern int print_insn_big_mips PARAMS ((bfd_vma, disassemble_info*)); |
|
368 |
extern int print_insn_little_mips PARAMS ((bfd_vma, disassemble_info*)); |
|
369 |
extern int print_insn_i386 PARAMS ((bfd_vma, disassemble_info*)); |
|
370 |
extern int print_insn_m68k PARAMS ((bfd_vma, disassemble_info*)); |
|
371 |
extern int print_insn_z8001 PARAMS ((bfd_vma, disassemble_info*)); |
|
372 |
extern int print_insn_z8002 PARAMS ((bfd_vma, disassemble_info*)); |
|
373 |
extern int print_insn_h8300 PARAMS ((bfd_vma, disassemble_info*)); |
|
374 |
extern int print_insn_h8300h PARAMS ((bfd_vma, disassemble_info*)); |
|
375 |
extern int print_insn_h8300s PARAMS ((bfd_vma, disassemble_info*)); |
|
376 |
extern int print_insn_h8500 PARAMS ((bfd_vma, disassemble_info*)); |
|
377 |
extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*)); |
|
378 |
extern disassembler_ftype arc_get_disassembler PARAMS ((int, int)); |
|
212
by bellard
added ARM and Sparc disassemblers |
379 |
extern int print_insn_arm PARAMS ((bfd_vma, disassemble_info*)); |
32
by bellard
added flags computation optimization |
380 |
extern int print_insn_sparc PARAMS ((bfd_vma, disassemble_info*)); |
381 |
extern int print_insn_big_a29k PARAMS ((bfd_vma, disassemble_info*)); |
|
382 |
extern int print_insn_little_a29k PARAMS ((bfd_vma, disassemble_info*)); |
|
383 |
extern int print_insn_i960 PARAMS ((bfd_vma, disassemble_info*)); |
|
384 |
extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*)); |
|
385 |
extern int print_insn_shl PARAMS ((bfd_vma, disassemble_info*)); |
|
386 |
extern int print_insn_hppa PARAMS ((bfd_vma, disassemble_info*)); |
|
387 |
extern int print_insn_m32r PARAMS ((bfd_vma, disassemble_info*)); |
|
388 |
extern int print_insn_m88k PARAMS ((bfd_vma, disassemble_info*)); |
|
389 |
extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*)); |
|
390 |
extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*)); |
|
391 |
extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*)); |
|
392 |
extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*)); |
|
393 |
extern int print_insn_little_powerpc PARAMS ((bfd_vma, disassemble_info*)); |
|
394 |
extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*)); |
|
395 |
extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*)); |
|
396 |
extern int print_insn_d10v PARAMS ((bfd_vma, disassemble_info*)); |
|
397 |
extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*)); |
|
398 |
extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*)); |
|
105
by bellard
PowerPC disas code |
399 |
extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*)); |
3094
by ths
s390 disassembler support, by Ulrich Hecht. |
400 |
extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*)); |
3347
by ths
Wire up CRIS disassembler, by Edgar E. Iglesias. |
401 |
extern int print_insn_crisv32 PARAMS ((bfd_vma, disassemble_info*)); |
32
by bellard
added flags computation optimization |
402 |
|
73
by bellard
bfd.h dependancy removed |
403 |
#if 0
|
32
by bellard
added flags computation optimization |
404 |
/* Fetch the disassembler for a given BFD, if that support is available. */
|
405 |
extern disassembler_ftype disassembler PARAMS ((bfd *));
|
|
73
by bellard
bfd.h dependancy removed |
406 |
#endif
|
32
by bellard
added flags computation optimization |
407 |
|
408 |
||
409 |
/* This block of definitions is for particular callers who read instructions
|
|
410 |
into a buffer before calling the instruction decoder. */
|
|
411 |
||
412 |
/* Here is a function which callers may wish to use for read_memory_func.
|
|
413 |
It gets bytes from a buffer. */
|
|
414 |
extern int buffer_read_memory |
|
415 |
PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *)); |
|
416 |
||
417 |
/* This function goes with buffer_read_memory.
|
|
418 |
It prints a message using info->fprintf_func and info->stream. */
|
|
419 |
extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *)); |
|
420 |
||
421 |
||
422 |
/* Just print the address in hex. This is included for completeness even
|
|
423 |
though both GDB and objdump provide their own (to print symbolic
|
|
424 |
addresses). */
|
|
425 |
extern void generic_print_address |
|
426 |
PARAMS ((bfd_vma, struct disassemble_info *)); |
|
427 |
||
428 |
/* Always true. */
|
|
429 |
extern int generic_symbol_at_address |
|
430 |
PARAMS ((bfd_vma, struct disassemble_info *)); |
|
431 |
||
432 |
/* Macro to initialize a disassemble_info struct. This should be called
|
|
433 |
by all applications creating such a struct. */
|
|
434 |
#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
|
|
435 |
(INFO).flavour = bfd_target_unknown_flavour, \
|
|
436 |
(INFO).arch = bfd_arch_unknown, \
|
|
437 |
(INFO).mach = 0, \
|
|
438 |
(INFO).endian = BFD_ENDIAN_UNKNOWN, \
|
|
439 |
INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
|
|
440 |
||
441 |
/* Call this macro to initialize only the internal variables for the
|
|
442 |
disassembler. Architecture dependent things such as byte order, or machine
|
|
443 |
variant are not touched by this macro. This makes things much easier for
|
|
3056
by ths
Spelling fixes, by Stefan Weil. |
444 |
GDB which must initialize these things separately. */
|
32
by bellard
added flags computation optimization |
445 |
|
446 |
#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
|
|
447 |
(INFO).fprintf_func = (FPRINTF_FUNC), \
|
|
448 |
(INFO).stream = (STREAM), \
|
|
449 |
(INFO).symbols = NULL, \
|
|
450 |
(INFO).num_symbols = 0, \
|
|
3982
by edgar_igl
Initialize disasinfo->private_data, binutils does it and some disassemblers depend on it. |
451 |
(INFO).private_data = NULL, \
|
32
by bellard
added flags computation optimization |
452 |
(INFO).buffer = NULL, \
|
453 |
(INFO).buffer_vma = 0, \
|
|
454 |
(INFO).buffer_length = 0, \
|
|
455 |
(INFO).read_memory_func = buffer_read_memory, \
|
|
456 |
(INFO).memory_error_func = perror_memory, \
|
|
457 |
(INFO).print_address_func = generic_print_address, \
|
|
458 |
(INFO).symbol_at_address_func = generic_symbol_at_address, \
|
|
459 |
(INFO).flags = 0, \
|
|
460 |
(INFO).bytes_per_line = 0, \
|
|
461 |
(INFO).bytes_per_chunk = 0, \
|
|
462 |
(INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
|
|
212
by bellard
added ARM and Sparc disassemblers |
463 |
(INFO).disassembler_options = NULL, \
|
32
by bellard
added flags computation optimization |
464 |
(INFO).insn_info_valid = 0
|
465 |
||
212
by bellard
added ARM and Sparc disassemblers |
466 |
#define _(x) x
|
1598
by bellard
m68k disassembler (Paul Brook) |
467 |
#define ATTRIBUTE_UNUSED __attribute__((unused))
|
212
by bellard
added ARM and Sparc disassemblers |
468 |
|
469 |
/* from libbfd */
|
|
470 |
||
471 |
bfd_vma bfd_getl32 (const bfd_byte *addr); |
|
472 |
bfd_vma bfd_getb32 (const bfd_byte *addr); |
|
1458
by bellard
MIPS target (Jocelyn Mayer) |
473 |
bfd_vma bfd_getl16 (const bfd_byte *addr); |
474 |
bfd_vma bfd_getb16 (const bfd_byte *addr); |
|
212
by bellard
added ARM and Sparc disassemblers |
475 |
typedef enum bfd_boolean {false, true} boolean; |
1598
by bellard
m68k disassembler (Paul Brook) |
476 |
typedef boolean bfd_boolean; |
212
by bellard
added ARM and Sparc disassemblers |
477 |
|
32
by bellard
added flags computation optimization |
478 |
#endif /* ! defined (DIS_ASM_H) */ |