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* Alpha emulation - PALcode emulation for qemu.
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* Copyright (c) 2007 Jocelyn Mayer
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#if !defined (CONFIG_USER_ONLY)
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static void pal_reset (CPUState *env);
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/* Console handlers */
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static void pal_console_call (CPUState *env, uint32_t palcode);
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/* OpenVMS handlers */
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static void pal_openvms_call (CPUState *env, uint32_t palcode);
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/* UNIX / Linux handlers */
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static void pal_unix_call (CPUState *env, uint32_t palcode);
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pal_handler_t pal_handlers[] = {
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.call_pal = &pal_console_call,
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.call_pal = &pal_openvms_call,
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/* UNIX / Linux handler */
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.call_pal = &pal_unix_call,
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/* One must explicitly check that the TB is valid and the FOE bit is reset */
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static void update_itb (void)
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/* This writes into a temp register, not the actual one */
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/* This commits the TB update */
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static void update_dtb (void);
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/* This write into a temp register, not the actual one */
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/* This commits the TB update */
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static void pal_reset (CPUState *env)
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static void do_swappal (CPUState *env, uint64_t palid)
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pal_handler_t *pal_handler;
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pal_handler = &pal_handlers[palid];
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env->pal_handler = pal_handler;
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env->ipr[IPR_PAL_BASE] = -1ULL;
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(*pal_handler->reset)(env);
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/* Unknown identifier */
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/* We were given the entry point address */
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env->pal_handler = NULL;
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env->ipr[IPR_PAL_BASE] = palid;
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env->pc = env->ipr[IPR_PAL_BASE];
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static void pal_console_call (CPUState *env, uint32_t palcode)
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if (palcode < 0x00000080) {
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/* Privileged palcodes */
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if (!(env->ps >> 3)) {
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/* TODO: generate privilege exception */
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/* Implemented as no-op */
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do_swappal(env, palid);
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/* Implemented as no-op */
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static void pal_openvms_call (CPUState *env, uint32_t palcode)
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uint64_t palid, val, oldval;
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if (palcode < 0x00000080) {
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/* Privileged palcodes */
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if (!(env->ps >> 3)) {
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/* TODO: generate privilege exception */
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/* Implemented as no-op */
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if (cpu_alpha_mfpr(env, IPR_ASN, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_ASTEN, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_ASTSR, val, &oldval) == 1)
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do_swappal(env, palid);
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if (cpu_alpha_mfpr(env, IPR_FEN, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_FEN, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_IPIR, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_IPL, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_IPL, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_MCES, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_MCES, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_PCBB, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_PRBR, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_PRBR, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_PTBR, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_SCBB, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_SCBB, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_SIRR, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_SISR, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_TBCHK, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_TBIA, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_TBIAP, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_TBIS, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_ESP, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_ESP, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_SSP, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_SSP, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_USP, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_USP, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_TBISD, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_TBISI, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_ASTEN, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_ASTSR, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_VPTB, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_VPTB, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_PERFMON, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_DATFX, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_WHAMI, &val) == 0)
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/* Implemented as no-op */
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static void pal_unix_call (CPUState *env, uint32_t palcode)
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uint64_t palid, val, oldval;
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if (palcode < 0x00000080) {
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/* Privileged palcodes */
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if (!(env->ps >> 3)) {
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/* TODO: generate privilege exception */
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/* Implemented as no-op */
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do_swappal(env, palid);
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if (cpu_alpha_mtpr(env, IPR_IPIR, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_MCES, &val) == 0)
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if (cpu_alpha_mtpr(env, IPR_MCES, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_PERFMON, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_TBIS, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_USP, val, &oldval) == 1)
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if (cpu_alpha_mtpr(env, IPR_PERFMON, val, &oldval) == 1)
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if (cpu_alpha_mfpr(env, IPR_USP, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_WHAMI, &val) == 0)
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if (cpu_alpha_mfpr(env, IPR_WHAMI, &val) == 0)
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/* Implemented as no-op */
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void call_pal (CPUState *env)
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pal_handler_t *pal_handler = env->pal_handler;
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switch (env->exception_index) {
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(*pal_handler->reset)(env);
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(*pal_handler->machine_check)(env);
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(*pal_handler->arithmetic)(env);
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(*pal_handler->interrupt)(env);
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(*pal_handler->dfault)(env);
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case EXCP_DTB_MISS_PAL:
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(*pal_handler->dtb_miss_pal)(env);
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case EXCP_DTB_MISS_NATIVE:
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(*pal_handler->dtb_miss_native)(env);
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(*pal_handler->unalign)(env);
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(*pal_handler->itb_miss)(env);
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(*pal_handler->itb_acv)(env);
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(*pal_handler->opcdec)(env);
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(*pal_handler->fen)(env);
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if (env->exception_index >= EXCP_CALL_PAL &&
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env->exception_index < EXCP_CALL_PALP) {
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/* Unprivileged PAL call */
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(*pal_handler->call_pal)
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(env, (env->exception_index - EXCP_CALL_PAL) >> 6);
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} else if (env->exception_index >= EXCP_CALL_PALP &&
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env->exception_index < EXCP_CALL_PALE) {
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/* Privileged PAL call */
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(*pal_handler->call_pal)
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(env, ((env->exception_index - EXCP_CALL_PALP) >> 6) + 0x80);
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/* Should never happen */
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env->ipr[IPR_EXC_ADDR] &= ~1;
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void pal_init (CPUState *env)
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static uint64_t get_ptebase (CPUState *env, uint64_t vaddr)
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uint64_t virbnd, ptbr;
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if ((env->features & FEATURE_VIRBND)) {
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cpu_alpha_mfpr(env, IPR_VIRBND, &virbnd);
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cpu_alpha_mfpr(env, IPR_SYSPTBR, &ptbr);
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cpu_alpha_mfpr(env, IPR_PTBR, &ptbr);
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cpu_alpha_mfpr(env, IPR_PTBR, &ptbr);
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static int get_page_bits (CPUState *env)
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static int get_pte (uint64_t *pfnp, int *zbitsp, int *protp,
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uint64_t ptebase, int page_bits, uint64_t level,
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uint64_t pteaddr, pte, pfn;
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int ure, uwe, kre, kwe, foE, foR, foW, v, ret, ar, is_user;
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is_user = mmu_idx == MMU_USER_IDX;
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pteaddr = (ptebase << page_bits) + (8 * level);
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pte = ldq_raw(pteaddr);
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/* Decode all interresting PTE fields */
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uwe = (pte >> 13) & 1;
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kwe = (pte >> 12) & 1;
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ure = (pte >> 9) & 1;
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kre = (pte >> 8) & 1;
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foE = (pte >> 3) & 1;
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foW = (pte >> 2) & 1;
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foR = (pte >> 1) & 1;
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/* Check access rights */
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*zbitsp = page_bits + (3 * gh);
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static int paddr_from_pte (uint64_t *paddr, int *zbitsp, int *prot,
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uint64_t ptebase, int page_bits,
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uint64_t vaddr, int mmu_idx, int rw)
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uint64_t pfn, page_mask, lvl_mask, level1, level2, level3;
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page_mask = (1ULL << page_bits) - 1ULL;
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lvl_bits = page_bits - 3;
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lvl_mask = (1ULL << lvl_bits) - 1ULL;
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level3 = (vaddr >> page_bits) & lvl_mask;
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level2 = (vaddr >> (page_bits + lvl_bits)) & lvl_mask;
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level1 = (vaddr >> (page_bits + (2 * lvl_bits))) & lvl_mask;
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ret = get_pte(&pfn, NULL, NULL, ptebase, page_bits, level1, 0, 0);
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/* Access violation */
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/* translation not valid */
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ret = get_pte(&pfn, NULL, NULL, pfn, page_bits, level2, 0, 0);
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/* Access violation */
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/* translation not valid */
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ret = get_pte(&pfn, zbitsp, prot, pfn, page_bits, level3, mmu_idx, rw);
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/* Translation not valid */
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} else if (ret & 2) {
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/* Access violation */
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/* Fault on execute */
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*paddr = (pfn << page_bits) | (vaddr & page_mask);
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static int virtual_to_physical (CPUState *env, uint64_t *physp,
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int *zbitsp, int *protp,
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uint64_t virtual, int mmu_idx, int rw)
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uint64_t sva, ptebase;
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int seg, page_bits, ret;
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sva = ((int64_t)(virtual << (64 - VA_BITS))) >> (64 - VA_BITS);
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seg = sva >> (VA_BITS - 2);
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virtual &= ~(0xFFFFFC0000000000ULL << (VA_BITS - 43));
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ptebase = get_ptebase(env, virtual);
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page_bits = get_page_bits(env);
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/* seg1: 3 levels of PTE */
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ret = paddr_from_pte(physp, zbitsp, protp, ptebase, page_bits,
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virtual, mmu_idx, rw);
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/* seg1: 2 levels of PTE */
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ret = paddr_from_pte(physp, zbitsp, protp, ptebase, page_bits,
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virtual, mmu_idx, rw);
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/* seg1: TB mapped */
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ret = paddr_from_pte(physp, zbitsp, protp, ptebase, page_bits,
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virtual, mmu_idx, rw);
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/* XXX: code provision */
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int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
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int mmu_idx, int is_softmmu)
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uint64_t physical, page_size, end;
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int prot, zbits, ret;
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if (env->user_mode_only) {
1004
ret = virtual_to_physical(env, &physical, &zbits, &prot,
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address, mmu_idx, rw);
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page_size = 1ULL << zbits;
1011
address &= ~(page_size - 1);
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for (end = physical + page_size; physical < end; physical += 0x1000) {
1013
ret = tlb_set_page(env, address, physical, prot,
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mmu_idx, is_softmmu);
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env->exception_index = EXCP_DFAULT;
1021
env->ipr[IPR_EXC_ADDR] = address;
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env->exception_index = EXCP_ACCESS_VIOLATION;
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env->ipr[IPR_EXC_ADDR] = address;
1030
env->exception_index = EXCP_FAULT_ON_READ;
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env->ipr[IPR_EXC_ADDR] = address;
1035
env->exception_index = EXCP_FAULT_ON_EXECUTE;
1036
env->ipr[IPR_EXC_ADDR] = address;
1039
env->exception_index = EXCP_FAULT_ON_WRITE;
1040
env->ipr[IPR_EXC_ADDR] = address;
1044
/* Should never happen */
1045
env->exception_index = EXCP_MCHK;
1046
env->ipr[IPR_EXC_ADDR] = address;
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#else /* !defined (CONFIG_USER_ONLY) */
1056
void pal_init (CPUState *env)
1060
void call_pal (CPUState *env, int palcode)
1064
printf("%s: palcode %02x\n", __func__, palcode);
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if (logfile != NULL)
1066
fprintf(logfile, "%s: palcode %02x\n", __func__, palcode);
1070
printf("CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]);
1071
if (logfile != NULL)
1072
fprintf(logfile, "CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]);
1073
ret = do_syscall(env, env->ir[IR_V0], env->ir[IR_A0], env->ir[IR_A1],
1074
env->ir[IR_A2], env->ir[IR_A3], env->ir[IR_A4],
1076
env->ir[IR_A3] = ret;
1077
if (ret > (target_ulong)(-515)) {
1085
env->ir[IR_V0] = env->unique;
1086
printf("RDUNIQUE: " TARGET_FMT_lx "\n", env->unique);
1090
env->unique = env->ir[IR_A0];
1091
printf("WRUNIQUE: " TARGET_FMT_lx "\n", env->unique);
1094
printf("%s: unhandled palcode %02x\n", __func__, palcode);
1095
if (logfile != NULL)
1096
fprintf(logfile, "%s: unhandled palcode %02x\n",
added
removed
hw/alpha_palcode.c
