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static CPUReadMemoryFunc *arm_sysctl_readfn[] = {
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static CPUReadMemoryFunc * const arm_sysctl_readfn[] = {
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static CPUWriteMemoryFunc *arm_sysctl_writefn[] = {
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static CPUWriteMemoryFunc * const arm_sysctl_writefn[] = {
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arm_sysctl_write,
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arm_sysctl_write,
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void arm_sysctl_init(uint32_t base, uint32_t sys_id)
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static int arm_sysctl_init1(SysBusDevice *dev)
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arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
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s = (arm_sysctl_state *)qemu_mallocz(sizeof(arm_sysctl_state));
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/* The MPcore bootloader uses these flags to start secondary CPUs.
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We don't use a bootloader, so do this here. */
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iomemtype = cpu_register_io_memory(0, arm_sysctl_readfn,
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iomemtype = cpu_register_io_memory(arm_sysctl_readfn,
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arm_sysctl_writefn, s);
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cpu_register_physical_memory(base, 0x00001000, iomemtype);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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/* ??? Save/restore. */
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/* Legacy helper function. */
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void arm_sysctl_init(uint32_t base, uint32_t sys_id)
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dev = qdev_create(NULL, "realview_sysctl");
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qdev_prop_set_uint32(dev, "sys_id", sys_id);
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sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
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static SysBusDeviceInfo arm_sysctl_info = {
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.init = arm_sysctl_init1,
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.qdev.name = "realview_sysctl",
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.qdev.size = sizeof(arm_sysctl_state),
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.qdev.props = (Property[]) {
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DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
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DEFINE_PROP_END_OF_LIST(),
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static void arm_sysctl_register_devices(void)
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sysbus_register_withprop(&arm_sysctl_info);
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device_init(arm_sysctl_register_devices)