1
2012-12-17 Nick Clifton <nickc@redhat.com>
3
* MAINTAINERS: Add copyright notice.
4
* Makefile.am: Likewise.
5
* configure.com: Likewise.
6
* configure.in: Likewise.
7
* makefile.vms: Likewise.
8
* rl78-decode.c: Likewise.
9
* rl78-decode.opc: Likewise.
10
* rx-decode.c: Likewise.
11
* rx-decode.opc: Likewise.
12
* Makefile.in: Regenerate.
14
2012-12-13 Alan Modra <amodra@gmail.com>
17
* ppc-opc.c (insert_sci8, extract_sci8): Rewrite.
18
(insert_sci8n, extract_sci8n): Likewise.
20
2012-11-30 Oleg Raikhman <oleg@adapteva.com>
21
Joern Rennecke <joern.rennecke@embecosm.com>
23
* epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.
25
2012-11-29 Roland McGrath <mcgrathr@google.com>
27
* s390-mkopc.c (file_header): Add const.
29
2012-11-29 David Holsgrove <david.holsgrove@xilinx.com>
31
* microblaze-opc.h: Rename INST_TYPE_RD_R1_SPECIAL to
32
INST_TYPE_R1_R2_SPECIAL
33
* microblaze-dis.c (print_insn_microblaze): Same.
35
2012-11-23 Alan Modra <amodra@gmail.com>
37
* ppc-dis.c (ppc_parse_cpu): Add "sticky" param. Track bits
38
set from ppc_opts.sticky in it. Delete "retain_mask".
39
(powerpc_init_dialect): Choose default dialect from info->mach
40
before parsing -M options. Handle more bfd_mach_ppc variants.
41
Update common default to power7.
43
2012-11-21 David Holsgrove <david.holsgrove@xilinx.com>
45
* microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
46
* microblaze-opcm.h (microblaze_instr): Likewise
48
2012-11-21 Edgar E. Iglesias <edgar.iglesias@gmail.com>
50
* microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
51
* microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
53
2012-11-20 Kirill Yukhin <kirill.yukhin@intel.com>
54
H.J. Lu <hongjiu.lu@intel.com>
57
* i386-opc.tbl: Fix opcode for 64-bit jecxz.
58
* i386-tbl.h: Regenerated.
60
2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
62
* s390-opc.txt: Fix srstu and strag opcodes.
64
2012-11-14 David Holsgrove <david.holsgrove@xilinx.com>
66
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
67
update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
68
and increase MAX_OPCODES.
69
(op_code_struct): add mbar and sleep
70
* microblaze-opcm.h (microblaze_instr): add mbar
71
Define IMM_MBAR and IMM5_MBAR_MASK
72
* microblaze-dis.c: Add get_field_imm5_mbar
73
(print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
75
2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
77
* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn
78
* microblaze-opcm.h (microblaze_instr): add clz
80
2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
82
* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur,
83
lhur, lwr, sbr, shr, swr
84
* microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
87
2012-11-09 Nick Clifton <nickc@redhat.com>
89
* configure.in: Add bfd_v850_rh850_arch.
90
* configure: Regenerate.
91
* disassemble.c (disassembler): Likewise.
93
2012-11-09 H.J. Lu <hongjiu.lu@intel.com>
95
* aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
96
* ia64-gen.c (fetch_insn_class): Likewise.
98
2012-11-08 Alan Modra <amodra@gmail.com>
100
* po/POTFILES.in: Regenerate.
102
2012-11-05 Alan Modra <amodra@gmail.com>
104
* configure.in: Apply 2012-09-10 change to config.in here.
106
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
108
* s390-mkopc.c: Accept empty lines in s390-opc.txt.
109
* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
111
* s390-opc.txt: Add new instructions. New instruction type for lptea.
113
2012-10-26 Christian Groessler <chris@groessler.org>
115
* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
116
trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
117
non-existing opcode trtrb.
118
* z8k-opc.h: Regenerate.
120
2012-10-26 Alan Modra <amodra@gmail.com>
122
* ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
124
2012-10-24 Roland McGrath <mcgrathr@google.com>
126
* i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
129
2012-10-22 Peter Bergner <bergner@vnet.ibm.com>
131
* ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
133
2012-10-18 Tom Tromey <tromey@redhat.com>
135
* tic54x-dis.c (print_instruction): Don't use K&R style.
136
(print_parallel_instruction, sprint_dual_address)
137
(sprint_indirect_address, sprint_direct_address, sprint_mmr)
138
(sprint_cc2, sprint_condition): Likewise.
140
2012-10-18 Kai Tietz <ktietz@redhat.com>
142
* aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
143
value with a default.
144
(do_special_encoding): Likewise.
145
(aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
146
variables with default.
147
* arc-dis.c (write_comments_): Don't use strncat due
148
size of state->commentBuffer pointer isn't predictable.
150
2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
152
* aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
153
rmr_el3; remove daifset and daifclr.
155
2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
157
* aarch64-opc.c (operand_general_constraint_met_p): Change to check
158
the alignment of addr.offset.imm instead of that of shifter.amount for
159
operand type AARCH64_OPND_ADDR_UIMM12.
161
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
163
* arm-dis.c: Use preferred form of vrint instruction variants
166
2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
168
* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
169
* i386-init.h: Regenerated.
171
2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
173
* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
174
* ppc-opc.c (VBA): New define.
175
(powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
176
mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
178
2012-10-04 Nick Clifton <nickc@redhat.com>
180
* v850-dis.c (disassemble): Place square parentheses around second
181
register operand of clr1, not1, set1 and tst1 instructions.
183
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
185
* s390-mkopc.c: Support new option zEC12.
186
* s390-opc.c: Add new instruction formats.
187
* s390-opc.txt: Add new instructions for zEC12.
189
2012-09-27 Anthony Green <green@moxielogic.com>
191
* moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
192
* moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
194
2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
196
* i386-gen.c (cpu_flag_init): Add missing Cpu flags in
197
CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
198
and CPU_BTVER2_FLAGS.
199
* i386-init.h: Regenerated.
201
2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
203
* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
204
CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
205
CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
206
CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
207
(cpu_flags): Add CpuCX16.
208
* i386-opc.h (CpuCX16): New.
209
(i386_cpu_flags): Add cpucx16.
210
* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
211
* i386-tbl.h: Regenerate.
212
* i386-init.h: Likewise.
214
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
216
* arm-dis.c: Changed ldra and strl-form mnemonics
219
2012-09-18 Chao-ying Fu <fu@mips.com>
221
* micromips-opc.c (micromips_opcodes): Correct the encoding of
222
the "swxc1" instruction.
224
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
226
* aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
227
the parameter 'inst'.
228
(aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
229
(convert_mov_to_movewide): Change to assert (0) when
230
aarch64_wide_constant_p returns FALSE.
232
2012-09-14 David Edelsohn <dje.gcc@gmail.com>
234
* configure: Regenerate.
236
2012-09-14 Anthony Green <green@moxielogic.com>
238
* moxie-dis.c (print_insn_moxie): Branch targets are relative to
239
the address after the branch instruction.
241
2012-09-13 Anthony Green <green@moxielogic.com>
243
* moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
245
2012-09-10 Matthias Klose <doko@ubuntu.com>
247
* config.in: Disable sanity check for kfreebsd.
249
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
251
* configure: Regenerated.
253
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
255
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
256
* ia64-gen.c: Promote completer index type to longlong.
257
(irf_operand): Add new register recognition.
258
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
259
(lookup_specifier): Add new resource recognition.
260
(insert_bit_table_ent): Relax abort condition according to the
261
changed completer index type.
262
(print_dis_table): Fix printf format for completer index.
263
* ia64-ic.tbl: Add a new instruction class.
264
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
265
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
266
* ia64-opc.h: Define short names for new operand types.
267
* ia64-raw.tbl: Add new RAW resource for DAHR register.
268
* ia64-waw.tbl: Add new WAW resource for DAHR register.
269
* ia64-asmtab.c: Regenerate.
271
2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
273
* ppc-opc.c (VXASHB_MASK): New define.
274
(powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
276
2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
278
* ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
279
VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
280
(powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
281
vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
282
vupklsh>: Use VXVA_MASK.
283
<vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
284
<mfvscr>: Use VXVAVB_MASK.
285
<mtvscr>: Use VXVDVA_MASK.
286
<vspltb>: Use VXUIMM4_MASK.
287
<vsplth>: Use VXUIMM3_MASK.
288
<vspltw>: Use VXUIMM2_MASK.
290
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
292
* arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
294
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
296
* arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
298
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
300
* arm-dis.c (neon_opcodes): Handle VMULL.P64.
302
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
304
* arm-dis.c (neon_opcodes): Add support for AES instructions.
306
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
308
* arm-dis.c (coprocessor_opcodes): Add support for HP/DP
311
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
313
* arm-dis.c (coprocessor_opcodes): Add VRINT.
314
(neon_opcodes): Likewise.
316
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
318
* arm-dis.c (coprocessor_opcodes): Add support for new VCVT
320
(neon_opcodes): Likewise.
322
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
324
* arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
325
(neon_opcodes): Likewise.
327
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
329
* arm-dis.c (coprocessor_opcodes): Add VSEL.
330
(print_insn_coprocessor): Add new %<>c bitfield format
333
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
335
* arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
336
(thumb32_opcodes): Likewise.
337
(print_arm_insn): Add support for %<>T formatter.
339
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
341
* arm-dis.c (arm_opcodes): Add HLT.
342
(thumb_opcodes): Likewise.
344
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
346
* arm-dis.c (thumb32_opcodes): Add DCPS instruction.
348
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
350
* arm-dis.c (arm_opcodes): Add SEVL.
351
(thumb_opcodes): Likewise.
352
(thumb32_opcodes): Likewise.
354
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
356
* arm-dis.c (data_barrier_option): New function.
357
(print_insn_arm): Use data_barrier_option.
358
(print_insn_thumb32): Use data_barrier_option.
360
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
362
* arm-dis.c (COND_UNCOND): New constant.
363
(print_insn_coprocessor): Add support for %u format specifier.
364
(print_insn_neon): Likewise.
366
2012-08-21 David S. Miller <davem@davemloft.net>
368
* sparc-opc.c (4-argument crypto instructions): Fix encoding using
371
2012-08-20 Edmar Wienskoski <edmar@freescale.com>
373
* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
374
vabsduh, vabsduw, mviwsplt.
376
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
378
* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
381
* i386-opc.h: Update CpuPRFCHW comment.
383
* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
384
* i386-init.h: Regenerated.
385
* i386-tbl.h: Likewise.
387
2012-08-17 Nick Clifton <nickc@redhat.com>
389
* po/uk.po: New Ukranian translation.
390
* configure.in (ALL_LINGUAS): Add uk.
391
* configure: Regenerate.
393
2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
395
* ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
396
RBX for the third operand.
397
<"lswi">: Use RAX for second and NBI for the third operand.
399
2012-08-15 DJ Delorie <dj@redhat.com>
401
* rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
402
operands, so that data addresses can be corrected when not
404
* rl78-decode.c: Regenerate.
405
* rl78-dis.c (print_insn_rl78): Make order of modifiers
406
irrelevent. When the 'e' specifier is used on an operand and no
407
ES prefix is provided, adjust address to make it absolute.
409
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
411
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
413
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
415
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
417
2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
419
* mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
420
macros, use local variables for info struct member accesses,
421
update the type of the variable used to hold the instruction
423
(print_insn_mips, print_mips16_insn_arg): Likewise.
424
(print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
425
local variables for info struct member accesses.
426
(print_insn_micromips): Add GET_OP_S local macro.
427
(_print_insn_mips): Update the type of the variable used to hold
428
the instruction word.
430
2012-08-13 Ian Bolton <ian.bolton@arm.com>
431
Laurent Desnogues <laurent.desnogues@arm.com>
432
Jim MacArthur <jim.macarthur@arm.com>
433
Marcus Shawcroft <marcus.shawcroft@arm.com>
434
Nigel Stephens <nigel.stephens@arm.com>
435
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
436
Richard Earnshaw <rearnsha@arm.com>
437
Sofiane Naci <sofiane.naci@arm.com>
438
Tejas Belagod <tejas.belagod@arm.com>
439
Yufeng Zhang <yufeng.zhang@arm.com>
441
* Makefile.am: Add AArch64.
442
* Makefile.in: Regenerate.
443
* aarch64-asm.c: New file.
444
* aarch64-asm.h: New file.
445
* aarch64-dis.c: New file.
446
* aarch64-dis.h: New file.
447
* aarch64-gen.c: New file.
448
* aarch64-opc.c: New file.
449
* aarch64-opc.h: New file.
450
* aarch64-tbl.h: New file.
451
* configure.in: Add AArch64.
452
* configure: Regenerate.
453
* disassemble.c: Add AArch64.
454
* aarch64-asm-2.c: New file (automatically generated).
455
* aarch64-dis-2.c: New file (automatically generated).
456
* aarch64-opc-2.c: New file (automatically generated).
457
* po/POTFILES.in: Regenerate.
459
2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
461
* micromips-opc.c (micromips_opcodes): Update comment.
462
* mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
463
instructions for IOCT as appropriate.
464
* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
466
* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
467
the result of a check for the -Wno-missing-field-initializers
469
* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
470
(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
472
(mips16-opc.lo): Likewise.
473
(micromips-opc.lo): Likewise.
474
* aclocal.m4: Regenerate.
475
* configure: Regenerate.
476
* Makefile.in: Regenerate.
478
2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
481
* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
482
* i386-init.h: Regenerated.
484
2012-08-09 Nick Clifton <nickc@redhat.com>
486
* po/vi.po: Updated Vietnamese translation.
488
2012-08-07 Roland McGrath <mcgrathr@google.com>
490
* i386-dis.c (reg_table): Fill out REG_0F0D table with
491
AMD-reserved cases as "prefetch".
492
(MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
493
(MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
494
(reg_table): Use those under REG_0F18.
495
(mod_table): Add those cases as "nop/reserved".
497
2012-08-07 Jan Beulich <jbeulich@suse.com>
499
* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
501
2012-08-06 Roland McGrath <mcgrathr@google.com>
503
* i386-dis.c (print_insn): Print spaces between multiple excess
504
prefixes. Return actual number of excess prefixes consumed,
507
* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
509
2012-08-06 Roland McGrath <mcgrathr@google.com>
510
Victor Khimenko <khim@google.com>
511
H.J. Lu <hongjiu.lu@intel.com>
513
* i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
514
(putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
515
(intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
516
(OP_E_register): Likewise.
517
(OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
519
2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
521
* configure.in: Formatting.
522
* configure: Regenerate.
524
2012-08-01 Alan Modra <amodra@gmail.com>
526
* h8300-dis.c: Fix printf arg warnings.
527
* i960-dis.c: Likewise.
528
* mips-dis.c: Likewise.
529
* pdp11-dis.c: Likewise.
530
* sh-dis.c: Likewise.
531
* v850-dis.c: Likewise.
532
* configure.in: Formatting.
533
* configure: Regenerate.
534
* rl78-decode.c: Regenerate.
535
* po/POTFILES.in: Regenerate.
537
2012-07-31 Chao-Ying Fu <fu@mips.com>
538
Catherine Moore <clm@codesourcery.com>
539
Maciej W. Rozycki <macro@codesourcery.com>
541
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
542
(DSP_VOLA): Likewise.
543
(D32, D33): Likewise.
544
(micromips_opcodes): Add DSP ASE instructions.
545
* mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
546
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
548
2012-07-31 Jan Beulich <jbeulich@suse.com>
550
* i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
551
instruction group. Mark as requiring AVX2.
552
* i386-tbl.h: Re-generate.
554
2012-07-30 Nick Clifton <nickc@redhat.com>
556
* po/opcodes.pot: Updated template.
557
* po/es.po: Updated Spanish translation.
558
* po/fi.po: Updated Finnish translation.
560
2012-07-27 Mike Frysinger <vapier@gentoo.org>
562
* configure.in (BFD_VERSION): Run bfd/configure --version and
563
parse the output of that.
564
* configure: Regenerate.
566
2012-07-25 James Lemke <jwlemke@codesourcery.com>
568
* ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
570
2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
571
Dr David Alan Gilbert <dave@treblig.org>
574
* arm-dis.c: Add necessary casts for printing integer values.
575
Use %s when printing string values.
576
* hppa-dis.c: Likewise.
577
* m68k-dis.c: Likewise.
578
* microblaze-dis.c: Likewise.
579
* mips-dis.c: Likewise.
580
* sparc-dis.c: Likewise.
582
2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
585
* i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
586
(VEX_LEN_0FXOP_08_CD): Likewise.
587
(VEX_LEN_0FXOP_08_CE): Likewise.
588
(VEX_LEN_0FXOP_08_CF): Likewise.
589
(VEX_LEN_0FXOP_08_EC): Likewise.
590
(VEX_LEN_0FXOP_08_ED): Likewise.
591
(VEX_LEN_0FXOP_08_EE): Likewise.
592
(VEX_LEN_0FXOP_08_EF): Likewise.
593
(xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
594
vpcomub, vpcomuw, vpcomud, vpcomuq.
595
(vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
596
VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
597
VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
600
2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
602
* i386-dis.c (PREFIX_0F38F6): New.
603
(prefix_table): Add adcx, adox instructions.
604
(three_byte_table): Use PREFIX_0F38F6.
605
(mod_table): Add rdseed instruction.
606
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
607
(cpu_flags): Likewise.
608
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
609
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
610
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
612
* i386-tbl.h: Regenerate.
613
* i386-init.h: Likewise.
615
2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
617
* mips-dis.c: Remove gratuitous newline.
619
2012-07-05 Sean Keys <skeys@ipdatasys.com>
621
* xgate-dis.c: Removed an IF statement that will
622
always be false due to overlapping operand masks.
623
* xgate-opc.c: Corrected 'com' opcode entry and
626
2012-07-02 Roland McGrath <mcgrathr@google.com>
628
* i386-opc.tbl: Add RepPrefixOk to nop.
629
* i386-tbl.h: Regenerate.
631
2012-06-28 Nick Clifton <nickc@redhat.com>
633
* po/vi.po: Updated Vietnamese translation.
635
2012-06-22 Roland McGrath <mcgrathr@google.com>
637
* i386-opc.tbl: Add RepPrefixOk to ret.
638
* i386-tbl.h: Regenerate.
640
* i386-opc.h (RepPrefixOk): New enum constant.
641
(i386_opcode_modifier): New bitfield 'repprefixok'.
642
* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
643
* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
644
instructions that have IsString.
645
* i386-tbl.h: Regenerate.
647
2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
649
* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
650
(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
651
(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
652
(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
653
(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
654
(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
655
(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
656
(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
657
(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
659
2012-05-19 Alan Modra <amodra@gmail.com>
661
* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
662
(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
664
2012-05-18 Alan Modra <amodra@gmail.com>
666
* ia64-opc.c: Remove #include "ansidecl.h".
667
* z8kgen.c: Include sysdep.h first.
669
* arc-dis.c: Include sysdep.h first, remove some redundant includes.
670
* bfin-dis.c: Likewise.
671
* i860-dis.c: Likewise.
672
* ia64-dis.c: Likewise.
673
* ia64-gen.c: Likewise.
674
* m68hc11-dis.c: Likewise.
675
* mmix-dis.c: Likewise.
676
* msp430-dis.c: Likewise.
677
* or32-dis.c: Likewise.
678
* rl78-dis.c: Likewise.
679
* rx-dis.c: Likewise.
680
* tic4x-dis.c: Likewise.
681
* tilegx-opc.c: Likewise.
682
* tilepro-opc.c: Likewise.
683
* rx-decode.c: Regenerate.
685
2012-05-17 James Lemke <jwlemke@codesourcery.com>
687
* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
689
2012-05-17 James Lemke <jwlemke@codesourcery.com>
691
* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
693
2012-05-17 Daniel Richard G. <skunk@iskunk.org>
694
Nick Clifton <nickc@redhat.com>
697
* configure.in: Add check that sysdep.h has been included before
698
any system header files.
699
* configure: Regenerate.
700
* config.in: Regenerate.
701
* sysdep.h: Generate an error if included before config.h.
702
* alpha-opc.c: Include sysdep.h before any other header file.
703
* alpha-dis.c: Likewise.
704
* avr-dis.c: Likewise.
705
* cgen-opc.c: Likewise.
706
* cr16-dis.c: Likewise.
707
* cris-dis.c: Likewise.
708
* crx-dis.c: Likewise.
709
* d10v-dis.c: Likewise.
710
* d10v-opc.c: Likewise.
711
* d30v-dis.c: Likewise.
712
* d30v-opc.c: Likewise.
713
* h8500-dis.c: Likewise.
714
* i370-dis.c: Likewise.
715
* i370-opc.c: Likewise.
716
* m10200-dis.c: Likewise.
717
* m10300-dis.c: Likewise.
718
* micromips-opc.c: Likewise.
719
* mips-opc.c: Likewise.
720
* mips61-opc.c: Likewise.
721
* moxie-dis.c: Likewise.
722
* or32-opc.c: Likewise.
723
* pj-dis.c: Likewise.
724
* ppc-dis.c: Likewise.
725
* ppc-opc.c: Likewise.
726
* s390-dis.c: Likewise.
727
* sh-dis.c: Likewise.
728
* sh64-dis.c: Likewise.
729
* sparc-dis.c: Likewise.
730
* sparc-opc.c: Likewise.
731
* spu-dis.c: Likewise.
732
* tic30-dis.c: Likewise.
733
* tic54x-dis.c: Likewise.
734
* tic80-dis.c: Likewise.
735
* tic80-opc.c: Likewise.
736
* tilegx-dis.c: Likewise.
737
* tilepro-dis.c: Likewise.
738
* v850-dis.c: Likewise.
739
* v850-opc.c: Likewise.
740
* vax-dis.c: Likewise.
741
* w65-dis.c: Likewise.
742
* xgate-dis.c: Likewise.
743
* xtensa-dis.c: Likewise.
744
* rl78-decode.opc: Likewise.
745
* rl78-decode.c: Regenerate.
746
* rx-decode.opc: Likewise.
747
* rx-decode.c: Regenerate.
749
2012-05-17 Alan Modra <amodra@gmail.com>
751
* ppc_dis.c: Don't include elf/ppc.h.
753
2012-05-16 Meador Inge <meadori@codesourcery.com>
755
* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
758
2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
759
Stephane Carrez <stcarrez@nerim.fr>
761
* configure.in: Add S12X and XGATE co-processor support to m68hc11
763
* disassemble.c: Likewise.
764
* configure: Regenerate.
765
* m68hc11-dis.c: Make objdump output more consistent, use hex
766
instead of decimal and use 0x prefix for hex.
767
* m68hc11-opc.c: Add S12X and XGATE opcodes.
769
2012-05-14 James Lemke <jwlemke@codesourcery.com>
771
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
772
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
773
(vle_opcd_indices): New array.
774
(lookup_vle): New function.
775
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
776
(print_insn_powerpc): Likewise.
777
* ppc-opc.c: Likewise.
779
2012-05-14 Catherine Moore <clm@codesourcery.com>
780
Maciej W. Rozycki <macro@codesourcery.com>
781
Rhonda Wittels <rhonda@codesourcery.com>
782
Nathan Froyd <froydnj@codesourcery.com>
784
* ppc-opc.c (insert_arx, extract_arx): New functions.
785
(insert_ary, extract_ary): New functions.
786
(insert_li20, extract_li20): New functions.
787
(insert_rx, extract_rx): New functions.
788
(insert_ry, extract_ry): New functions.
789
(insert_sci8, extract_sci8): New functions.
790
(insert_sci8n, extract_sci8n): New functions.
791
(insert_sd4h, extract_sd4h): New functions.
792
(insert_sd4w, extract_sd4w): New functions.
793
(insert_vlesi, extract_vlesi): New functions.
794
(insert_vlensi, extract_vlensi): New functions.
795
(insert_vleui, extract_vleui): New functions.
796
(insert_vleil, extract_vleil): New functions.
797
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
798
(BI16, BI32, BO32, B8): New.
799
(B15, B24, CRD32, CRS): New.
800
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
801
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
802
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
803
(SH6_MASK): Use PPC_OPSHIFT_INV.
804
(SI8, UI5, OIMM5, UI7, BO16): New.
805
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
806
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
808
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
809
(OPVUP, OPVUP_MASK OPVUP): New
810
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
811
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
812
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
813
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
814
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
815
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
816
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
817
(SE_IM5, SE_IM5_MASK): New.
818
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
819
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
820
(BO32DNZ, BO32DZ): New.
821
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
823
(powerpc_opcodes): Add new VLE instructions. Update existing
824
instruction to include PPCVLE if supported.
825
* ppc-dis.c (ppc_opts): Add vle entry.
826
(get_powerpc_dialect): New function.
827
(powerpc_init_dialect): VLE support.
828
(print_insn_big_powerpc): Call get_powerpc_dialect.
829
(print_insn_little_powerpc): Likewise.
830
(operand_value_powerpc): Handle negative shift counts.
831
(print_insn_powerpc): Handle 2-byte instruction lengths.
833
2012-05-11 Daniel Richard G. <skunk@iskunk.org>
836
* configure.in: Invoke ACX_HEADER_STRING.
837
* configure: Regenerate.
838
* config.in: Regenerate.
839
* sysdep.h: If STRINGS_WITH_STRING is defined then include both
840
string.h and strings.h.
842
2012-05-11 Nick Clifton <nickc@redhat.com>
845
* arm-dis.c (print_insn): Fix detection of instruction mode in
846
files containing multiple executable sections.
848
2012-05-03 Sean Keys <skeys@ipdatasys.com>
850
* Makefile.in, configure: regenerate
851
* disassemble.c (disassembler): Recognize ARCH_XGATE.
852
* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
854
* configure.in: Recognize xgate.
855
* xgate-dis.c, xgate-opc.c: New files for support of xgate
856
* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
857
and opcode generation for xgate.
859
2012-04-30 DJ Delorie <dj@redhat.com>
861
* rx-decode.opc (MOV): Do not sign-extend immediates which are
862
already the maximum bit size.
863
* rx-decode.c: Regenerate.
865
2012-04-27 David S. Miller <davem@davemloft.net>
867
* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
868
* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
870
* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
871
* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
873
* sparc-opc.c (CBCOND): New define.
874
(CBCOND_XCC): Likewise.
875
(cbcond): New helper macro.
876
(sparc_opcodes): Add compare-and-branch instructions.
878
* sparc-dis.c (print_insn_sparc): Handle ')'.
879
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
881
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
882
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
884
2012-04-12 David S. Miller <davem@davemloft.net>
886
* sparc-dis.c (X_DISP10): Define.
887
(print_insn_sparc): Handle '='.
889
2012-04-01 Mike Frysinger <vapier@gentoo.org>
891
* bfin-dis.c (fmtconst): Replace decimal handling with a single
892
sprintf call and the '*' field width.
894
2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
896
* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
898
2012-03-16 Alan Modra <amodra@gmail.com>
900
* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
901
(powerpc_opcd_indices): Bump array size.
902
(disassemble_init_powerpc): Set powerpc_opcd_indices entries
903
corresponding to unused opcodes to following entry.
904
(lookup_powerpc): New function, extracted and optimised from..
905
(print_insn_powerpc): ..here.
907
2012-03-15 Alan Modra <amodra@gmail.com>
908
James Lemke <jwlemke@codesourcery.com>
910
* disassemble.c (disassemble_init_for_target): Handle ppc init.
911
* ppc-dis.c (private): New var.
912
(powerpc_init_dialect): Don't return calloc failure, instead use
914
(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
915
(powerpc_opcd_indices): New array.
916
(disassemble_init_powerpc): New function.
917
(print_insn_big_powerpc): Don't init dialect here.
918
(print_insn_little_powerpc): Likewise.
919
(print_insn_powerpc): Start search using powerpc_opcd_indices.
921
2012-03-10 Edmar Wienskoski <edmar@freescale.com>
923
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
924
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
925
(PPCVEC2, PPCTMR, E6500): New short names.
926
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
927
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
928
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
929
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
930
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
931
optional operands on sync instruction for E6500 target.
933
2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
935
* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
937
2012-02-27 Alan Modra <amodra@gmail.com>
939
* mt-dis.c: Regenerate.
941
2012-02-27 Alan Modra <amodra@gmail.com>
943
* v850-opc.c (extract_v8): Rearrange to make it obvious this
944
is the inverse of corresponding insert function.
945
(extract_d22, extract_u9, extract_r4): Likewise.
946
(extract_d9): Correct sign extension.
947
(extract_d16_15): Don't assume "long" is 32 bits, and don't
948
rely on implementation defined behaviour for shift right of
950
(extract_d16_16, extract_d17_16, extract_i9): Likewise.
951
(extract_d23): Likewise, and correct mask.
953
2012-02-27 Alan Modra <amodra@gmail.com>
955
* crx-dis.c (print_arg): Mask constant to 32 bits.
956
* crx-opc.c (cst4_map): Use int array.
958
2012-02-27 Alan Modra <amodra@gmail.com>
960
* arc-dis.c (BITS): Don't use shifts to mask off bits.
961
(FIELDD): Sign extend with xor,sub.
963
2012-02-25 Walter Lee <walt@tilera.com>
965
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
966
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
967
TILEPRO_OPC_LW_TLS_SN.
969
2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
971
* i386-opc.h (HLEPrefixNone): New.
972
(HLEPrefixLock): Likewise.
973
(HLEPrefixAny): Likewise.
974
(HLEPrefixRelease): Likewise.
976
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
978
* i386-dis.c (HLE_Fixup1): New.
979
(HLE_Fixup2): Likewise.
980
(HLE_Fixup3): Likewise.
987
(MOD_C6_REG_7): Likewise.
988
(MOD_C7_REG_7): Likewise.
989
(RM_C6_REG_7): Likewise.
990
(RM_C7_REG_7): Likewise.
991
(XACQUIRE_PREFIX): Likewise.
992
(XRELEASE_PREFIX): Likewise.
993
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
994
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
995
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
996
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
997
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
998
MOD_C6_REG_7 and MOD_C7_REG_7.
999
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
1000
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
1002
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
1003
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
1005
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
1007
(cpu_flags): Add CpuHLE and CpuRTM.
1008
(opcode_modifiers): Add HLEPrefixOk.
1010
* i386-opc.h (CpuHLE): New.
1012
(HLEPrefixOk): Likewise.
1013
(i386_cpu_flags): Add cpuhle and cpurtm.
1014
(i386_opcode_modifier): Add hleprefixok.
1016
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
1017
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
1018
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
1019
operand. Add xacquire, xrelease, xabort, xbegin, xend and
1021
* i386-init.h: Regenerated.
1022
* i386-tbl.h: Likewise.
1024
2012-01-24 DJ Delorie <dj@redhat.com>
1026
* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
1027
* rl78-decode.c: Regenerate.
1029
2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
1032
* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
1034
2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
1036
* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
1037
register and move them after pmove with PSR/PCSR register.
1039
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
1041
* i386-dis.c (mod_table): Add vmfunc.
1043
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
1044
(cpu_flags): CpuVMFUNC.
1046
* i386-opc.h (CpuVMFUNC): New.
1047
(i386_cpu_flags): Add cpuvmfunc.
1049
* i386-opc.tbl: Add vmfunc.
1050
* i386-init.h: Regenerated.
1051
* i386-tbl.h: Likewise.
1053
For older changes see ChangeLog-2011
1055
Copyright (C) 2012 Free Software Foundation, Inc.
1057
Copying and distribution of this file, with or without modification,
1058
are permitted in any medium without royalty provided the copyright
1059
notice and this notice are preserved.
1065
version-control: never
added
removed
opcodes/ChangeLog-2012
