596
601
if (st->tag == Ist_Dirty) {
597
602
d = st->Ist.Dirty.details;
598
603
for (j = 0; j < d->nFxState; j++) {
599
minoff_ST = d->fxState[j].offset;
600
maxoff_ST = d->fxState[j].offset + d->fxState[j].size - 1;
601
604
if (d->fxState[j].fx == Ifx_Read || d->fxState[j].fx == Ifx_None)
603
if (!(offset_SP > maxoff_ST
604
|| (offset_SP + sizeof_SP - 1) < minoff_ST))
606
/* Enumerate the described state segments */
607
for (k = 0; k < 1 + d->fxState[j].nRepeats; k++) {
608
minoff_ST = d->fxState[j].offset + k * d->fxState[j].repeatLen;
609
maxoff_ST = minoff_ST + d->fxState[j].size - 1;
610
if (!(offset_SP > maxoff_ST
611
|| (offset_SP + sizeof_SP - 1) < minoff_ST))
1318
1344
if ((kind == T_Redir_Wrap || kind == T_Redir_Replace)
1319
1345
&& (VG_(clo_verbosity) >= 2 || VG_(clo_trace_redir))) {
1321
Char name1[64] = "";
1322
Char name2[64] = "";
1347
Char name1[512] = "";
1348
Char name2[512] = "";
1323
1349
name1[0] = name2[0] = 0;
1324
ok = VG_(get_fnname_w_offset)(nraddr, name1, 64);
1350
ok = VG_(get_fnname_w_offset)(nraddr, name1, 512);
1325
1351
if (!ok) VG_(strcpy)(name1, "???");
1326
ok = VG_(get_fnname_w_offset)(addr, name2, 64);
1352
ok = VG_(get_fnname_w_offset)(addr, name2, 512);
1327
1353
if (!ok) VG_(strcpy)(name2, "???");
1328
1354
VG_(message)(Vg_DebugMsg,
1329
1355
"REDIR: 0x%llx (%s) redirected to 0x%llx (%s)\n",
1338
1364
/* If doing any code printing, print a basic block start marker */
1339
1365
if (VG_(clo_trace_flags) || debugging_translation) {
1340
Char fnname[64] = "UNKNOWN_FUNCTION";
1341
VG_(get_fnname_w_offset)(addr, fnname, 64);
1366
Char fnname[512] = "UNKNOWN_FUNCTION";
1367
VG_(get_fnname_w_offset)(addr, fnname, 512);
1342
1368
const UChar* objname = "UNKNOWN_OBJECT";
1343
1369
OffT objoff = 0;
1344
1370
DebugInfo* di = VG_(find_DebugInfo)( addr );
1461
1488
vta.arch_host = vex_arch;
1462
1489
vta.archinfo_host = vex_archinfo;
1463
1490
vta.abiinfo_both = vex_abiinfo;
1491
vta.callback_opaque = (void*)&closure;
1464
1492
vta.guest_bytes = (UChar*)ULong_to_Ptr(addr);
1465
1493
vta.guest_bytes_addr = (Addr64)addr;
1466
vta.callback_opaque = (void*)&closure;
1467
1494
vta.chase_into_ok = chase_into_ok;
1468
vta.preamble_function = preamble_fn;
1469
1495
vta.guest_extents = &vge;
1470
1496
vta.host_bytes = tmpbuf;
1471
1497
vta.host_bytes_size = N_TMPBUF;
1486
1512
IRSB*,VexGuestLayout*,VexGuestExtents*,
1488
1514
= (IRSB*(*)(void*,IRSB*,VexGuestLayout*,VexGuestExtents*,IRType,IRType))f;
1489
vta.instrument1 = g;
1515
vta.instrument1 = g;
1491
1517
/* No need for type kludgery here. */
1492
vta.instrument2 = need_to_handle_SP_assignment()
1495
vta.finaltidy = VG_(needs).final_IR_tidy_pass
1496
? VG_(tdict).tool_final_IR_tidy_pass
1498
vta.needs_self_check = needs_self_check;
1499
vta.traceflags = verbosity;
1501
/* Set up the dispatch-return info. For archs without a link
1502
register, vex generates a jump back to the specified dispatch
1503
address. Else, it just generates a branch-to-LR. */
1505
# if defined(VGA_x86) || defined(VGA_amd64)
1506
if (!allow_redirection) {
1507
/* It's a no-redir translation. Will be run with the
1508
nonstandard dispatcher VG_(run_a_noredir_translation) and so
1509
needs a nonstandard return point. */
1510
vta.dispatch_assisted
1511
= (void*) &VG_(run_a_noredir_translation__return_point);
1512
vta.dispatch_unassisted
1513
= vta.dispatch_assisted;
1516
if (VG_(clo_profile_flags) > 0) {
1517
/* normal translation; although we're profiling. */
1518
vta.dispatch_assisted
1519
= (void*) &VG_(run_innerloop__dispatch_assisted_profiled);
1520
vta.dispatch_unassisted
1521
= (void*) &VG_(run_innerloop__dispatch_unassisted_profiled);
1524
/* normal translation and we're not profiling (the normal case) */
1525
vta.dispatch_assisted
1526
= (void*) &VG_(run_innerloop__dispatch_assisted_unprofiled);
1527
vta.dispatch_unassisted
1528
= (void*) &VG_(run_innerloop__dispatch_unassisted_unprofiled);
1531
# elif defined(VGA_ppc32) || defined(VGA_ppc64) \
1532
|| defined(VGA_arm) || defined(VGA_s390x)
1533
/* See comment in libvex.h. This target uses a
1534
return-to-link-register scheme to get back to the dispatcher, so
1535
both fields are NULL. */
1536
vta.dispatch_assisted = NULL;
1537
vta.dispatch_unassisted = NULL;
1540
# error "Unknown arch"
1518
vta.instrument2 = need_to_handle_SP_assignment()
1521
vta.finaltidy = VG_(needs).final_IR_tidy_pass
1522
? VG_(tdict).tool_final_IR_tidy_pass
1524
vta.needs_self_check = needs_self_check;
1525
vta.preamble_function = preamble_fn;
1526
vta.traceflags = verbosity;
1527
vta.addProfInc = VG_(clo_profile_flags) > 0
1528
&& kind != T_NoRedir;
1530
/* Set up the dispatch continuation-point info. If this is a
1531
no-redir translation then it cannot be chained, and the chain-me
1532
points are set to NULL to indicate that. The indir point must
1533
also be NULL, since we can't allow this translation to do an
1534
indir transfer -- that would take it back into the main
1535
translation cache too.
1537
All this is because no-redir translations live outside the main
1538
translation cache (in a secondary one) and chaining them would
1539
involve more adminstrative complexity that isn't worth the
1540
hassle, because we don't expect them to get used often. So
1542
if (allow_redirection) {
1543
vta.disp_cp_chain_me_to_slowEP
1544
= VG_(fnptr_to_fnentry)( &VG_(disp_cp_chain_me_to_slowEP) );
1545
vta.disp_cp_chain_me_to_fastEP
1546
= VG_(fnptr_to_fnentry)( &VG_(disp_cp_chain_me_to_fastEP) );
1548
= VG_(fnptr_to_fnentry)( &VG_(disp_cp_xindir) );
1550
vta.disp_cp_chain_me_to_slowEP = NULL;
1551
vta.disp_cp_chain_me_to_fastEP = NULL;
1552
vta.disp_cp_xindir = NULL;
1554
/* This doesn't involve chaining and so is always allowable. */
1555
vta.disp_cp_xassisted
1556
= VG_(fnptr_to_fnentry)( &VG_(disp_cp_xassisted) );
1543
1558
/* Sheesh. Finally, actually _do_ the translation! */
1544
1559
tres = LibVEX_Translate ( &vta );