82
static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
87
data = cpu_to_be16((reg << 12) | (value & 0xffffff));
89
return do_hw_write(codec, reg, value, &data, 2);
92
static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
97
data = cpu_to_be16((reg << 9) | (value & 0x1ff));
99
return do_hw_write(codec, reg, value, &data, 2);
102
static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
109
data[1] = value & 0xff;
111
return do_hw_write(codec, reg, value, data, 2);
114
static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
118
u16 val = cpu_to_be16(value);
121
memcpy(&data[1], &val, sizeof(val));
123
return do_hw_write(codec, reg, value, data, 3);
126
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
127
static unsigned int do_i2c_read(struct snd_soc_codec *codec,
128
void *reg, int reglen,
129
void *data, int datalen)
131
struct i2c_msg xfer[2];
133
struct i2c_client *client = codec->control_data;
136
xfer[0].addr = client->addr;
138
xfer[0].len = reglen;
142
xfer[1].addr = client->addr;
143
xfer[1].flags = I2C_M_RD;
144
xfer[1].len = datalen;
147
ret = i2c_transfer(client->adapter, xfer, 2);
157
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
158
static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
165
ret = do_i2c_read(codec, ®, 1, &data, 1);
171
#define snd_soc_8_8_read_i2c NULL
174
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
175
static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
182
ret = do_i2c_read(codec, ®, 1, &data, 2);
185
return (data >> 8) | ((data & 0xff) << 8);
188
#define snd_soc_8_16_read_i2c NULL
191
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
192
static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
199
ret = do_i2c_read(codec, ®, 2, &data, 1);
205
#define snd_soc_16_8_read_i2c NULL
208
static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
212
u16 rval = cpu_to_be16(reg);
214
memcpy(data, &rval, sizeof(rval));
217
return do_hw_write(codec, reg, value, data, 3);
220
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
221
static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
224
u16 reg = cpu_to_be16(r);
228
ret = do_i2c_read(codec, ®, 2, &data, 2);
231
return be16_to_cpu(data);
234
#define snd_soc_16_16_read_i2c NULL
237
static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
242
data[0] = cpu_to_be16(reg);
243
data[1] = cpu_to_be16(value);
245
return do_hw_write(codec, reg, value, data, sizeof(data));
248
66
/* Primitive bulk write support for soc-cache. The data pointed to by
249
* `data' needs to already be in the form the hardware expects
250
* including any leading register specific data. Any data written
251
* through this function will not go through the cache as it only
252
* handles writing to volatile or out of bounds registers.
67
* `data' needs to already be in the form the hardware expects. Any
68
* data written through this function will not go through the cache as
69
* it only handles writing to volatile or out of bounds registers.
71
* This is currently only supported for devices using the regmap API
254
static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
74
static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec,
255
76
const void *data, size_t len)
259
78
/* To ensure that we don't get out of sync with the cache, check
260
79
* whether the base register is volatile or if we've directly asked
261
80
* to bypass the cache. Out of bounds registers are considered
266
85
&& reg < codec->driver->reg_cache_size)
269
switch (codec->control_type) {
270
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
272
ret = i2c_master_send(to_i2c_client(codec->dev), data, len);
275
#if defined(CONFIG_SPI_MASTER)
277
ret = spi_write(to_spi_device(codec->dev), data, len);
88
return regmap_raw_write(codec->control_data, reg, data, len);
295
int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
296
unsigned int (*read)(struct snd_soc_codec *, unsigned int);
297
unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
300
.addr_bits = 4, .data_bits = 12,
301
.write = snd_soc_4_12_write,
304
.addr_bits = 7, .data_bits = 9,
305
.write = snd_soc_7_9_write,
308
.addr_bits = 8, .data_bits = 8,
309
.write = snd_soc_8_8_write,
310
.i2c_read = snd_soc_8_8_read_i2c,
313
.addr_bits = 8, .data_bits = 16,
314
.write = snd_soc_8_16_write,
315
.i2c_read = snd_soc_8_16_read_i2c,
318
.addr_bits = 16, .data_bits = 8,
319
.write = snd_soc_16_8_write,
320
.i2c_read = snd_soc_16_8_read_i2c,
323
.addr_bits = 16, .data_bits = 16,
324
.write = snd_soc_16_16_write,
325
.i2c_read = snd_soc_16_16_read_i2c,
330
92
* snd_soc_codec_set_cache_io: Set up standard I/O functions.
349
111
int addr_bits, int data_bits,
350
112
enum snd_soc_control_type control)
354
for (i = 0; i < ARRAY_SIZE(io_types); i++)
355
if (io_types[i].addr_bits == addr_bits &&
356
io_types[i].data_bits == data_bits)
358
if (i == ARRAY_SIZE(io_types)) {
360
"No I/O functions for %d bit address %d bit data\n",
361
addr_bits, data_bits);
365
codec->write = io_types[i].write;
114
struct regmap_config config;
116
memset(&config, 0, sizeof(config));
117
codec->write = hw_write;
366
118
codec->read = hw_read;
367
119
codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
121
config.reg_bits = addr_bits;
122
config.val_bits = data_bits;
369
124
switch (control) {
125
#if defined(CONFIG_REGMAP_I2C) || defined(CONFIG_REGMAP_I2C_MODULE)
370
126
case SND_SOC_I2C:
371
#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
372
codec->hw_write = (hw_write_t)i2c_master_send;
127
codec->control_data = regmap_init_i2c(to_i2c_client(codec->dev),
374
if (io_types[i].i2c_read)
375
codec->hw_read = io_types[i].i2c_read;
377
codec->control_data = container_of(codec->dev,
132
#if defined(CONFIG_REGMAP_SPI) || defined(CONFIG_REGMAP_SPI_MODULE)
382
133
case SND_SOC_SPI:
383
#ifdef CONFIG_SPI_MASTER
384
codec->hw_write = do_spi_write;
134
codec->control_data = regmap_init_spi(to_spi_device(codec->dev),
387
codec->control_data = container_of(codec->dev,
140
/* Device has made its own regmap arrangements */
147
if (IS_ERR(codec->control_data))
148
return PTR_ERR(codec->control_data);
395
152
EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);