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* Copyright © 2006 Intel Corporation
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* Wang Zhenyu <zhenyu.z.wang@intel.com>
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* Keith Packard <keithp@keithp.com>
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/* Sample the src surface */
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/* prepare sampler read back gX register, which would be written back to output */
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/* use simd16 sampler, param 0 is u, param 1 is v. */
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/* 'payload' loading, assuming tex coord start from g4 */
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mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable };
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mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
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/* src_msg will be copied with g0, as it contains send desc */
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/* emit sampler 'send' cmd */
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send (16) src_msg_ind /* msg reg index */
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src_sample_a_01<1>UW /* readback */
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sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
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/* here(src->dst) we should use src_sampler and src_surface */
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mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */
added
removed
src/render_program/exa_wm_src_sample_a.g5a
