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#include "hw/pci_host.h"
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#include "hw/xics.h"
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#define SPAPR_MSIX_MAX_DEVS 32
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#define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge"
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#define SPAPR_PCI_HOST_BRIDGE(obj) \
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OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE)
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typedef struct sPAPRPHBState {
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PCIHostState host_state;
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PCIHostState parent_obj;
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MemoryRegion memspace, iospace;
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target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size;
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MemoryRegion memwindow, iowindow;
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target_phys_addr_t msi_win_addr;
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MemoryRegion memwindow, iowindow, msiwindow;
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uint64_t dma_window_start;
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uint64_t dma_window_size;
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} lsi_table[PCI_NUM_PINS];
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} msi_table[SPAPR_MSIX_MAX_DEVS];
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QLIST_ENTRY(sPAPRPHBState) list;
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static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
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return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq);
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#define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
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#define SPAPR_PCI_IO_WIN_SIZE 0x10000
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void spapr_create_phb(sPAPREnvironment *spapr,
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const char *busname, uint64_t buid,
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uint64_t mem_win_addr, uint64_t mem_win_size,
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uint64_t io_win_addr);
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int spapr_populate_pci_devices(sPAPRPHBState *phb,
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uint32_t xics_phandle,
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uint64_t io_win_addr, uint64_t msi_win_addr);
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int spapr_populate_pci_dt(sPAPRPHBState *phb,
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uint32_t xics_phandle,
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void spapr_pci_rtas_init(void);
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#endif /* __HW_SPAPR_PCI_H__ */