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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* Copyright © 2002-2010, Intel Corporation.
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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*-----------------------------------------------------------------------------
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* Contain header information for set mode support
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*-----------------------------------------------------------------------------
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/* IO.h is needed for the FAR define */
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#include <displayid.h>
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#include <igd_render.h>
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#define IGD_INVALID_MODE 0
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#define IGD_PLANE_FEATURES_MASK 0x000000FF
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#define IGD_PLANE_DISPLAY 0x00000001
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#define IGD_PLANE_OVERLAY 0x00000002
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#define IGD_PLANE_SPRITE 0x00000004
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#define IGD_PLANE_CURSOR 0x00000008
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#define IGD_PLANE_VGA 0x00000010
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#define IGD_PLANE_DOUBLE 0x00000020
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/*#define IGD_PLANE_CLONE 0x00000040 currently unused */
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#define IGD_PLANE_DIH 0x00000080
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#define IGD_PLANE_USE_PIPEA 0x00000100
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#define IGD_PLANE_USE_PIPEB 0x00000200
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/* pipe's supported features */
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#define IGD_PIPE_FEATURES_MASK 0x000000FF
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#define IGD_PIPE_DOUBLE 0x00000001
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/* the following 2 bits are not pipe features but
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* pipe identification bits that share the same
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* pipe_features variable of the pipe structure
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* NOTE that these bit-wise OR flags in nibble-2
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* are also used in the port_features variable
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* of the port structure (same locations) but
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* called IGD_PORT_USE_PIPEX
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#define IGD_PIPE_IS_PIPEA 0x00000100
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#define IGD_PIPE_IS_PIPEB 0x00000200
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* Cursor's supported features
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* cursor's pipe usage regulations. These are copies of the PIPE_IS_ bits so
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* that a quick (pipe_features & plane_features & MASK) will tell you if
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* the pipe can be used.
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#define IGD_CURSOR_USE_PIPE_MASK 0x00000F00
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#define IGD_CURSOR_USE_PIPEA IGD_PIPE_IS_PIPEA
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#define IGD_CURSOR_USE_PIPEB IGD_PIPE_IS_PIPEB
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* Port's supported features
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* port features also uses IGD_PORT_SHARE_MASK thus port feature bits
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* cannot collide with IGD_PORT_SHARE_MASK
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#define IGD_PORT_FEATURES_MASK 0x000000FF
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#define IGD_RGBA_COLOR 0x00000001
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#define IGD_RGBA_ALPHA 0x00000002
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#define IGD_VGA_COMPRESS 0x00000004 /* Compress VGA to 640x480 */
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#define IGD_PORT_GANG 0x00000008
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* port's pipe usage regulations. These are copies of the PIPE_IS_ bits so
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* that a quick (pipe_features & port_features & MASK) will tell you if
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* the pipe can be used.
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#define IGD_PORT_USE_PIPE_MASK 0x00000F00
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#define IGD_PORT_USE_PIPE_MASK_SHIFT 8
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#define IGD_PORT_USE_PIPEA IGD_PIPE_IS_PIPEA
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#define IGD_PORT_USE_PIPEB IGD_PIPE_IS_PIPEB
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* Ports Sharing information. The port in question can share a pipe with the
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* listed ports. If a shares with b, b must share with a too.
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* Must be the same as IGD_PORT_MASK = 0x3f000
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#define IGD_PORT_SHARE_MASK IGD_PORT_MASK
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#define IGD_PORT_SHARE_ANALOG IGD_PORT_ANALOG
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#define IGD_PORT_SHARE_DIGITAL IGD_PORT_DIGITAL
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#define IGD_PORT_SHARE_LVDS IGD_PORT_LVDS
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#define IGD_PORT_SHARE_TV IGD_PORT_TV
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/* MAX rings, planes and ports connected to a pipe */
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#define IGD_MAX_PIPE_QUEUES 4
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#define IGD_MAX_PIPE_PLANES 5
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#define IGD_MAX_PIPE_DISPLAYS 4
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#define IGD_MAX_PIPES 2
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#define MAX_DISPLAYS IGD_MAX_DISPLAYS /* From igd_mode.h */
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/* Parameters to mode_update_plane_pipe_ports */
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#define MODE_UPDATE_PLANE 0x1
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#define MODE_UPDATE_PIPE 0x2
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#define MODE_UPDATE_PORT 0x4
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#define MODE_UPDATE_NONE 0x0
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#define PLANE(display) \
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((igd_display_plane_t *)(((igd_display_context_t *)display)->plane))
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#define PIPE(display) \
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((igd_display_pipe_t *)(((igd_display_context_t *)display)->pipe))
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#define PORT(display, pn) \
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((igd_display_port_t *)(((igd_display_context_t *)display)->port[pn-1]))
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#define PORT_OWNER(display) \
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((igd_display_port_t *)(((igd_display_context_t *)display)->port[display->port_number-1]))
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#define MODE_IS_SUPPORTED(t) (t->mode_info_flags & IGD_MODE_SUPPORTED)
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#define MODE_IS_VGA(t) \
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((((pd_timing_t *)t)->mode_info_flags & IGD_MODE_VESA) && \
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(t->mode_number < 0x1D))
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/* #define DC_PORT_NUMBER(dc, i) ((dc >> (i * 4)) & 0x0f) */
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#define DC_PORT_NUMBER IGD_DC_PORT_NUMBER
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/* This structure is used for the mode table which is a list of all
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* supported modes. */
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typedef pd_timing_t igd_timing_info_t, *pigd_timing_info_t;
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* NOTE: The plane typedef is a generic type. Each plane type has an
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* equivalent typedef that is more specific to the type of plane. They
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* MUST remain equivalent. If you change one you must change them all.
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typedef struct _igd_plane {
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unsigned long plane_reg; /* plane control register */
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unsigned long plane_features; /* plane feature list */
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int inuse; /* plane inuse ? */
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int ref_cnt; /* # of displays using this plane */
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unsigned long *pixel_formats; /* supported pixel formats */
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void *plane_info; /* ptr to plane_info */
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struct _igd_plane *mirror; /* pointer to mirror plane */
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typedef struct _igd_display_plane {
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unsigned long plane_reg; /* plane contron register */
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unsigned long plane_features; /* list of plane features */
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int inuse; /* plane inuse ? */
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int ref_cnt; /* # of displays using this plane */
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unsigned long *pixel_formats; /* list of pixel formats supported */
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igd_framebuffer_info_t *fb_info; /* attached fb to this plane */
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struct _igd_display_plane *mirror; /* pointer to mirror plane */
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} igd_display_plane_t, *pigd_display_plane_t;
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typedef struct _igd_cursor {
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unsigned long cursor_reg; /* cursor control register */
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unsigned long plane_features; /* cursor plane features */
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int inuse; /* is this cursor in use? */
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int ref_cnt; /* # of displays using this plane */
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unsigned long *pixel_formats; /* list of pixel_formats supported */
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igd_cursor_info_t *cursor_info;
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struct _igd_cursor *mirror; /* pointer to mirror plane */
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typedef struct _igd_clock {
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unsigned long dpll_control; /* DPLL control register */
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unsigned long mnp; /* FPx0 register */
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unsigned long p_shift; /* Bit location of P within control */
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unsigned long actual_dclk; /* The actual dotclock after calculating dpll */
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typedef struct _igd_display_pipe {
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unsigned long pipe_num; /* 0 Based index */
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unsigned long pipe_reg; /* pipe configuration register */
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unsigned long timing_reg; /* timing register(htotal) */
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unsigned long palette_reg; /* palette register */
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igd_clock_t *clock_reg; /* DPLL clock registers */
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unsigned long pipe_features; /* pipe features */
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int inuse; /* pipe allocated? TRUE/FALSE */
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int ref_cnt; /* # of displays using this pipe */
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cmd_queue_t *queue[IGD_MAX_PIPE_QUEUES]; /* Queues for this pipe */
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igd_display_plane_t *plane; /* dsp plane connected to pipe */
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igd_cursor_t *cursor; /* cursor connected to this pipe */
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void *sprite; /* sprite connected to this pipe */
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igd_timing_info_t *timing; /* current timings on the port */
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igd_display_context_t *owner; /* owner display of this pipe */
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unsigned long dclk; /* current dclk running on this pipe */
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}igd_display_pipe_t, *pigd_display_pipe_t;
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typedef struct _igd_display_port {
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unsigned long port_type; /* port type */
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unsigned long port_number; /* port number */
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char port_name[8]; /* port name DVO A, B, C, LVDS, ANALOG */
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unsigned long port_reg; /* port control register */
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unsigned long i2c_reg; /* GPIO pins for i2c on this port */
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unsigned long dab; /* i2c Device Address Byte */
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unsigned long ddc_reg; /* GPIO pins for DDC on this port */
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unsigned long ddc_dab;
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unsigned long port_features; /* port features */
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unsigned long clock_bits; /* Clock input to use */
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int inuse; /* port is in use */
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unsigned long power_state; /* D Power state for the display/port */
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unsigned long bl_power_state; /* D Power state for the FP backlight */
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struct _igd_display_port *mult_port;/* pointer to multiplexed port,
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* if it is used in that way */
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igd_display_info_t *pt_info; /* port timing info */
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pd_driver_t *pd_driver;
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void *pd_context; /* Context returned from PD */
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pd_callback_t *callback; /* DD Callback to passed to PD */
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unsigned long num_timing; /* number of timings available */
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igd_timing_info_t *timing_table; /* static/dynamic PD timings list */
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unsigned long i2c_speed; /* Connected encoder's I2C bus speed */
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unsigned long ddc_speed; /* DDC speed in KHz */
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igd_param_fp_info_t *fp_info; /* Flat panel parameter info if any */
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igd_param_dtd_list_t *dtd_list; /* EDID-less DTD info if any */
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igd_param_attr_list_t *attr_list; /* Saved attributes if any */
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igd_attr_t *tmp_attr; /* Temp attr array, for copying */
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unsigned int tmp_attr_num; /* Number of attr in temp array */
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igd_timing_info_t *fp_native_dtd; /* FP native DTD */
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unsigned long pd_type; /* Display type given by port driver */
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unsigned long pd_flags; /* port driver flags */
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unsigned long saved_bl_power_state;
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/* This attribute list is designed to eventually suck in things above
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* such as fb_info. For now, it only has color correction attributes */
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igd_attr_t *attributes;
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unsigned char firmware_type;
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displayid_t *displayid;
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edid_t *edid; /* EDID information */
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/* Added for VBIOS size Reduction */
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unsigned long preserve;
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unsigned long mult_preserve;
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unsigned long vga_sync;
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}igd_display_port_t, *pigd_display_port_t;
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/* This structure is used to save mode state.
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* Rightnow, it is saving state of current port and its port driver state.
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* This information is used while restoring to a previously saved mode
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* TODO: This can be extended to save all display modules (mode, dsp, pi) reg
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* information along with port driver's state information. This requires
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* changes to exiting reg module. */
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#define MAX_PORT_DRIVERS 20
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typedef struct _mode_pd_state {
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igd_display_port_t *port; /* display port */
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void *state; /* and its port driver state */
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typedef struct _mode_state_t {
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mode_pd_state_t pd_state[MAX_PORT_DRIVERS];
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#endif // _IGD_MODE_H_
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/*----------------------------------------------------------------------------
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* File Revision History
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* $Id: mode.h,v 1.6 2011/02/16 17:04:48 astead Exp $
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* $Source: /nfs/fm/proj/eia/cvsroot/koheo/linux/egd_drm/emgd/include/mode.h,v $
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*----------------------------------------------------------------------------
added
removed
emgd-dkms-kernel39/emgd/include/mode.h
