2
* Copyright (c) 2003-2004 Jakub Jermar
5
* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions
9
* - Redistributions of source code must retain the above copyright
10
* notice, this list of conditions and the following disclaimer.
11
* - Redistributions in binary form must reproduce the above copyright
12
* notice, this list of conditions and the following disclaimer in the
13
* documentation and/or other materials provided with the distribution.
14
* - The name of the author may not be used to endorse or promote products
15
* derived from this software without specific prior written permission.
17
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
/** @addtogroup mips32interrupt
35
#include <interrupt.h>
36
#include <arch/interrupt.h>
37
#include <arch/types.h>
40
#include <time/clock.h>
41
#include <ipc/sysipc.h>
42
#include <ddi/device.h>
48
function virtual_timer_fnc = NULL;
49
static irq_t timer_irq;
51
/** Disable interrupts.
53
* @return Old interrupt priority level.
55
ipl_t interrupts_disable(void)
57
ipl_t ipl = (ipl_t) cp0_status_read();
58
cp0_status_write(ipl & ~cp0_status_ie_enabled_bit);
62
/** Enable interrupts.
64
* @return Old interrupt priority level.
66
ipl_t interrupts_enable(void)
68
ipl_t ipl = (ipl_t) cp0_status_read();
69
cp0_status_write(ipl | cp0_status_ie_enabled_bit);
73
/** Restore interrupt priority level.
75
* @param ipl Saved interrupt priority level.
77
void interrupts_restore(ipl_t ipl)
79
cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit));
82
/** Read interrupt priority level.
84
* @return Current interrupt priority level.
86
ipl_t interrupts_read(void)
88
return cp0_status_read();
91
/* TODO: This is SMP unsafe!!! */
92
uint32_t count_hi = 0;
93
static unsigned long nextcount;
94
static unsigned long lastcount;
96
/** Start hardware clock */
97
static void timer_start(void)
99
lastcount = cp0_count_read();
100
nextcount = cp0_compare_value + cp0_count_read();
101
cp0_compare_write(nextcount);
104
static irq_ownership_t timer_claim(irq_t *irq)
109
static void timer_irq_handler(irq_t *irq)
113
if (cp0_count_read() < lastcount)
114
/* Count overflow detected */
116
lastcount = cp0_count_read();
118
drift = cp0_count_read() - nextcount;
119
while (drift > cp0_compare_value) {
120
drift -= cp0_compare_value;
121
CPU->missed_clock_ticks++;
123
nextcount = cp0_count_read() + cp0_compare_value - drift;
124
cp0_compare_write(nextcount);
127
* We are holding a lock which prevents preemption.
128
* Release the lock, call clock() and reacquire the lock again.
130
spinlock_unlock(&irq->lock);
132
spinlock_lock(&irq->lock);
134
if (virtual_timer_fnc != NULL)
138
/* Initialize basic tables for exception dispatching */
139
void interrupt_init(void)
141
irq_init(IRQ_COUNT, IRQ_COUNT);
143
irq_initialize(&timer_irq);
144
timer_irq.devno = device_assign_devno();
145
timer_irq.inr = TIMER_IRQ;
146
timer_irq.claim = timer_claim;
147
timer_irq.handler = timer_irq_handler;
148
irq_register(&timer_irq);
151
cp0_unmask_int(TIMER_IRQ);