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Viewing changes to src/amd/common/ac_nir_lower_tess_io_to_mem.c

  • Committer: mmach
  • Date: 2021-07-04 19:28:58 UTC
  • Revision ID: netbit73@gmail.com-20210704192858-3dzjz3h2a015l3mq
2021-07-04 21:20:24

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Lines of Context:
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                                .align_mul = 16u, .align_offset = (nir_intrinsic_component(intrin) * 4u) % 16u);
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}
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static void
 
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update_hs_scoped_barrier(nir_intrinsic_instr *intrin)
 
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{
 
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   /* Output loads and stores are lowered to shared memory access,
 
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    * so we have to update the barriers to also reflect this.
 
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    */
 
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   unsigned mem_modes = nir_intrinsic_memory_modes(intrin);
 
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   if (mem_modes & nir_var_shader_out)
 
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      mem_modes |= nir_var_mem_shared;
 
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   nir_intrinsic_set_memory_modes(intrin, mem_modes);
 
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}
 
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static nir_ssa_def *
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lower_hs_output_access(nir_builder *b,
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                       nir_instr *instr,
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       intrin->intrinsic == nir_intrinsic_store_per_vertex_output) {
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      lower_hs_output_store(b, intrin, st);
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      return NIR_LOWER_INSTR_PROGRESS_REPLACE;
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   } else {
 
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   } else if (intrin->intrinsic == nir_intrinsic_load_output ||
 
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              intrin->intrinsic == nir_intrinsic_load_per_vertex_output) {
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      return lower_hs_output_load(b, intrin, st);
 
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   } else if (intrin->intrinsic == nir_intrinsic_scoped_barrier) {
 
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      update_hs_scoped_barrier(intrin);
 
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      return NIR_LOWER_INSTR_PROGRESS;
 
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   } else {
 
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      unreachable("intrinsic not supported by lower_hs_output_access");
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   }
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}
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}
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static bool
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filter_any_output_access(const nir_instr *instr,
 
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filter_hs_output_access(const nir_instr *instr,
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                         UNUSED const void *st)
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{
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   if (instr->type != nir_instr_type_intrinsic)
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   return intrin->intrinsic == nir_intrinsic_store_output ||
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          intrin->intrinsic == nir_intrinsic_store_per_vertex_output ||
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          intrin->intrinsic == nir_intrinsic_load_output ||
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          intrin->intrinsic == nir_intrinsic_load_per_vertex_output;
 
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          intrin->intrinsic == nir_intrinsic_load_per_vertex_output ||
 
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          intrin->intrinsic == nir_intrinsic_scoped_barrier;
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}
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static bool
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   };
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   nir_shader_lower_instructions(shader,
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                                 filter_any_output_access,
 
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                                 filter_hs_output_access,
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                                 lower_hs_output_access,
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                                 &state);
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