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.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.43.3.
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.TH LLVM-MCMARKUP "1" "December 2013" "llvm-mcmarkup 3.4" "User Commands"
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llvm-mcmarkup \- manual page for llvm-mcmarkup 3.4
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OVERVIEW: llvm MC markup parser
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USAGE: llvm\-mcmarkup [options] <input files>
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\fB\-asm\-verbose\fR \- Add comments to directives.
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\fB\-bounds\-checking\-single\-trap\fR \- Use one trap block per function
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\fB\-cppfname=\fR<function name> \- Specify the name of the generated function
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\fB\-cppfor=\fR<string> \- Specify the name of the thing to generate
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\fB\-cppgen\fR \- Choose what kind of output to generate
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\- Generate a complete program
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\- Generate a module definition
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\- Generate contents of a module
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\- Generate a function definition
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\- Generate all function definitions
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\- Generate an inline function
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\- Generate a variable definition
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\- Generate a type definition
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\fB\-disable\-debug\-info\-verifier\fR \-
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\fB\-disable\-spill\-fusing\fR \- Disable fusing of spill code into instructions
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\fB\-dump\-tags\fR \- List all tags encountered in input
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\fB\-enable\-correct\-eh\-support\fR \- Make the \fB\-lowerinvoke\fR pass insert expensive, but correct, EH code
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\fB\-enable\-load\-pre\fR \-
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\fB\-enable\-objc\-arc\-opts\fR \- enable/disable all ARC Optimizations
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\fB\-enable\-tbaa\fR \-
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\fB\-fatal\-assembler\-warnings\fR \- Consider warnings as error
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\fB\-fdata\-sections\fR \- Emit data into separate sections
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\fB\-ffunction\-sections\fR \- Emit functions into separate sections
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\fB\-help\fR \- Display available options (\fB\-help\-hidden\fR for more)
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\fB\-internalize\-public\-api\-file=\fR<filename> \- A file containing list of symbol names to preserve
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\fB\-internalize\-public\-api\-list=\fR<list> \- A list of symbol names to preserve
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\fB\-join\-liveintervals\fR \- Coalesce copies (default=true)
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\fB\-limit\-float\-precision=\fR<uint> \- Generate low\-precision inline sequences for some float libcalls
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\fB\-mc\-x86\-disable\-arith\-relaxation\fR \- Disable relaxation of arithmetic instruction for X86
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\fB\-mips16\-hard\-float\fR \- MIPS: mips16 hard float enable.
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\fB\-mno\-ldc1\-sdc1\fR \- Expand double precision loads and stores to their single precision counterparts
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\fB\-nvptx\-sched4reg\fR \- NVPTX Specific: schedule for register pressue
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\fB\-pre\-RA\-sched\fR \- Instruction schedulers available (before register allocation):
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\- Bottom\-up register pressure aware list scheduling which tries to balance ILP and register pressure
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\- Bottom\-up register pressure aware list scheduling which tries to balance latency and register pressure
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\- Similar to list\-burr but schedules in source order when possible
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\- Bottom\-up register reduction list scheduling
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\- Linearize DAG, no scheduling
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\- Fast suboptimal list scheduling
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\- Best scheduler for the target
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\fB\-print\-after\-all\fR \- Print IR after each pass
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\fB\-print\-before\-all\fR \- Print IR before each pass
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\fB\-print\-machineinstrs=\fR<pass\-name> \- Print machine instrs
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\fB\-regalloc\fR \- Register allocator to use
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\- pick register allocator based on \fB\-O\fR option
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\- basic register allocator
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\- fast register allocator
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\- greedy register allocator
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\- PBQP register allocator
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\fB\-spiller\fR \- Spiller to use: (default: standard)
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\fB\-stats\fR \- Enable statistics output from program (available with Asserts)
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\fB\-time\-passes\fR \- Time each pass, printing elapsed time for each on exit
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\fB\-verify\-dom\-info\fR \- Verify dominator info (time consuming)
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\fB\-verify\-loop\-info\fR \- Verify loop info (time consuming)
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\fB\-verify\-regalloc\fR \- Verify during register allocation
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\fB\-verify\-region\-info\fR \- Verify region info (time consuming)
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\fB\-verify\-scev\fR \- Verify ScalarEvolution's backedge taken counts (slow)
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\fB\-version\fR \- Display the version of this program
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\fB\-x86\-asm\-syntax\fR \- Choose style of code to emit from X86 backend:
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\- Emit AT&T\-style assembly
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\- Emit Intel\-style assembly
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The full documentation for
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is maintained as a Texinfo manual. If the
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programs are properly installed at your site, the command
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.B info llvm-mcmarkup
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should give you access to the complete manual.