99
99
{ "addCS", "d1,=/#I", 0x028F0000, ARM_TYPE5, ARM_SHIFT|ARM_IMMEDIATE|ARM_D|ARM_PCR },
100
100
{ "subCS", "d1,=/#I", 0x028F0000, ARM_TYPE5, ARM_SHIFT|ARM_IMMEDIATE|ARM_D|ARM_PCR },
101
{ "adrCS", "d1,/#I", 0x028F0000, ARM_TYPE5, ARM_SHIFT|ARM_IMMEDIATE|ARM_D|ARM_PCR },
103
104
{ "lslCS", "d0,m0,z\x00", 0x01A00000, ARM_TYPE5, ARM_D|ARM_M|ARM_REGISTER },