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Viewing changes to arch/arm/kernel/perf_event.c

  • Committer: Package Import Robot
  • Author(s): Ben Hutchings, Ben Hutchings
  • Date: 2012-03-21 03:08:36 UTC
  • mfrom: (1.2.34)
  • Revision ID: package-import@ubuntu.com-20120321030836-rvavg03lkz15wj2q
Tags: 3.3-1~experimental.1
http://bugs.debian.org/663041
* New upstream release: http://kernelnewbies.org/Linux_3.3

[ Ben Hutchings ]
* [x86] crypto: Enable CRYPTO_SERPENT_SSE2_586, CRYPTO_SERPENT_SSE2_X86_64
* aufs: Update to aufs3.x-rcN-20120312
* IB: Enable INFINIBAND_SRPT as module (Closes: #663041)

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Lines of Context:
arch/arm/kernel/perf_event.c
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u64
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armpmu_event_update(struct perf_event *event,
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                    struct hw_perf_event *hwc,
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                    int idx, int overflow)
 
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                    int idx)
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{
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        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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        u64 delta, prev_raw_count, new_raw_count;
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                             new_raw_count) != prev_raw_count)
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                goto again;
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        new_raw_count &= armpmu->max_period;
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        prev_raw_count &= armpmu->max_period;
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        if (overflow)
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                delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
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        else
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                delta = new_raw_count - prev_raw_count;
 
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        delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
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        local64_add(delta, &event->count);
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        local64_sub(delta, &hwc->period_left);
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        if (hwc->idx < 0)
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                return;
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        armpmu_event_update(event, hwc, hwc->idx, 0);
 
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        armpmu_event_update(event, hwc, hwc->idx);
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}
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static void
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        if (!(hwc->state & PERF_HES_STOPPED)) {
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                armpmu->disable(hwc, hwc->idx);
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                barrier(); /* why? */
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                armpmu_event_update(event, hwc, hwc->idx, 0);
 
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                armpmu_event_update(event, hwc, hwc->idx);
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                hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
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        }
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}
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        hwc->config_base            |= (unsigned long)mapping;
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        if (!hwc->sample_period) {
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                hwc->sample_period  = armpmu->max_period;
 
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                /*
 
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                 * For non-sampling runs, limit the sample_period to half
 
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                 * of the counter width. That way, the new counter value
 
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                 * is far less likely to overtake the previous one unless
 
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                 * you have some serious IRQ latency issues.
 
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                 */
 
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                hwc->sample_period  = armpmu->max_period >> 1;
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                hwc->last_period    = hwc->sample_period;
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                local64_set(&hwc->period_left, hwc->sample_period);
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        }
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}
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/*
 
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 * PMU hardware loses all context when a CPU goes offline.
 
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 * When a CPU is hotplugged back in, since some hardware registers are
 
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 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
 
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 * junk values out of them.
 
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 */
 
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static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
 
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                                        unsigned long action, void *hcpu)
 
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{
 
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        if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
 
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                return NOTIFY_DONE;
 
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        if (cpu_pmu && cpu_pmu->reset)
 
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                cpu_pmu->reset(NULL);
 
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        return NOTIFY_OK;
 
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}
 
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static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
 
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        .notifier_call = pmu_cpu_notify,
 
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};
 
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/*
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 * CPU PMU identification and registration.
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 */
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static int __init
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                pr_info("enabled with %s PMU driver, %d counters available\n",
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                        cpu_pmu->name, cpu_pmu->num_events);
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                cpu_pmu_init(cpu_pmu);
 
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                register_cpu_notifier(&pmu_cpu_notifier);
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                armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
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        } else {
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                pr_info("no hardware support available\n");