41
40
msg_cdbg("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
44
int probe_82802ab(struct flashchip *flash)
43
int probe_82802ab(struct flashctx *flash)
46
45
chipaddr bios = flash->virtual_memory;
48
uint8_t flashcontent1, flashcontent2;
46
uint8_t id1, id2, flashcontent1, flashcontent2;
49
47
int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0;
51
49
/* Reset to get a clean state */
52
chip_writeb(0xFF, bios);
50
chip_writeb(flash, 0xFF, bios);
53
51
programmer_delay(10);
55
53
/* Enter ID mode */
56
chip_writeb(0x90, bios);
54
chip_writeb(flash, 0x90, bios);
57
55
programmer_delay(10);
59
id1 = chip_readb(bios + (0x00 << shifted));
60
id2 = chip_readb(bios + (0x01 << shifted));
57
id1 = chip_readb(flash, bios + (0x00 << shifted));
58
id2 = chip_readb(flash, bios + (0x01 << shifted));
62
60
/* Leave ID mode */
63
chip_writeb(0xFF, bios);
61
chip_writeb(flash, 0xFF, bios);
65
63
programmer_delay(10);
69
67
if (!oddparity(id1))
70
68
msg_cdbg(", id1 parity violation");
72
/* Read the product ID location again. We should now see normal flash contents. */
73
flashcontent1 = chip_readb(bios + (0x00 << shifted));
74
flashcontent2 = chip_readb(bios + (0x01 << shifted));
71
* Read the product ID location again. We should now see normal
74
flashcontent1 = chip_readb(flash, bios + (0x00 << shifted));
75
flashcontent2 = chip_readb(flash, bios + (0x01 << shifted));
76
77
if (id1 == flashcontent1)
77
78
msg_cdbg(", id1 is normal flash content");
91
uint8_t wait_82802ab(struct flashchip *flash)
92
uint8_t wait_82802ab(struct flashctx *flash)
94
95
chipaddr bios = flash->virtual_memory;
96
chip_writeb(0x70, bios);
97
if ((chip_readb(bios) & 0x80) == 0) { // it's busy
98
while ((chip_readb(bios) & 0x80) == 0) ;
97
chip_writeb(flash, 0x70, bios);
98
if ((chip_readb(flash, bios) & 0x80) == 0) { // it's busy
99
while ((chip_readb(flash, bios) & 0x80) == 0) ;
101
status = chip_readb(bios);
102
status = chip_readb(flash, bios);
103
104
/* Reset to get a clean state */
104
chip_writeb(0xFF, bios);
105
chip_writeb(flash, 0xFF, bios);
109
int unlock_82802ab(struct flashchip *flash)
110
int unlock_82802ab(struct flashctx *flash)
112
113
//chipaddr wrprotect = flash->virtual_registers + page + 2;
114
115
for (i = 0; i < flash->total_size * 1024; i+= flash->page_size)
116
chip_writeb(0, flash->virtual_registers + i + 2);
116
chip_writeb(flash, 0, flash->virtual_registers + i + 2);
122
int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize)
121
int erase_block_82802ab(struct flashctx *flash, unsigned int page,
122
unsigned int pagesize)
124
124
chipaddr bios = flash->virtual_memory;
127
127
// clear status register
128
chip_writeb(0x50, bios + page);
128
chip_writeb(flash, 0x50, bios + page);
131
chip_writeb(0x20, bios + page);
132
chip_writeb(0xd0, bios + page);
131
chip_writeb(flash, 0x20, bios + page);
132
chip_writeb(flash, 0xd0, bios + page);
133
133
programmer_delay(10);
135
135
// now let's see what the register is
143
143
/* chunksize is 1 */
144
int write_82802ab(struct flashchip *flash, uint8_t *src, int start, int len)
144
int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start,
147
148
chipaddr dst = flash->virtual_memory + start;
149
150
for (i = 0; i < len; i++) {
150
151
/* transfer data from source to destination */
151
chip_writeb(0x40, dst);
152
chip_writeb(*src++, dst++);
152
chip_writeb(flash, 0x40, dst);
153
chip_writeb(flash, *src++, dst++);
153
154
wait_82802ab(flash);
160
int unlock_28f004s5(struct flashchip *flash)
161
int unlock_28f004s5(struct flashctx *flash)
162
163
chipaddr bios = flash->virtual_memory;
163
164
uint8_t mcfg, bcfg, need_unlock = 0, can_unlock = 0;
166
167
/* Clear status register */
167
chip_writeb(0x50, bios);
168
chip_writeb(flash, 0x50, bios);
169
170
/* Read identifier codes */
170
chip_writeb(0x90, bios);
171
chip_writeb(flash, 0x90, bios);
172
173
/* Read master lock-bit */
173
mcfg = chip_readb(bios + 0x3);
174
mcfg = chip_readb(flash, bios + 0x3);
174
175
msg_cdbg("master lock is ");
176
177
msg_cdbg("locked!\n");
178
179
msg_cdbg("unlocked!\n");
182
183
/* Read block lock-bits */
183
184
for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) {
184
bcfg = chip_readb(bios + i + 2); // read block lock config
185
bcfg = chip_readb(flash, bios + i + 2); // read block lock config
185
186
msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un");
192
chip_writeb(0xFF, bios);
194
/* Unlock: clear block lock-bits, if needed */
195
if (can_unlock && need_unlock) {
196
msg_cdbg("Unlock: ");
197
chip_writeb(0x60, bios);
198
chip_writeb(0xD0, bios);
199
chip_writeb(0xFF, bios);
193
chip_writeb(flash, 0xFF, bios);
195
/* Unlock: clear block lock-bits, if needed */
196
if (can_unlock && need_unlock) {
197
msg_cdbg("Unlock: ");
198
chip_writeb(flash, 0x60, bios);
199
chip_writeb(flash, 0xD0, bios);
200
chip_writeb(flash, 0xFF, bios);
204
/* Error: master locked or a block is locked */
205
if (!can_unlock && need_unlock) {
206
msg_cerr("At least one block is locked and lockdown is active!\n");
213
int unlock_lh28f008bjt(struct flashctx *flash)
215
chipaddr bios = flash->virtual_memory;
217
uint8_t need_unlock = 0, can_unlock = 0;
220
/* Wait if chip is busy */
223
/* Read identifier codes */
224
chip_writeb(flash, 0x90, bios);
226
/* Read master lock-bit */
227
mcfg = chip_readb(flash, bios + 0x3);
228
msg_cdbg("master lock is ");
230
msg_cdbg("locked!\n");
232
msg_cdbg("unlocked!\n");
236
/* Read block lock-bits, 8 * 8 KB + 15 * 64 KB */
237
for (i = 0; i < flash->total_size * 1024;
238
i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) {
239
bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */
240
msg_cdbg("block lock at %06x is %slocked!\n", i,
247
chip_writeb(flash, 0xFF, bios);
249
/* Unlock: clear block lock-bits, if needed */
250
if (can_unlock && need_unlock) {
251
msg_cdbg("Unlock: ");
252
chip_writeb(flash, 0x60, bios);
253
chip_writeb(flash, 0xD0, bios);
254
chip_writeb(flash, 0xFF, bios);
200
256
msg_cdbg("Done!\n");