7
@ Section A6.1.3 "Use of 0b1101 as a register specifier".
9
@ R13 as the source or destination register of a mov instruction.
10
@ only register to register transfers without shifts are supported,
11
@ with no flag setting
16
@ Using the following instructions to adjust r13 up or down by a
28
@ R13 as a base register <Rn> of any load/store instruction.
50
@ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.
54
add r0, sp, r0, lsl #1
55
adds r0, sp, r0, lsl #1
69
@ ADD (sp plus immediate).
81
@ ADD (sp plus register).
85
add r0, sp, r0, lsl #1
88
adds r0, sp, r0, lsl #1
91
add sp, sp, r0, lsl #1
93
adds sp, sp, r0, lsl #1
97
@ SUB (sp minus immediate).
107
@ SUB (sp minus register).
111
sub r0, sp, r0, lsl #1
112
subs r0, sp, r0, lsl #1
114
sub sp, sp, r0, lsl #1
115
subs sp, sp, r0, lsl #1
117
@ PC-related insns (equivalent to adr).
126
@ nops to pad the section out to an alignment boundary.