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/* Copyright (c) 2002, Marek Michalkiewicz
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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/* $Id: iotn11.h,v 1.5 2004/11/01 22:23:56 arcanum Exp $ */
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/* avr/iotn11.h - definitions for ATtiny10/11 */
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#ifndef _AVR_IOTN11_H_
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#define _AVR_IOTN11_H_ 1
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/* This file should only be included from <avr/io.h>, never directly. */
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# error "Include <avr/io.h> instead of this file."
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# define _AVR_IOXXX_H_ "iotn11.h"
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# error "Attempt to include more than one <avr/ioXXX.h> file."
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# warning "MCU not supported by the C compiler"
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/* 0x00..0x07 reserved */
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/* Analog Comparator Control and Status Register */
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#define ACSR _SFR_IO8(0x08)
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/* 0x09..0x15 reserved */
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/* Input Pins, Port B */
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#define PINB _SFR_IO8(0x16)
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/* Data Direction Register, Port B */
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#define DDRB _SFR_IO8(0x17)
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/* Data Register, Port B */
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#define PORTB _SFR_IO8(0x18)
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/* 0x19..0x20 reserved */
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/* Watchdog Timer Control Register */
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#define WDTCR _SFR_IO8(0x21)
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/* 0x22..0x31 reserved */
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/* Timer/Counter0 (8-bit) */
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#define TCNT0 _SFR_IO8(0x32)
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/* Timer/Counter0 Control Register */
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#define TCCR0 _SFR_IO8(0x33)
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/* MCU general Status Register */
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#define MCUSR _SFR_IO8(0x34)
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/* MCU general Control Register */
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#define MCUCR _SFR_IO8(0x35)
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/* 0x36..0x37 reserved */
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/* Timer/Counter Interrupt Flag Register */
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#define TIFR _SFR_IO8(0x38)
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/* Timer/Counter Interrupt MaSK Register */
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#define TIMSK _SFR_IO8(0x39)
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/* General Interrupt Flag Register */
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#define GIFR _SFR_IO8(0x3A)
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/* General Interrupt MaSK register */
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#define GIMSK _SFR_IO8(0x3B)
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/* 0x3C..0x3E reserved */
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/* Interrupt vectors */
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#define SIG_INTERRUPT0 _VECTOR(1)
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#define SIG_PIN _VECTOR(2)
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#define SIG_OVERFLOW0 _VECTOR(3)
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#define SIG_COMPARATOR _VECTOR(4)
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#define _VECTORS_SIZE 10
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/* Last memory addresses */
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#define FLASHEND 0x3FF
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#endif /* _AVR_IOTN11_H_ */