3
This file #defines the internal register addresses for ATtiny22L.
10
/*==========================*/
11
/* Predefined SFR Addresses */
12
/*==========================*/
14
/* Input Pins, Port B */
17
/* Data Direction Register, Port B */
20
/* Data Register, Port B */
23
/* EEPROM Control Register */
26
/* EEPROM Data Register */
29
/* EEPROM Address Register Low */
32
/* Watchdog Timer Control Register */
38
/* Timer/Counter 0 Control Register */
41
/* MCU Status Register */
44
/* MCU general Control Register */
47
/* Timer/Counter Interrupt Flag register */
50
/* Timer/Counter Interrupt MaSK register */
53
/* General Interrupt Flag register */
56
/* General Interrupt MaSK register */
66
/*==============================*/
67
/* Interrupt Vector Definitions */
68
/*==============================*/
70
/* NB! vectors are specified as byte addresses */
72
#define SIG_INTERRUPT0 _vector_1
73
#define SIG_OVERFLOW0 _vector_2
75
#define END_VECTOR (2)
76
#define INT_VECT_SIZE (0x06)
79
The Register Bit names are represented by their bit number (0-7).
82
/* General Interrupt MaSK register */
86
/* General Interrupt Flag Register */
90
/* MCU general Control Register */
96
/* Timer/Counter 0 Control Register */
101
/* Watchdog Timer Control Register */
108
/* EEPROM Control Register */
119
/* Data Register, Port B */
126
/* Data Direction Register, Port B */
133
/* Input Pins, Port B */
140
/* Pointer definition */
152
#define FLASHEND 0x07FF
added
removed
include/iotn22.h
