97
99
ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
100
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
101
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
102
DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
102
103
/* 0x48 - 0x4F */
103
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
104
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
104
DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
105
105
/* 0x50 - 0x57 */
106
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
107
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
106
SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg,
108
107
/* 0x58 - 0x5F */
109
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
110
ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
108
DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
111
109
/* 0x60 - 0x67 */
112
110
0, 0, 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
133
131
/* 0x90 - 0x9F */
134
132
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, ImplicitOps, 0, 0,
135
133
/* 0xA0 - 0xA7 */
136
ByteOp | DstReg | SrcMem | Mov, DstReg | SrcMem | Mov,
137
ByteOp | DstMem | SrcReg | Mov, DstMem | SrcReg | Mov,
134
ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
135
ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
138
136
ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
139
137
ByteOp | ImplicitOps, ImplicitOps,
140
138
/* 0xA8 - 0xAF */
171
169
static u16 twobyte_table[256] = {
172
170
/* 0x00 - 0x0F */
173
171
0, SrcMem | ModRM | DstReg, 0, 0, 0, 0, ImplicitOps, 0,
174
0, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
172
ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
175
173
/* 0x10 - 0x1F */
176
174
0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
177
175
/* 0x20 - 0x2F */
520
516
return (!!rc ^ (condition & 1));
519
static void decode_register_operand(struct operand *op,
520
struct decode_cache *c,
523
unsigned reg = c->modrm_reg;
524
int highbyte_regs = c->rex_prefix == 0;
527
reg = (c->b & 7) | ((c->rex_prefix & 1) << 3);
529
if ((c->d & ByteOp) && !inhibit_bytereg) {
530
op->ptr = decode_register(reg, c->regs, highbyte_regs);
531
op->val = *(u8 *)op->ptr;
534
op->ptr = decode_register(reg, c->regs, 0);
535
op->bytes = c->op_bytes;
538
op->val = *(u16 *)op->ptr;
541
op->val = *(u32 *)op->ptr;
544
op->val = *(u64 *) op->ptr;
548
op->orig_val = op->val;
551
static int decode_modrm(struct x86_emulate_ctxt *ctxt,
552
struct x86_emulate_ops *ops)
554
struct decode_cache *c = &ctxt->decode;
556
int index_reg = 0, base_reg = 0, scale, rip_relative = 0;
560
c->modrm_reg = (c->rex_prefix & 4) << 1; /* REX.R */
561
index_reg = (c->rex_prefix & 2) << 2; /* REX.X */
562
c->modrm_rm = base_reg = (c->rex_prefix & 1) << 3; /* REG.B */
565
c->modrm = insn_fetch(u8, 1, c->eip);
566
c->modrm_mod |= (c->modrm & 0xc0) >> 6;
567
c->modrm_reg |= (c->modrm & 0x38) >> 3;
568
c->modrm_rm |= (c->modrm & 0x07);
572
if (c->modrm_mod == 3) {
573
c->modrm_val = *(unsigned long *)
574
decode_register(c->modrm_rm, c->regs, c->d & ByteOp);
578
if (c->ad_bytes == 2) {
579
unsigned bx = c->regs[VCPU_REGS_RBX];
580
unsigned bp = c->regs[VCPU_REGS_RBP];
581
unsigned si = c->regs[VCPU_REGS_RSI];
582
unsigned di = c->regs[VCPU_REGS_RDI];
584
/* 16-bit ModR/M decode. */
585
switch (c->modrm_mod) {
587
if (c->modrm_rm == 6)
588
c->modrm_ea += insn_fetch(u16, 2, c->eip);
591
c->modrm_ea += insn_fetch(s8, 1, c->eip);
594
c->modrm_ea += insn_fetch(u16, 2, c->eip);
597
switch (c->modrm_rm) {
599
c->modrm_ea += bx + si;
602
c->modrm_ea += bx + di;
605
c->modrm_ea += bp + si;
608
c->modrm_ea += bp + di;
617
if (c->modrm_mod != 0)
624
if (c->modrm_rm == 2 || c->modrm_rm == 3 ||
625
(c->modrm_rm == 6 && c->modrm_mod != 0))
626
if (!c->override_base)
627
c->override_base = &ctxt->ss_base;
628
c->modrm_ea = (u16)c->modrm_ea;
630
/* 32/64-bit ModR/M decode. */
631
switch (c->modrm_rm) {
634
sib = insn_fetch(u8, 1, c->eip);
635
index_reg |= (sib >> 3) & 7;
641
if (c->modrm_mod != 0)
642
c->modrm_ea += c->regs[base_reg];
645
insn_fetch(s32, 4, c->eip);
648
c->modrm_ea += c->regs[base_reg];
654
c->modrm_ea += c->regs[index_reg] << scale;
658
if (c->modrm_mod != 0)
659
c->modrm_ea += c->regs[c->modrm_rm];
660
else if (ctxt->mode == X86EMUL_MODE_PROT64)
664
c->modrm_ea += c->regs[c->modrm_rm];
667
switch (c->modrm_mod) {
669
if (c->modrm_rm == 5)
670
c->modrm_ea += insn_fetch(s32, 4, c->eip);
673
c->modrm_ea += insn_fetch(s8, 1, c->eip);
676
c->modrm_ea += insn_fetch(s32, 4, c->eip);
681
c->modrm_ea += c->eip;
682
switch (c->d & SrcMask) {
690
if (c->op_bytes == 8)
693
c->modrm_ea += c->op_bytes;
700
static int decode_abs(struct x86_emulate_ctxt *ctxt,
701
struct x86_emulate_ops *ops)
703
struct decode_cache *c = &ctxt->decode;
706
switch (c->ad_bytes) {
708
c->modrm_ea = insn_fetch(u16, 2, c->eip);
711
c->modrm_ea = insn_fetch(u32, 4, c->eip);
714
c->modrm_ea = insn_fetch(u64, 8, c->eip);
524
722
x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
526
724
struct decode_cache *c = &ctxt->decode;
527
u8 sib, rex_prefix = 0;
529
726
int mode = ctxt->mode;
530
int index_reg = 0, base_reg = 0, scale, rip_relative = 0;
532
728
/* Shadow copy of register state. Committed on successful emulation. */
637
829
/* ModRM and SIB bytes. */
639
c->modrm = insn_fetch(u8, 1, c->eip);
640
c->modrm_mod |= (c->modrm & 0xc0) >> 6;
641
c->modrm_reg |= (c->modrm & 0x38) >> 3;
642
c->modrm_rm |= (c->modrm & 0x07);
646
if (c->modrm_mod == 3) {
647
c->modrm_val = *(unsigned long *)
648
decode_register(c->modrm_rm, c->regs, c->d & ByteOp);
652
if (c->ad_bytes == 2) {
653
unsigned bx = c->regs[VCPU_REGS_RBX];
654
unsigned bp = c->regs[VCPU_REGS_RBP];
655
unsigned si = c->regs[VCPU_REGS_RSI];
656
unsigned di = c->regs[VCPU_REGS_RDI];
658
/* 16-bit ModR/M decode. */
659
switch (c->modrm_mod) {
661
if (c->modrm_rm == 6)
663
insn_fetch(u16, 2, c->eip);
666
c->modrm_ea += insn_fetch(s8, 1, c->eip);
669
c->modrm_ea += insn_fetch(u16, 2, c->eip);
672
switch (c->modrm_rm) {
674
c->modrm_ea += bx + si;
677
c->modrm_ea += bx + di;
680
c->modrm_ea += bp + si;
683
c->modrm_ea += bp + di;
692
if (c->modrm_mod != 0)
699
if (c->modrm_rm == 2 || c->modrm_rm == 3 ||
700
(c->modrm_rm == 6 && c->modrm_mod != 0))
701
if (!c->override_base)
702
c->override_base = &ctxt->ss_base;
703
c->modrm_ea = (u16)c->modrm_ea;
705
/* 32/64-bit ModR/M decode. */
706
switch (c->modrm_rm) {
709
sib = insn_fetch(u8, 1, c->eip);
710
index_reg |= (sib >> 3) & 7;
716
if (c->modrm_mod != 0)
721
insn_fetch(s32, 4, c->eip);
724
c->modrm_ea += c->regs[base_reg];
731
c->regs[index_reg] << scale;
736
if (c->modrm_mod != 0)
737
c->modrm_ea += c->regs[c->modrm_rm];
738
else if (mode == X86EMUL_MODE_PROT64)
742
c->modrm_ea += c->regs[c->modrm_rm];
745
switch (c->modrm_mod) {
747
if (c->modrm_rm == 5)
749
insn_fetch(s32, 4, c->eip);
752
c->modrm_ea += insn_fetch(s8, 1, c->eip);
755
c->modrm_ea += insn_fetch(s32, 4, c->eip);
759
if (!c->override_base)
760
c->override_base = &ctxt->ds_base;
761
if (mode == X86EMUL_MODE_PROT64 &&
762
c->override_base != &ctxt->fs_base &&
763
c->override_base != &ctxt->gs_base)
764
c->override_base = NULL;
766
if (c->override_base)
767
c->modrm_ea += *c->override_base;
770
c->modrm_ea += c->eip;
771
switch (c->d & SrcMask) {
779
if (c->op_bytes == 8)
782
c->modrm_ea += c->op_bytes;
785
if (c->ad_bytes != 8)
786
c->modrm_ea = (u32)c->modrm_ea;
831
rc = decode_modrm(ctxt, ops);
832
else if (c->d & MemAbs)
833
rc = decode_abs(ctxt, ops);
837
if (!c->override_base)
838
c->override_base = &ctxt->ds_base;
839
if (mode == X86EMUL_MODE_PROT64 &&
840
c->override_base != &ctxt->fs_base &&
841
c->override_base != &ctxt->gs_base)
842
c->override_base = NULL;
844
if (c->override_base)
845
c->modrm_ea += *c->override_base;
847
if (c->ad_bytes != 8)
848
c->modrm_ea = (u32)c->modrm_ea;
792
850
* Decode and fetch the source operand: register, memory
879
913
/* Special instructions do their own operand decoding. */
882
c->dst.type = OP_REG;
885
(c->b == 0xb6 || c->b == 0xb7))) {
887
decode_register(c->modrm_reg, c->regs,
889
c->dst.val = *(u8 *) c->dst.ptr;
893
decode_register(c->modrm_reg, c->regs, 0);
894
switch ((c->dst.bytes = c->op_bytes)) {
896
c->dst.val = *(u16 *)c->dst.ptr;
899
c->dst.val = *(u32 *)c->dst.ptr;
902
c->dst.val = *(u64 *)c->dst.ptr;
916
decode_register_operand(&c->dst, c,
917
c->twobyte && (c->b == 0xb6 || c->b == 0xb7));
1268
1280
emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
1282
case 0x40 ... 0x47: /* inc r16/r32 */
1283
emulate_1op("inc", c->dst, ctxt->eflags);
1285
case 0x48 ... 0x4f: /* dec r16/r32 */
1286
emulate_1op("dec", c->dst, ctxt->eflags);
1288
case 0x50 ... 0x57: /* push reg */
1289
c->dst.type = OP_MEM;
1290
c->dst.bytes = c->op_bytes;
1291
c->dst.val = c->src.val;
1292
register_address_increment(c->regs[VCPU_REGS_RSP],
1294
c->dst.ptr = (void *) register_address(
1295
ctxt->ss_base, c->regs[VCPU_REGS_RSP]);
1297
case 0x58 ... 0x5f: /* pop reg */
1299
if ((rc = ops->read_std(register_address(ctxt->ss_base,
1300
c->regs[VCPU_REGS_RSP]), c->dst.ptr,
1301
c->op_bytes, ctxt->vcpu)) != 0)
1304
register_address_increment(c->regs[VCPU_REGS_RSP],
1306
c->dst.type = OP_NONE; /* Disable writeback. */
1270
1308
case 0x63: /* movsxd */
1271
1309
if (ctxt->mode != X86EMUL_MODE_PROT64)
1272
1310
goto cannot_emulate;
1273
1311
c->dst.val = (s32) c->src.val;
1275
case 0x6a: /* push imm8 */
1277
c->src.val = insn_fetch(s8, 1, c->eip);
1280
1313
case 0x80 ... 0x83: /* Grp1 */
1281
1314
switch (c->modrm_reg) {
1391
1420
if (c->twobyte)
1392
1421
goto twobyte_special_insn;
1393
1422
switch (c->b) {
1394
case 0x40 ... 0x47: /* inc r16/r32 */
1395
c->dst.bytes = c->op_bytes;
1396
c->dst.ptr = (unsigned long *)&c->regs[c->b & 0x7];
1397
c->dst.val = *c->dst.ptr;
1398
emulate_1op("inc", c->dst, ctxt->eflags);
1400
case 0x48 ... 0x4f: /* dec r16/r32 */
1401
c->dst.bytes = c->op_bytes;
1402
c->dst.ptr = (unsigned long *)&c->regs[c->b & 0x7];
1403
c->dst.val = *c->dst.ptr;
1404
emulate_1op("dec", c->dst, ctxt->eflags);
1406
case 0x50 ... 0x57: /* push reg */
1407
if (c->op_bytes == 2)
1408
c->src.val = (u16) c->regs[c->b & 0x7];
1410
c->src.val = (u32) c->regs[c->b & 0x7];
1411
c->dst.type = OP_MEM;
1412
c->dst.bytes = c->op_bytes;
1413
c->dst.val = c->src.val;
1414
register_address_increment(c->regs[VCPU_REGS_RSP],
1416
c->dst.ptr = (void *) register_address(
1417
ctxt->ss_base, c->regs[VCPU_REGS_RSP]);
1419
case 0x58 ... 0x5f: /* pop reg */
1420
c->dst.ptr = (unsigned long *)&c->regs[c->b & 0x7];
1422
if ((rc = ops->read_std(register_address(ctxt->ss_base,
1423
c->regs[VCPU_REGS_RSP]), c->dst.ptr,
1424
c->op_bytes, ctxt->vcpu)) != 0)
1427
register_address_increment(c->regs[VCPU_REGS_RSP],
1429
c->dst.type = OP_NONE; /* Disable writeback. */
1423
case 0x6a: /* push imm8 */
1425
c->src.val = insn_fetch(s8, 1, c->eip);
1431
1428
case 0x6c: /* insb */
1432
1429
case 0x6d: /* insw/insd */