1
//===-- MachineSink.cpp - Sinking for machine instructions ----------------===//
3
// The LLVM Compiler Infrastructure
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
8
//===----------------------------------------------------------------------===//
10
// This pass moves instructions into successor blocks, when possible, so that
11
// they aren't executed on paths where their results aren't needed.
13
// This pass is not intended to be a replacement or a complete alternative
14
// for an LLVM-IR-level sinking pass. It is only designed to sink simple
15
// constructs that are not exposed before lowering and instruction selection.
17
//===----------------------------------------------------------------------===//
19
#define DEBUG_TYPE "machine-sink"
20
#include "llvm/CodeGen/Passes.h"
21
#include "llvm/CodeGen/MachineRegisterInfo.h"
22
#include "llvm/CodeGen/MachineDominators.h"
23
#include "llvm/Analysis/AliasAnalysis.h"
24
#include "llvm/Target/TargetRegisterInfo.h"
25
#include "llvm/Target/TargetInstrInfo.h"
26
#include "llvm/Target/TargetMachine.h"
27
#include "llvm/ADT/Statistic.h"
28
#include "llvm/Support/Debug.h"
29
#include "llvm/Support/raw_ostream.h"
32
STATISTIC(NumSunk, "Number of machine instructions sunk");
35
class MachineSinking : public MachineFunctionPass {
36
const TargetInstrInfo *TII;
37
const TargetRegisterInfo *TRI;
38
MachineRegisterInfo *RegInfo; // Machine register information
39
MachineDominatorTree *DT; // Machine dominator tree
41
BitVector AllocatableSet; // Which physregs are allocatable?
44
static char ID; // Pass identification
45
MachineSinking() : MachineFunctionPass(&ID) {}
47
virtual bool runOnMachineFunction(MachineFunction &MF);
49
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
51
MachineFunctionPass::getAnalysisUsage(AU);
52
AU.addRequired<AliasAnalysis>();
53
AU.addRequired<MachineDominatorTree>();
54
AU.addPreserved<MachineDominatorTree>();
57
bool ProcessBlock(MachineBasicBlock &MBB);
58
bool SinkInstruction(MachineInstr *MI, bool &SawStore);
59
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
61
} // end anonymous namespace
63
char MachineSinking::ID = 0;
64
static RegisterPass<MachineSinking>
65
X("machine-sink", "Machine code sinking");
67
FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
69
/// AllUsesDominatedByBlock - Return true if all uses of the specified register
70
/// occur in blocks dominated by the specified block.
71
bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg,
72
MachineBasicBlock *MBB) const {
73
assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
74
"Only makes sense for vregs");
75
// Ignoring debug uses is necessary so debug info doesn't affect the code.
76
// This may leave a referencing dbg_value in the original block, before
77
// the definition of the vreg. Dwarf generator handles this although the
78
// user might not get the right info at runtime.
79
for (MachineRegisterInfo::use_nodbg_iterator I =
80
RegInfo->use_nodbg_begin(Reg),
81
E = RegInfo->use_nodbg_end(); I != E; ++I) {
82
// Determine the block of the use.
83
MachineInstr *UseInst = &*I;
84
MachineBasicBlock *UseBlock = UseInst->getParent();
85
if (UseInst->isPHI()) {
86
// PHI nodes use the operand in the predecessor block, not the block with
88
UseBlock = UseInst->getOperand(I.getOperandNo()+1).getMBB();
90
// Check that it dominates.
91
if (!DT->dominates(MBB, UseBlock))
97
bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
98
DEBUG(dbgs() << "******** Machine Sinking ********\n");
100
const TargetMachine &TM = MF.getTarget();
101
TII = TM.getInstrInfo();
102
TRI = TM.getRegisterInfo();
103
RegInfo = &MF.getRegInfo();
104
DT = &getAnalysis<MachineDominatorTree>();
105
AA = &getAnalysis<AliasAnalysis>();
106
AllocatableSet = TRI->getAllocatableSet(MF);
108
bool EverMadeChange = false;
111
bool MadeChange = false;
113
// Process all basic blocks.
114
for (MachineFunction::iterator I = MF.begin(), E = MF.end();
116
MadeChange |= ProcessBlock(*I);
118
// If this iteration over the code changed anything, keep iterating.
119
if (!MadeChange) break;
120
EverMadeChange = true;
122
return EverMadeChange;
125
bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
126
// Can't sink anything out of a block that has less than two successors.
127
if (MBB.succ_size() <= 1 || MBB.empty()) return false;
129
bool MadeChange = false;
131
// Walk the basic block bottom-up. Remember if we saw a store.
132
MachineBasicBlock::iterator I = MBB.end();
134
bool ProcessedBegin, SawStore = false;
136
MachineInstr *MI = I; // The instruction to sink.
138
// Predecrement I (if it's not begin) so that it isn't invalidated by
140
ProcessedBegin = I == MBB.begin();
144
if (MI->isDebugValue())
147
if (SinkInstruction(MI, SawStore))
148
++NumSunk, MadeChange = true;
150
// If we just processed the first instruction in the block, we're done.
151
} while (!ProcessedBegin);
156
/// SinkInstruction - Determine whether it is safe to sink the specified machine
157
/// instruction out of its current block into a successor.
158
bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
159
// Check if it's safe to move the instruction.
160
if (!MI->isSafeToMove(TII, AA, SawStore))
163
// FIXME: This should include support for sinking instructions within the
164
// block they are currently in to shorten the live ranges. We often get
165
// instructions sunk into the top of a large block, but it would be better to
166
// also sink them down before their first use in the block. This xform has to
167
// be careful not to *increase* register pressure though, e.g. sinking
168
// "x = y + z" down if it kills y and z would increase the live ranges of y
169
// and z and only shrink the live range of x.
171
// Loop over all the operands of the specified instruction. If there is
172
// anything we can't handle, bail out.
173
MachineBasicBlock *ParentBlock = MI->getParent();
175
// SuccToSinkTo - This is the successor to sink this instruction to, once we
177
MachineBasicBlock *SuccToSinkTo = 0;
179
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
180
const MachineOperand &MO = MI->getOperand(i);
181
if (!MO.isReg()) continue; // Ignore non-register operands.
183
unsigned Reg = MO.getReg();
184
if (Reg == 0) continue;
186
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
188
// If the physreg has no defs anywhere, it's just an ambient register
189
// and we can freely move its uses. Alternatively, if it's allocatable,
190
// it could get allocated to something with a def during allocation.
191
if (!RegInfo->def_empty(Reg))
193
if (AllocatableSet.test(Reg))
195
// Check for a def among the register's aliases too.
196
for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
197
unsigned AliasReg = *Alias;
198
if (!RegInfo->def_empty(AliasReg))
200
if (AllocatableSet.test(AliasReg))
203
} else if (!MO.isDead()) {
204
// A def that isn't dead. We can't move it.
208
// Virtual register uses are always safe to sink.
209
if (MO.isUse()) continue;
211
// If it's not safe to move defs of the register class, then abort.
212
if (!TII->isSafeToMoveRegClassDefs(RegInfo->getRegClass(Reg)))
215
// FIXME: This picks a successor to sink into based on having one
216
// successor that dominates all the uses. However, there are cases where
217
// sinking can happen but where the sink point isn't a successor. For
222
// the instruction could be sunk over the whole diamond for the
223
// if/then/else (or loop, etc), allowing it to be sunk into other blocks
226
// Virtual register defs can only be sunk if all their uses are in blocks
227
// dominated by one of the successors.
229
// If a previous operand picked a block to sink to, then this operand
230
// must be sinkable to the same block.
231
if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo))
236
// Otherwise, we should look at all the successors and decide which one
237
// we should sink to.
238
for (MachineBasicBlock::succ_iterator SI = ParentBlock->succ_begin(),
239
E = ParentBlock->succ_end(); SI != E; ++SI) {
240
if (AllUsesDominatedByBlock(Reg, *SI)) {
246
// If we couldn't find a block to sink to, ignore this instruction.
247
if (SuccToSinkTo == 0)
252
// If there are no outputs, it must have side-effects.
253
if (SuccToSinkTo == 0)
256
// It's not safe to sink instructions to EH landing pad. Control flow into
257
// landing pad is implicitly defined.
258
if (SuccToSinkTo->isLandingPad())
261
// It is not possible to sink an instruction into its own block. This can
262
// happen with loops.
263
if (MI->getParent() == SuccToSinkTo)
266
DEBUG(dbgs() << "Sink instr " << *MI);
267
DEBUG(dbgs() << "to block " << *SuccToSinkTo);
269
// If the block has multiple predecessors, this would introduce computation on
270
// a path that it doesn't already exist. We could split the critical edge,
271
// but for now we just punt.
272
// FIXME: Split critical edges if not backedges.
273
if (SuccToSinkTo->pred_size() > 1) {
274
DEBUG(dbgs() << " *** PUNTING: Critical edge found\n");
278
// Determine where to insert into. Skip phi nodes.
279
MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin();
280
while (InsertPos != SuccToSinkTo->end() && InsertPos->isPHI())
283
// Move the instruction.
284
SuccToSinkTo->splice(InsertPos, ParentBlock, MI,
285
++MachineBasicBlock::iterator(MI));