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Viewing changes to updates/compat-wireless-2.6/drivers/net/wireless/iwlwifi/iwl-5000.c

  • Committer: Bazaar Package Importer
  • Author(s): Tim Gardner, Tim Gardner
  • Date: 2009-02-09 17:48:22 UTC
  • Revision ID: james.westby@ubuntu.com-20090209174822-6chmiumgtavrmzgv
Tags: 2.6.28-7.5
[Tim Gardner]

* Update to master-2009-02-09
* Convert 'git-log' to 'git log'

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Lines of Context:
updates/compat-wireless-2.6/drivers/net/wireless/iwlwifi/iwl-5000.c
43
43
#include "iwl-sta.h"
44
44
#include "iwl-helpers.h"
45
45
#include "iwl-5000-hw.h"
 
46
#include "iwl-6000-hw.h"
46
47
 
47
48
/* Highest firmware API version supported */
48
49
#define IWL5000_UCODE_API_MAX 1
84
85
                                  CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
85
86
 
86
87
        spin_unlock_irqrestore(&priv->lock, flags);
87
 
        IWL_DEBUG_INFO("stop master\n");
 
88
        IWL_DEBUG_INFO(priv, "stop master\n");
88
89
 
89
90
        return 0;
90
91
}
108
109
        iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
109
110
                    CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
110
111
 
111
 
        iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
 
112
        if (priv->cfg->need_pll_cfg)
 
113
                iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
112
114
 
113
115
        /* set "initialization complete" bit to move adapter
114
116
         * D0U* --> D0A* state */
118
120
        ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
119
121
                        CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
120
122
        if (ret < 0) {
121
 
                IWL_DEBUG_INFO("Failed to init the card\n");
 
123
                IWL_DEBUG_INFO(priv, "Failed to init the card\n");
122
124
                return ret;
123
125
        }
124
126
 
176
178
 
177
179
        /* FIXME: put here L1A -L0S w/a */
178
180
 
179
 
        iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
 
181
        if (priv->cfg->need_pll_cfg)
 
182
                iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
180
183
 
181
184
        /* set "initialization complete" bit to move adapter
182
185
         * D0U* --> D0A* state */
186
189
        ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
187
190
                        CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
188
191
        if (ret < 0) {
189
 
                IWL_DEBUG_INFO("Failed to init the card\n");
 
192
                IWL_DEBUG_INFO(priv, "Failed to init the card\n");
190
193
                goto out;
191
194
        }
192
195
 
338
341
                        data->delta_gain_code[i] |= (1 << 2);
339
342
        }
340
343
 
341
 
        IWL_DEBUG_CALIB("Delta gains: ANT_B = %d  ANT_C = %d\n",
 
344
        IWL_DEBUG_CALIB(priv, "Delta gains: ANT_B = %d  ANT_C = %d\n",
342
345
                        data->delta_gain_code[1], data->delta_gain_code[2]);
343
346
 
344
347
        if (!data->radio_write) {
387
390
                        IWL_ERR(priv,
388
391
                                "Could not send REPLY_PHY_CALIBRATION_CMD\n");
389
392
                data->state = IWL_CHAIN_NOISE_ACCUMULATE;
390
 
                IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 
393
                IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
391
394
        }
392
395
}
393
396
 
394
 
static void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 
397
void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
395
398
                        __le32 *tx_flags)
396
399
{
397
400
        if ((info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
518
521
static void iwl5000_rx_calib_complete(struct iwl_priv *priv,
519
522
                               struct iwl_rx_mem_buffer *rxb)
520
523
{
521
 
        IWL_DEBUG_INFO("Init. calibration is completed, restarting fw.\n");
 
524
        IWL_DEBUG_INFO(priv, "Init. calibration is completed, restarting fw.\n");
522
525
        queue_work(priv->workqueue, &priv->restart);
523
526
}
524
527
 
586
589
        if (ret)
587
590
                return ret;
588
591
 
589
 
        IWL_DEBUG_INFO("INST uCode section being loaded...\n");
 
592
        IWL_DEBUG_INFO(priv, "INST uCode section being loaded...\n");
590
593
        ret = wait_event_interruptible_timeout(priv->wait_command_queue,
591
594
                                        priv->ucode_write_complete, 5 * HZ);
592
595
        if (ret == -ERESTARTSYS) {
606
609
        if (ret)
607
610
                return ret;
608
611
 
609
 
        IWL_DEBUG_INFO("DATA uCode section being loaded...\n");
 
612
        IWL_DEBUG_INFO(priv, "DATA uCode section being loaded...\n");
610
613
 
611
614
        ret = wait_event_interruptible_timeout(priv->wait_command_queue,
612
615
                                priv->ucode_write_complete, 5 * HZ);
631
634
 
632
635
        /* check whether init ucode should be loaded, or rather runtime ucode */
633
636
        if (priv->ucode_init.len && (priv->ucode_type == UCODE_NONE)) {
634
 
                IWL_DEBUG_INFO("Init ucode found. Loading init ucode...\n");
 
637
                IWL_DEBUG_INFO(priv, "Init ucode found. Loading init ucode...\n");
635
638
                ret = iwl5000_load_given_ucode(priv,
636
639
                        &priv->ucode_init, &priv->ucode_init_data);
637
640
                if (!ret) {
638
 
                        IWL_DEBUG_INFO("Init ucode load complete.\n");
 
641
                        IWL_DEBUG_INFO(priv, "Init ucode load complete.\n");
639
642
                        priv->ucode_type = UCODE_INIT;
640
643
                }
641
644
        } else {
642
 
                IWL_DEBUG_INFO("Init ucode not found, or already loaded. "
 
645
                IWL_DEBUG_INFO(priv, "Init ucode not found, or already loaded. "
643
646
                        "Loading runtime ucode...\n");
644
647
                ret = iwl5000_load_given_ucode(priv,
645
648
                        &priv->ucode_code, &priv->ucode_data);
646
649
                if (!ret) {
647
 
                        IWL_DEBUG_INFO("Runtime ucode load complete.\n");
 
650
                        IWL_DEBUG_INFO(priv, "Runtime ucode load complete.\n");
648
651
                        priv->ucode_type = UCODE_RT;
649
652
                }
650
653
        }
660
663
        if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
661
664
                /* We had an error bringing up the hardware, so take it
662
665
                 * all the way back down so we can try again */
663
 
                IWL_DEBUG_INFO("Initialize Alive failed.\n");
 
666
                IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
664
667
                goto restart;
665
668
        }
666
669
 
670
673
        if (iwl_verify_ucode(priv)) {
671
674
                /* Runtime instruction load was bad;
672
675
                 * take it all the way back down so we can try again */
673
 
                IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 
676
                IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
674
677
                goto restart;
675
678
        }
676
679
 
713
716
 
714
717
        txq->sched_retry = scd_retry;
715
718
 
716
 
        IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 
719
        IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
717
720
                       active ? "Activate" : "Deactivate",
718
721
                       scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
719
722
}
837
840
        priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
838
841
        priv->hw_params.scd_bc_tbls_size =
839
842
                        IWL50_NUM_QUEUES * sizeof(struct iwl5000_scd_bc_tbl);
 
843
        priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
840
844
        priv->hw_params.max_stations = IWL5000_STATION_COUNT;
841
845
        priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
842
 
        priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
843
 
        priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
 
846
 
 
847
        switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 
848
        case CSR_HW_REV_TYPE_6x00:
 
849
        case CSR_HW_REV_TYPE_6x50:
 
850
                priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE;
 
851
                priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE;
 
852
                break;
 
853
        default:
 
854
                priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
 
855
                priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
 
856
        }
 
857
 
844
858
        priv->hw_params.max_bsm_size = 0;
845
859
        priv->hw_params.fat_channel =  BIT(IEEE80211_BAND_2GHZ) |
846
860
                                        BIT(IEEE80211_BAND_5GHZ);
848
862
 
849
863
        priv->hw_params.sens = &iwl5000_sensitivity;
850
864
 
851
 
        switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
852
 
        case CSR_HW_REV_TYPE_5100:
853
 
                priv->hw_params.tx_chains_num = 1;
854
 
                priv->hw_params.rx_chains_num = 2;
855
 
                priv->hw_params.valid_tx_ant = ANT_B;
856
 
                priv->hw_params.valid_rx_ant = ANT_AB;
857
 
                break;
858
 
        case CSR_HW_REV_TYPE_5150:
859
 
                priv->hw_params.tx_chains_num = 1;
860
 
                priv->hw_params.rx_chains_num = 2;
861
 
                priv->hw_params.valid_tx_ant = ANT_A;
862
 
                priv->hw_params.valid_rx_ant = ANT_AB;
863
 
                break;
864
 
        case CSR_HW_REV_TYPE_5300:
865
 
        case CSR_HW_REV_TYPE_5350:
866
 
                priv->hw_params.tx_chains_num = 3;
867
 
                priv->hw_params.rx_chains_num = 3;
868
 
                priv->hw_params.valid_tx_ant = ANT_ABC;
869
 
                priv->hw_params.valid_rx_ant = ANT_ABC;
870
 
                break;
871
 
        }
 
865
        priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
 
866
        priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
 
867
        priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
 
868
        priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
872
869
 
873
870
        switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
874
 
        case CSR_HW_REV_TYPE_5100:
875
 
        case CSR_HW_REV_TYPE_5300:
876
 
        case CSR_HW_REV_TYPE_5350:
877
 
                /* 5X00 and 5350 wants in Celsius */
878
 
                priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
879
 
                break;
880
871
        case CSR_HW_REV_TYPE_5150:
881
872
                /* 5150 wants in Kelvin */
882
873
                priv->hw_params.ct_kill_threshold =
883
874
                                iwl5150_get_ct_threshold(priv);
884
875
                break;
 
876
        default:
 
877
                /* all others want Celsius */
 
878
                priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
 
879
                break;
885
880
        }
886
881
 
887
882
        /* Set initial calibration set */
888
883
        switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
889
 
        case CSR_HW_REV_TYPE_5100:
890
 
        case CSR_HW_REV_TYPE_5300:
891
 
        case CSR_HW_REV_TYPE_5350:
 
884
        case CSR_HW_REV_TYPE_5150:
 
885
                priv->hw_params.calib_init_cfg =
 
886
                        BIT(IWL_CALIB_DC)               |
 
887
                        BIT(IWL_CALIB_LO)               |
 
888
                        BIT(IWL_CALIB_TX_IQ)            |
 
889
                        BIT(IWL_CALIB_BASE_BAND);
 
890
 
 
891
                break;
 
892
        default:
892
893
                priv->hw_params.calib_init_cfg =
893
894
                        BIT(IWL_CALIB_XTAL)             |
894
895
                        BIT(IWL_CALIB_LO)               |
896
897
                        BIT(IWL_CALIB_TX_IQ_PERD)       |
897
898
                        BIT(IWL_CALIB_BASE_BAND);
898
899
                break;
899
 
        case CSR_HW_REV_TYPE_5150:
900
 
                priv->hw_params.calib_init_cfg =
901
 
                        BIT(IWL_CALIB_DC)               |
902
 
                        BIT(IWL_CALIB_LO)               |
903
 
                        BIT(IWL_CALIB_TX_IQ)            |
904
 
                        BIT(IWL_CALIB_BASE_BAND);
905
 
 
906
 
                break;
907
900
        }
908
901
 
909
902
 
1112
1105
        return 0;
1113
1106
}
1114
1107
 
1115
 
static u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
 
1108
u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1116
1109
{
1117
1110
        u16 size = (u16)sizeof(struct iwl_addsta_cmd);
1118
1111
        memcpy(data, cmd, size);
1150
1143
        u16 seq;
1151
1144
 
1152
1145
        if (agg->wait_for_ba)
1153
 
                IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
 
1146
                IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1154
1147
 
1155
1148
        agg->frame_count = tx_resp->frame_count;
1156
1149
        agg->start_idx = start_idx;
1164
1157
                idx = start_idx;
1165
1158
 
1166
1159
                /* FIXME: code repetition */
1167
 
                IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
 
1160
                IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1168
1161
                                   agg->frame_count, agg->start_idx, idx);
1169
1162
 
1170
1163
                info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1176
1169
 
1177
1170
                /* FIXME: code repetition end */
1178
1171
 
1179
 
                IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
 
1172
                IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1180
1173
                                    status & 0xff, tx_resp->failure_frame);
1181
 
                IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
 
1174
                IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1182
1175
 
1183
1176
                agg->wait_for_ba = 0;
1184
1177
        } else {
1198
1191
                                      AGG_TX_STATE_ABORT_MSK))
1199
1192
                                continue;
1200
1193
 
1201
 
                        IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
 
1194
                        IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1202
1195
                                           agg->frame_count, txq_id, idx);
1203
1196
 
1204
1197
                        hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1213
1206
                                return -1;
1214
1207
                        }
1215
1208
 
1216
 
                        IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
 
1209
                        IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1217
1210
                                           i, idx, SEQ_TO_SN(sc));
1218
1211
 
1219
1212
                        sh = idx - start;
1231
1224
                                sh = 0;
1232
1225
                        }
1233
1226
                        bitmap |= 1ULL << sh;
1234
 
                        IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
 
1227
                        IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1235
1228
                                           start, (unsigned long long)bitmap);
1236
1229
                }
1237
1230
 
1238
1231
                agg->bitmap = bitmap;
1239
1232
                agg->start_idx = start;
1240
 
                IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
 
1233
                IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
1241
1234
                                   agg->frame_count, agg->start_idx,
1242
1235
                                   (unsigned long long)agg->bitmap);
1243
1236
 
1290
1283
 
1291
1284
                if (txq->q.read_ptr != (scd_ssn & 0xff)) {
1292
1285
                        index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
1293
 
                        IWL_DEBUG_TX_REPLY("Retry scheduler reclaim "
 
1286
                        IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
1294
1287
                                        "scd_ssn=%d idx=%d txq=%d swq=%d\n",
1295
1288
                                        scd_ssn , index, txq_id, txq->swq_id);
1296
1289
 
1317
1310
                                        le32_to_cpu(tx_resp->rate_n_flags),
1318
1311
                                        info);
1319
1312
 
1320
 
                IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) rate_n_flags "
 
1313
                IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
1321
1314
                                   "0x%x retries %d\n",
1322
1315
                                   txq_id,
1323
1316
                                   iwl_get_tx_fail_reason(status), status,
1341
1334
}
1342
1335
 
1343
1336
/* Currently 5000 is the superset of everything */
1344
 
static u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len)
 
1337
u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len)
1345
1338
{
1346
1339
        return len;
1347
1340
}
1388
1381
            (rxon1->acquisition_data == rxon2->acquisition_data) &&
1389
1382
            (rxon1->rx_chain == rxon2->rx_chain) &&
1390
1383
            (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1391
 
                IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
 
1384
                IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1392
1385
                return 0;
1393
1386
        }
1394
1387
 
1418
1411
static int  iwl5000_send_tx_power(struct iwl_priv *priv)
1419
1412
{
1420
1413
        struct iwl5000_tx_power_dbm_cmd tx_power_cmd;
 
1414
        u8 tx_ant_cfg_cmd;
1421
1415
 
1422
1416
        /* half dBm need to multiply */
1423
1417
        tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
1424
1418
        tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED;
1425
1419
        tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO;
1426
 
        return  iwl_send_cmd_pdu_async(priv, REPLY_TX_POWER_DBM_CMD,
 
1420
 
 
1421
        if (IWL_UCODE_API(priv->ucode_ver) == 1)
 
1422
                tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
 
1423
        else
 
1424
                tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
 
1425
 
 
1426
        return  iwl_send_cmd_pdu_async(priv, tx_ant_cfg_cmd,
1427
1427
                                       sizeof(tx_power_cmd), &tx_power_cmd,
1428
1428
                                       NULL);
1429
1429
}
1435
1435
}
1436
1436
 
1437
1437
/* Calc max signal level (dBm) among 3 possible receivers */
1438
 
static int iwl5000_calc_rssi(struct iwl_priv *priv,
 
1438
int iwl5000_calc_rssi(struct iwl_priv *priv,
1439
1439
                             struct iwl_rx_phy_res *rx_resp)
1440
1440
{
1441
1441
        /* data from PHY/DSP regarding signal strength, etc.,
1464
1464
        max_rssi = max_t(u32, rssi_a, rssi_b);
1465
1465
        max_rssi = max_t(u32, max_rssi, rssi_c);
1466
1466
 
1467
 
        IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
 
1467
        IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
1468
1468
                rssi_a, rssi_b, rssi_c, max_rssi, agc);
1469
1469
 
1470
1470
        /* dBm = max_rssi dB - agc dB - constant.
1472
1472
        return max_rssi - agc - IWL49_RSSI_OFFSET;
1473
1473
}
1474
1474
 
1475
 
static struct iwl_hcmd_ops iwl5000_hcmd = {
 
1475
struct iwl_hcmd_ops iwl5000_hcmd = {
1476
1476
        .rxon_assoc = iwl5000_send_rxon_assoc,
1477
1477
};
1478
1478
 
1479
 
static struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = {
 
1479
struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = {
1480
1480
        .get_hcmd_size = iwl5000_get_hcmd_size,
1481
1481
        .build_addsta_hcmd = iwl5000_build_addsta_hcmd,
1482
1482
        .gain_computation = iwl5000_gain_computation,
1485
1485
        .calc_rssi = iwl5000_calc_rssi,
1486
1486
};
1487
1487
 
1488
 
static struct iwl_lib_ops iwl5000_lib = {
 
1488
struct iwl_lib_ops iwl5000_lib = {
1489
1489
        .set_hw_params = iwl5000_hw_set_hw_params,
1490
1490
        .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
1491
1491
        .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl,
1492
1492
        .txq_set_sched = iwl5000_txq_set_sched,
1493
1493
        .txq_agg_enable = iwl5000_txq_agg_enable,
1494
1494
        .txq_agg_disable = iwl5000_txq_agg_disable,
 
1495
        .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
 
1496
        .txq_free_tfd = iwl_hw_txq_free_tfd,
 
1497
        .txq_init = iwl_hw_tx_queue_init,
1495
1498
        .rx_handler_setup = iwl5000_rx_handler_setup,
1496
1499
        .setup_deferred_work = iwl5000_setup_deferred_work,
1497
1500
        .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
1526
1529
        },
1527
1530
};
1528
1531
 
1529
 
static struct iwl_ops iwl5000_ops = {
 
1532
struct iwl_ops iwl5000_ops = {
1530
1533
        .lib = &iwl5000_lib,
1531
1534
        .hcmd = &iwl5000_hcmd,
1532
1535
        .utils = &iwl5000_hcmd_utils,
1533
1536
};
1534
1537
 
1535
 
static struct iwl_mod_params iwl50_mod_params = {
 
1538
struct iwl_mod_params iwl50_mod_params = {
1536
1539
        .num_of_queues = IWL50_NUM_QUEUES,
1537
1540
        .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1538
1541
        .amsdu_size_8K = 1,
1552
1555
        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1553
1556
        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1554
1557
        .mod_params = &iwl50_mod_params,
 
1558
        .valid_tx_ant = ANT_ABC,
 
1559
        .valid_rx_ant = ANT_ABC,
 
1560
        .need_pll_cfg = true,
1555
1561
};
1556
1562
 
1557
1563
struct iwl_cfg iwl5100_bg_cfg = {
1565
1571
        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1566
1572
        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1567
1573
        .mod_params = &iwl50_mod_params,
 
1574
        .valid_tx_ant = ANT_B,
 
1575
        .valid_rx_ant = ANT_AB,
 
1576
        .need_pll_cfg = true,
1568
1577
};
1569
1578
 
1570
1579
struct iwl_cfg iwl5100_abg_cfg = {
1578
1587
        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1579
1588
        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1580
1589
        .mod_params = &iwl50_mod_params,
 
1590
        .valid_tx_ant = ANT_B,
 
1591
        .valid_rx_ant = ANT_AB,
 
1592
        .need_pll_cfg = true,
1581
1593
};
1582
1594
 
1583
1595
struct iwl_cfg iwl5100_agn_cfg = {
1591
1603
        .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1592
1604
        .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1593
1605
        .mod_params = &iwl50_mod_params,
 
1606
        .valid_tx_ant = ANT_B,
 
1607
        .valid_rx_ant = ANT_AB,
 
1608
        .need_pll_cfg = true,
1594
1609
};
1595
1610
 
1596
1611
struct iwl_cfg iwl5350_agn_cfg = {
1604
1619
        .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
1605
1620
        .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
1606
1621
        .mod_params = &iwl50_mod_params,
 
1622
        .valid_tx_ant = ANT_ABC,
 
1623
        .valid_rx_ant = ANT_ABC,
 
1624
        .need_pll_cfg = true,
1607
1625
};
1608
1626
 
1609
1627
struct iwl_cfg iwl5150_agn_cfg = {
1617
1635
        .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
1618
1636
        .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
1619
1637
        .mod_params = &iwl50_mod_params,
 
1638
        .valid_tx_ant = ANT_A,
 
1639
        .valid_rx_ant = ANT_AB,
 
1640
        .need_pll_cfg = true,
1620
1641
};
1621
1642
 
1622
1643
MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));