72
74
OUT_RELOCh(chan, bo, delta, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
73
75
OUT_RELOCl(chan, bo, delta, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
74
76
switch (ppix->drawable.depth) {
75
case 32: OUT_RING (chan, NV50TCL_RT_FORMAT_32BPP); break;
76
case 24: OUT_RING (chan, NV50TCL_RT_FORMAT_24BPP); break;
77
case 16: OUT_RING (chan, NV50TCL_RT_FORMAT_16BPP); break;
77
case 32: OUT_RING (chan, NV50TCL_RT_FORMAT_A8R8G8B8_UNORM); break;
78
case 24: OUT_RING (chan, NV50TCL_RT_FORMAT_X8R8G8B8_UNORM); break;
79
case 16: OUT_RING (chan, NV50TCL_RT_FORMAT_R5G6B5_UNORM); break;
79
81
OUT_RING (chan, bo->tile_mode << 4);
80
82
OUT_RING (chan, 0);
211
NV50EmitWaitForVBlank(PixmapPtr ppix, int x, int y, int w, int h)
213
ScrnInfoPtr pScrn = xf86Screens[ppix->drawable.pScreen->myNum];
214
NVPtr pNv = NVPTR(pScrn);
215
struct nouveau_channel *chan = pNv->chan;
216
struct nouveau_grobj *nvsw = pNv->NvSW;
219
if (!nouveau_exa_pixmap_is_onscreen(ppix))
222
crtcs = nv_window_belongs_to_crtc(pScrn, x, y, w, h);
226
BEGIN_RING(chan, nvsw, 0x006c, 1);
227
OUT_RING (chan, 0x22222222);
228
BEGIN_RING(chan, nvsw, 0x0404, 2);
229
OUT_RING (chan, 0x11111111);
230
OUT_RING (chan, ffs(crtcs) - 1);
231
BEGIN_RING(chan, nvsw, 0x0068, 1);
232
OUT_RING (chan, 0x11111111);
209
236
nv50_xv_image_put(ScrnInfoPtr pScrn,
210
237
struct nouveau_bo *src, int packed_y, int uv,
228
255
nv50_xv_state_emit(ppix, id, src, packed_y, uv, width, height);
257
if (pPriv->SyncToVBlank) {
258
NV50EmitWaitForVBlank(ppix, dstBox->x1, dstBox->y1,
259
dstBox->x2 - dstBox->x1,
260
dstBox->y2 - dstBox->y1);
230
263
/* These are fixed point values in the 16.16 format. */
231
264
X1 = (float)(x1>>16)+(float)(x1&0xFFFF)/(float)0x10000;
232
265
Y1 = (float)(y1>>16)+(float)(y1&0xFFFF)/(float)0x10000;
291
/* NV50TCL_SCISSOR_VERT_T_SHIFT is wrong, because it was deducted with
292
* origin lying at the bottom left. This will be changed to _MIN_ and _MAX_
293
* later, because it is origin dependent.
295
BEGIN_RING(chan, tesla, NV50TCL_SCISSOR_HORIZ, 2);
296
OUT_RING (chan, sx2 << NV50TCL_SCISSOR_HORIZ_R_SHIFT | sx1);
297
OUT_RING (chan, sy2 << NV50TCL_SCISSOR_VERT_T_SHIFT | sy1 );
258
299
BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
259
OUT_RING (chan, NV50TCL_VERTEX_BEGIN_QUADS);
300
OUT_RING (chan, NV50TCL_VERTEX_BEGIN_TRIANGLES);
260
301
VTX2s(pNv, tx1, ty1, tx1, ty1, sx1, sy1);
261
VTX2s(pNv, tx2, ty1, tx2, ty1, sx2, sy1);
262
VTX2s(pNv, tx2, ty2, tx2, ty2, sx2, sy2);
263
VTX2s(pNv, tx1, ty2, tx1, ty2, sx1, sy2);
302
VTX2s(pNv, tx2+(tx2-tx1), ty1, tx2+(tx2-tx1), ty1, sx2+(sx2-sx1), sy1);
303
VTX2s(pNv, tx1, ty2+(ty2-ty1), tx1, ty2+(ty2-ty1), sx1, sy2+(sy2-sy1));
264
304
BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
265
305
OUT_RING (chan, 0);
280
320
nv50_xv_port_attribute_set(ScrnInfoPtr pScrn, Atom attribute,
281
321
INT32 value, pointer data)
323
NVPortPrivPtr pPriv = (NVPortPrivPtr)data;
325
if (attribute == xvSyncToVBlank) {
326
if (value < 0 || value > 1)
328
pPriv->SyncToVBlank = value;
330
if (attribute == xvSetDefaults) {
331
pPriv->SyncToVBlank = true;
287
339
nv50_xv_port_attribute_get(ScrnInfoPtr pScrn, Atom attribute,
288
340
INT32 *value, pointer data)
342
NVPortPrivPtr pPriv = (NVPortPrivPtr)data;
344
if (attribute == xvSyncToVBlank)
345
*value = (pPriv->SyncToVBlank) ? 1 : 0;