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Viewing changes to src/savage_driver.c

  • Committer: Bazaar Package Importer
  • Author(s): Brice Goglin
  • Date: 2007-11-15 08:19:08 UTC
  • Revision ID: james.westby@ubuntu.com-20071115081908-3dr7j0l36v6ih3j9
Tags: 1:2.1.3-5
http://bugs.debian.org/451074
http://bugs.debian.org/451219
Add 02_temporary_revert_pciaccess.diff to temporary revert
all the pci-rework code which does not seem to work even
when disabled, closes: #451074, #451219.

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Lines of Context:
src/savage_driver.c
40
40
#endif
41
41
 
42
42
#include <unistd.h>
 
43
#include <errno.h>
43
44
 
44
45
#include "xf86RAC.h"
45
46
#include "shadowfb.h"
72
73
 
73
74
static const OptionInfoRec * SavageAvailableOptions(int chipid, int busid);
74
75
static void SavageIdentify(int flags);
 
76
#ifdef XSERVER_LIBPCIACCESS
 
77
static Bool SavagePciProbe(DriverPtr drv, int entity_num,
 
78
                           struct pci_device *dev, intptr_t match_data);
 
79
#else
75
80
static Bool SavageProbe(DriverPtr drv, int flags);
 
81
static int LookupChipID(PciChipsets* pset, int ChipID);
 
82
#endif
76
83
static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags);
77
84
 
78
85
static Bool SavageEnterVT(int scrnIndex, int flags);
113
120
static unsigned int SavageDDC1Read(ScrnInfoPtr pScrn);
114
121
static void SavageProbeDDC(ScrnInfoPtr pScrn, int index);
115
122
static void SavageGetTvMaxSize(SavagePtr psav);
116
 
static Bool SavagePanningCheck(ScrnInfoPtr pScrn);
 
123
static Bool SavagePanningCheck(ScrnInfoPtr pScrn, DisplayModePtr pMode);
117
124
#ifdef XF86DRI
118
125
static Bool SavageCheckAvailableRamFor3D(ScrnInfoPtr pScrn);
119
126
#endif
132
139
 
133
140
int gSavageEntityIndex = -1;
134
141
 
135
 
_X_EXPORT DriverRec SAVAGE =
136
 
{
137
 
    SAVAGE_VERSION,
138
 
    SAVAGE_DRIVER_NAME,
139
 
    SavageIdentify,
140
 
    SavageProbe,
141
 
    SavageAvailableOptions,
142
 
    NULL,
143
 
    0,
144
 
    NULL
 
142
#ifdef XSERVER_LIBPCIACCESS
 
143
#define SAVAGE_DEVICE_MATCH(d, i) \
 
144
    { 0x5333, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
 
145
 
 
146
static const struct pci_id_match savage_device_match[] = {
 
147
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE4,         S3_SAVAGE4),
 
148
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE3D,        S3_SAVAGE3D),
 
149
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE3D_MV,     S3_SAVAGE3D),
 
150
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE2000,      S3_SAVAGE2000),
 
151
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_MX_MV,    S3_SAVAGE_MX),
 
152
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_MX,       S3_SAVAGE_MX),
 
153
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_IX_MV,    S3_SAVAGE_MX),
 
154
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_IX,       S3_SAVAGE_MX),
 
155
    SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_PM,    S3_PROSAVAGE),
 
156
    SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_KM,    S3_PROSAVAGE),
 
157
    SAVAGE_DEVICE_MATCH(PCI_CHIP_S3TWISTER_P,     S3_TWISTER),
 
158
    SAVAGE_DEVICE_MATCH(PCI_CHIP_S3TWISTER_K,     S3_TWISTER),
 
159
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_MX128,    S3_SUPERSAVAGE),
 
160
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_MX64,     S3_SUPERSAVAGE),
 
161
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_MX64C,    S3_SUPERSAVAGE),
 
162
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX128SDR, S3_SUPERSAVAGE),
 
163
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX128DDR, S3_SUPERSAVAGE),
 
164
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX64SDR,  S3_SUPERSAVAGE),
 
165
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX64DDR,  S3_SUPERSAVAGE),
 
166
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IXCSDR,   S3_SUPERSAVAGE),
 
167
    SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IXCDDR,   S3_SUPERSAVAGE),
 
168
    SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_DDR,   S3_PROSAVAGEDDR),
 
169
    SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_DDRK,  S3_PROSAVAGEDDR),
 
170
 
 
171
    { 0, 0, 0 },
145
172
};
146
 
 
 
173
#endif
147
174
 
148
175
/* Supported chipsets */
149
176
 
186
213
    { -1,               NULL }
187
214
};
188
215
 
 
216
#ifndef XSERVER_LIBPCIACCESS
189
217
/* This table maps a PCI device ID to a chipset family identifier. */
190
218
 
191
219
static PciChipsets SavagePciChipsets[] = {
214
242
    { S3_SUPERSAVAGE,   PCI_CHIP_SUPSAV_IXCDDR, RES_SHARED_VGA },
215
243
    { -1,               -1,                     RES_UNDEFINED }
216
244
};
 
245
#endif
217
246
 
218
247
typedef enum {
219
248
     OPTION_PCI_BURST
285
314
    { -1,               NULL,           OPTV_NONE,    {0}, FALSE }
286
315
};
287
316
 
 
317
_X_EXPORT DriverRec SAVAGE =
 
318
{
 
319
    SAVAGE_VERSION,
 
320
    SAVAGE_DRIVER_NAME,
 
321
    SavageIdentify,
 
322
#ifdef XSERVER_LIBPCIACCESS
 
323
    NULL,
 
324
#else
 
325
    SavageProbe,
 
326
#endif
 
327
    SavageAvailableOptions,
 
328
    NULL,
 
329
    0,
 
330
    NULL,
 
331
 
 
332
#ifdef XSERVER_LIBPCIACCESS
 
333
    savage_device_match,
 
334
    SavagePciProbe
 
335
#endif
 
336
};
 
337
 
 
338
 
288
339
 
289
340
static const char *vgaHWSymbols[] = {
290
341
    "vgaHWBlankScreen",
788
839
}
789
840
 
790
841
 
 
842
#ifdef XSERVER_LIBPCIACCESS
 
843
static Bool SavagePciProbe(DriverPtr drv, int entity_num,
 
844
                           struct pci_device *dev, intptr_t match_data)
 
845
{
 
846
    ScrnInfoPtr pScrn;
 
847
 
 
848
 
 
849
    if ((match_data < S3_SAVAGE3D) || (match_data > S3_SAVAGE2000)) {
 
850
        return FALSE;
 
851
    }
 
852
 
 
853
    pScrn = xf86ConfigPciEntity(NULL, 0, entity_num, NULL,
 
854
                                RES_SHARED_VGA, NULL, NULL, NULL, NULL);
 
855
    if (pScrn != NULL) {
 
856
        EntityInfoPtr pEnt;
 
857
        SavagePtr psav;
 
858
 
 
859
 
 
860
        pScrn->driverVersion = SAVAGE_VERSION;
 
861
        pScrn->driverName = SAVAGE_DRIVER_NAME;
 
862
        pScrn->name = "SAVAGE";
 
863
        pScrn->Probe = NULL;
 
864
        pScrn->PreInit = SavagePreInit;
 
865
        pScrn->ScreenInit = SavageScreenInit;
 
866
        pScrn->SwitchMode = SavageSwitchMode;
 
867
        pScrn->AdjustFrame = SavageAdjustFrame;
 
868
        pScrn->EnterVT = SavageEnterVT;
 
869
        pScrn->LeaveVT = SavageLeaveVT;
 
870
        pScrn->FreeScreen = NULL;
 
871
        pScrn->ValidMode = SavageValidMode;
 
872
 
 
873
        if (!SavageGetRec(pScrn))
 
874
            return FALSE;
 
875
 
 
876
        psav = SAVPTR(pScrn);
 
877
 
 
878
        psav->PciInfo = dev;
 
879
        psav->Chipset = match_data;
 
880
 
 
881
        pEnt = xf86GetEntityInfo(entity_num);
 
882
 
 
883
        /* MX, IX, SuperSavage cards support Dual-Head, mark the entity as
 
884
         * sharable.
 
885
         */
 
886
        if (pEnt->chipset == S3_SAVAGE_MX || pEnt->chipset == S3_SUPERSAVAGE) {
 
887
            DevUnion   *pPriv;
 
888
            SavageEntPtr pSavageEnt;
 
889
 
 
890
            xf86SetEntitySharable(entity_num);
 
891
 
 
892
            if (gSavageEntityIndex == -1)
 
893
                gSavageEntityIndex = xf86AllocateEntityPrivateIndex();
 
894
 
 
895
            pPriv = xf86GetEntityPrivate(pEnt->index, gSavageEntityIndex);
 
896
            if (!pPriv->ptr) {
 
897
                int j;
 
898
                int instance = xf86GetNumEntityInstances(pEnt->index);
 
899
 
 
900
                for (j = 0; j < instance; j++)
 
901
                    xf86SetEntityInstanceForScreen(pScrn, pEnt->index, j);
 
902
 
 
903
                pPriv->ptr = xnfcalloc(sizeof(SavageEntRec), 1);
 
904
                pSavageEnt = pPriv->ptr;
 
905
                pSavageEnt->HasSecondary = FALSE;
 
906
            } else {
 
907
                pSavageEnt = pPriv->ptr;
 
908
                pSavageEnt->HasSecondary = TRUE;
 
909
            }
 
910
        }
 
911
    }
 
912
 
 
913
    return (pScrn != NULL);
 
914
}
 
915
 
 
916
#else
 
917
 
791
918
static Bool SavageProbe(DriverPtr drv, int flags)
792
919
{
793
920
    int i;
826
953
                                                    NULL, NULL, NULL, NULL);
827
954
 
828
955
            if (pScrn != NULL) {
 
956
                SavagePtr psav;
 
957
 
829
958
                pScrn->driverVersion = SAVAGE_VERSION;
830
959
                pScrn->driverName = SAVAGE_DRIVER_NAME;
831
960
                pScrn->name = "SAVAGE";
839
968
                pScrn->FreeScreen = NULL;
840
969
                pScrn->ValidMode = SavageValidMode;
841
970
                foundScreen = TRUE;
 
971
 
 
972
                if (!SavageGetRec(pScrn))
 
973
                    return FALSE;
 
974
 
 
975
                psav = SAVPTR(pScrn);
 
976
 
 
977
                psav->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
 
978
                if (pEnt->device->chipset && *pEnt->device->chipset) {
 
979
                    psav->Chipset = xf86StringToToken(SavageChipsets,
 
980
                                                      pEnt->device->chipset);
 
981
                } else if (pEnt->device->chipID >= 0) {
 
982
                    psav->Chipset = LookupChipID(SavagePciChipsets,
 
983
                                                 pEnt->device->chipID);
 
984
                } else {
 
985
                    psav->Chipset = LookupChipID(SavagePciChipsets, 
 
986
                                                 psav->PciInfo->chipType);
 
987
                }
842
988
            }
843
989
 
844
990
            pEnt = xf86GetEntityInfo(usedChips[i]);
892
1038
 
893
1039
    return -1;
894
1040
}
 
1041
#endif
895
1042
 
896
1043
static void SavageDoDDC(ScrnInfoPtr pScrn)
897
1044
{
1406
1553
        psav->pVbe = VBEInit(NULL, pEnt->index);
1407
1554
    }
1408
1555
 
1409
 
    psav->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
1410
1556
    xf86RegisterResources(pEnt->index, NULL, ResNone);
1411
1557
    xf86SetOperatingState(resVgaIo, pEnt->index, ResUnusedOpr);
1412
1558
    xf86SetOperatingState(resVgaMem, pEnt->index, ResDisableOpr);
1415
1561
    if (pEnt->device->chipset && *pEnt->device->chipset) {
1416
1562
        pScrn->chipset = pEnt->device->chipset;
1417
1563
        psav->ChipId = pEnt->device->chipID;
1418
 
        psav->Chipset = xf86StringToToken(SavageChipsets, pScrn->chipset);
1419
1564
        from = X_CONFIG;
1420
1565
    } else if (pEnt->device->chipID >= 0) {
1421
1566
        psav->ChipId = pEnt->device->chipID;
1422
 
        psav->Chipset = LookupChipID(SavagePciChipsets, psav->ChipId);
1423
1567
        pScrn->chipset = (char *)xf86TokenToString(SavageChipsets,
1424
1568
                                                   psav->Chipset);
1425
1569
        from = X_CONFIG;
1427
1571
                   pEnt->device->chipID);
1428
1572
    } else {
1429
1573
        from = X_PROBED;
1430
 
        psav->ChipId = psav->PciInfo->chipType;
1431
 
        psav->Chipset = LookupChipID(SavagePciChipsets, psav->ChipId);
 
1574
        psav->ChipId = DEVICE_ID(psav->PciInfo);
1432
1575
        pScrn->chipset = (char *)xf86TokenToString(SavageChipsets,
1433
1576
                                                   psav->Chipset);
1434
1577
    }
1441
1584
        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
1442
1585
                   psav->ChipRev);
1443
1586
    } else
1444
 
        psav->ChipRev = psav->PciInfo->chipRev;
 
1587
        psav->ChipRev = CHIP_REVISION(psav->PciInfo);
1445
1588
 
1446
1589
    xf86DrvMsg(pScrn->scrnIndex, from, "Engine: \"%s\"\n", pScrn->chipset);
1447
1590
 
1450
1593
 
1451
1594
    xfree(pEnt);
1452
1595
 
 
1596
#ifndef XSERVER_LIBPCIACCESS
1453
1597
    psav->PciTag = pciTag(psav->PciInfo->bus, psav->PciInfo->device,
1454
1598
                          psav->PciInfo->func);
 
1599
#endif
1455
1600
 
1456
1601
 
1457
1602
    /* Set AGP Mode from config */
1458
1603
    /* We support 1X 2X and 4X  */
1459
1604
#ifdef XF86DRI
 
1605
#ifdef XSERVER_LIBPCIACCESS
 
1606
    /* Try to read the AGP capabilty block from the device.  If there is
 
1607
     * no AGP info, the device is PCI.
 
1608
     */
 
1609
 
 
1610
    psav->IsPCI = (pci_device_get_agp_info(psav->PciInfo) == NULL);
 
1611
#else
1460
1612
                                /* AGP/PCI (FK: copied from radeon_driver.c) */
1461
1613
    /* Proper autodetection of an AGP capable device requires examining
1462
1614
     * PCI config registers to determine if the device implements extended
1515
1667
            cap_ptr = (cap_id >> 8) & SAVAGE_CAP_PTR_MASK;
1516
1668
        }
1517
1669
    }
 
1670
#endif
1518
1671
 
1519
1672
    xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s card detected\n",
1520
1673
               (psav->IsPCI) ? "PCI" : "AGP");
2908
3061
static Bool SavageMapMem(ScrnInfoPtr pScrn)
2909
3062
{
2910
3063
    SavagePtr psav = SAVPTR(pScrn);
2911
 
    int mode;
2912
 
    unsigned i;
 
3064
    int err;
2913
3065
 
2914
3066
    TRACE(("SavageMapMem()\n"));
2915
3067
 
2916
3068
    if( S3_SAVAGE3D_SERIES(psav->Chipset) ) {
2917
 
        psav->MmioRegion.bar = 0;
2918
 
        psav->MmioRegion.offset = SAVAGE_NEWMMIO_REGBASE_S3;
2919
 
 
2920
 
        psav->FbRegion.bar = 0;
2921
 
        psav->FbRegion.offset = 0;
2922
 
 
2923
 
        psav->last_bar = 0;
 
3069
#ifdef XSERVER_LIBPCIACCESS
 
3070
        psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S3
 
3071
            + psav->PciInfo->regions[0].base_addr;
 
3072
        psav->FbRegion.base = psav->PciInfo->regions[0].base_addr;
 
3073
#else
 
3074
        psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S3
 
3075
            + psav->PciInfo->memBase[0];
 
3076
        psav->FbRegion.base = psav->PciInfo->memBase[0];
 
3077
#endif
2924
3078
    } else {
2925
 
        psav->MmioRegion.bar = 0;
2926
 
        psav->MmioRegion.offset = SAVAGE_NEWMMIO_REGBASE_S4;
2927
 
 
2928
 
        psav->FbRegion.bar = 1;
2929
 
        psav->FbRegion.offset = 0;
2930
 
 
2931
 
        psav->last_bar = 1;
 
3079
#ifdef XSERVER_LIBPCIACCESS
 
3080
        psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S4
 
3081
            + psav->PciInfo->regions[0].base_addr;
 
3082
        psav->FbRegion.base = psav->PciInfo->regions[1].base_addr;
 
3083
#else
 
3084
        psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S4 
 
3085
            + psav->PciInfo->memBase[0];
 
3086
        psav->FbRegion.base = psav->PciInfo->memBase[1];
 
3087
#endif
2932
3088
    }
2933
3089
 
 
3090
    psav->MmioRegion.size = SAVAGE_NEWMMIO_REGSIZE;
 
3091
    psav->FbRegion.size = psav->videoRambytes;
 
3092
 
2934
3093
    /* On Paramount and Savage 2000, aperture 0 is PCI base 2.  On other
2935
3094
     * chipsets it's in the same BAR as the framebuffer.
2936
3095
     */
2937
3096
    if ((psav->Chipset == S3_SUPERSAVAGE) 
2938
 
        || (psav->Chipset == S3_SAVAGE2000)) {
2939
 
        psav->ApertureRegion.bar = 2;
2940
 
        psav->ApertureRegion.offset = 0;
2941
 
 
2942
 
        psav->last_bar = 2;
 
3097
        || (psav->Chipset == S3_SAVAGE2000)) {
 
3098
#ifdef XSERVER_LIBPCIACCESS
 
3099
        psav->ApertureRegion.base = psav->PciInfo->regions[2].base_addr;
 
3100
#else
 
3101
        psav->ApertureRegion.base = psav->PciInfo->memBase[2];
 
3102
#endif
2943
3103
    } else {
2944
 
        psav->ApertureRegion.bar = psav->FbRegion.bar;
2945
 
        psav->ApertureRegion.offset = 0x02000000;
2946
 
    }
2947
 
 
2948
 
 
2949
 
    psav->MmioBase = psav->PciInfo->memBase[ psav->MmioRegion.bar ]
2950
 
      + psav->MmioRegion.offset;
2951
 
 
2952
 
    psav->FrameBufferBase = psav->PciInfo->memBase[ psav->FbRegion.bar ]
2953
 
      + psav->FbRegion.offset;
2954
 
 
2955
 
    psav->ApertureBase = psav->PciInfo->memBase[ psav->FbRegion.bar ]
2956
 
      + psav->ApertureRegion.offset;
2957
 
 
2958
 
 
2959
 
    /* FIXME: This seems fine even on Savage3D where the same BAR contains the
2960
 
     * FIXME: MMIO space and the framebuffer.  Write-combining gets fixed up
2961
 
     * FIXME: later.  Someone should investigate this, though.  And kick S3
2962
 
     * FIXME: for doing something so silly.
2963
 
     */
2964
 
    mode = VIDMEM_MMIO;
2965
 
    for (i = 0; i <= psav->last_bar; i++) {
2966
 
        psav->bar_mappings[i] = xf86MapPciMem(pScrn->scrnIndex, mode,
2967
 
                                              psav->PciTag,
2968
 
                                              psav->PciInfo->memBase[i],
2969
 
                                              (1U << psav->PciInfo->size[i]));
2970
 
        if (!psav->bar_mappings[i]) {
2971
 
            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
2972
 
                       "Internal error: cound not map PCI region %u, last BAR = %u\n",
2973
 
                       i, psav->last_bar);
2974
 
            return FALSE;
2975
 
        }
2976
 
 
2977
 
        mode = VIDMEM_FRAMEBUFFER;
2978
 
    }
2979
 
 
2980
 
    psav->MapBase = psav->bar_mappings[ psav->MmioRegion.bar ]
2981
 
      + psav->MmioRegion.offset;
2982
 
 
2983
 
    psav->BciMem = psav->MapBase + 0x10000;
2984
 
 
2985
 
    SavageEnableMMIO(pScrn);
2986
 
 
2987
 
    psav->FBBase = psav->bar_mappings[ psav->FbRegion.bar ]
2988
 
      + psav->FbRegion.offset;
2989
 
 
2990
 
    psav->FBStart = (psav->IsSecondary)
2991
 
      ? psav->FBBase + 0x1000000 : psav->FBBase;
2992
 
 
2993
 
    psav->ApertureMap = psav->bar_mappings[ psav->ApertureRegion.bar ]
2994
 
      + psav->ApertureRegion.offset;
2995
 
 
2996
 
    if (psav->IsSecondary) {
2997
 
        psav->ApertureMap += 0x1000000;
2998
 
    }
2999
 
 
3000
 
    pScrn->memPhysBase = psav->PciInfo->memBase[0];
3001
 
 
 
3104
        psav->ApertureRegion.base = psav->FbRegion.base + 0x02000000;
 
3105
    }
 
3106
 
 
3107
    psav->ApertureRegion.size = (psav->IsPrimary || psav->IsSecondary)
 
3108
        ? (0x01000000 * 2) : (0x01000000 * 5);
 
3109
 
 
3110
 
 
3111
    if (psav->FbRegion.size != 0) {
 
3112
#ifdef XSERVER_LIBPCIACCESS
 
3113
        err = pci_device_map_range(psav->PciInfo, psav->FbRegion.base,
 
3114
                                   psav->FbRegion.size,
 
3115
                                   (PCI_DEV_MAP_FLAG_WRITABLE
 
3116
                                    | PCI_DEV_MAP_FLAG_WRITE_COMBINE),
 
3117
                                   & psav->FbRegion.memory);
 
3118
#else
 
3119
        psav->FbRegion.memory = 
 
3120
            xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
 
3121
                          psav->PciTag, psav->FbRegion.base,
 
3122
                          psav->FbRegion.size);
 
3123
        err = (psav->FbRegion.memory == NULL) ? errno : 0;
 
3124
#endif
 
3125
        if (err) {
 
3126
            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 
3127
                       "Internal error: cound not map framebuffer range (%d, %s).\n",
 
3128
                       err, strerror(err));
 
3129
            return FALSE;
 
3130
        }
 
3131
 
 
3132
        psav->FBBase = psav->FbRegion.memory;
 
3133
        psav->FBStart = (psav->IsSecondary)
 
3134
            ? psav->FBBase + 0x1000000 : psav->FBBase;
 
3135
    }
 
3136
 
 
3137
    if (psav->ApertureRegion.memory == NULL) {
 
3138
#ifdef XSERVER_LIBPCIACCESS
 
3139
        err = pci_device_map_range(psav->PciInfo, psav->ApertureRegion.base,
 
3140
                                   psav->ApertureRegion.size,
 
3141
                                   (PCI_DEV_MAP_FLAG_WRITABLE
 
3142
                                    | PCI_DEV_MAP_FLAG_WRITE_COMBINE),
 
3143
                                   & psav->ApertureRegion.memory);
 
3144
#else
 
3145
        psav->ApertureRegion.memory = 
 
3146
            xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
 
3147
                          psav->PciTag, psav->ApertureRegion.base,
 
3148
                          psav->ApertureRegion.size);
 
3149
        err = (psav->ApertureRegion.memory == NULL) ? errno : 0;
 
3150
#endif
 
3151
        if (err) {
 
3152
            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 
3153
                       "Internal error: cound not map aperture range (%d, %s).\n",
 
3154
                       err, strerror(err));
 
3155
            return FALSE;
 
3156
        }
 
3157
 
 
3158
        psav->ApertureMap = (psav->IsSecondary)
 
3159
            ? psav->ApertureRegion.memory
 
3160
            : psav->ApertureRegion.memory + 0x1000000;
 
3161
    }
 
3162
 
 
3163
    if (psav->MmioRegion.memory == NULL) {
 
3164
#ifdef XSERVER_LIBPCIACCESS
 
3165
        err = pci_device_map_range(psav->PciInfo, psav->MmioRegion.base,
 
3166
                                   psav->MmioRegion.size,
 
3167
                                   (PCI_DEV_MAP_FLAG_WRITABLE),
 
3168
                                   & psav->MmioRegion.memory);
 
3169
#else
 
3170
        psav->MmioRegion.memory = 
 
3171
            xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
 
3172
                          psav->PciTag, psav->MmioRegion.base,
 
3173
                          psav->MmioRegion.size);
 
3174
        err = (psav->MmioRegion.memory == NULL) ? errno : 0;
 
3175
#endif
 
3176
        if (err) {
 
3177
            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 
3178
                       "Internal error: cound not map MMIO range (%d, %s).\n",
 
3179
                       err, strerror(err));
 
3180
            return FALSE;
 
3181
        }
 
3182
 
 
3183
        psav->MapBase = psav->MmioRegion.memory;
 
3184
        psav->BciMem = psav->MapBase + 0x10000;
 
3185
 
 
3186
        SavageEnableMMIO(pScrn);
 
3187
    }
 
3188
 
 
3189
    pScrn->memPhysBase = psav->FbRegion.base;
3002
3190
    return TRUE;
3003
3191
}
3004
3192
 
3006
3194
static void SavageUnmapMem(ScrnInfoPtr pScrn, int All)
3007
3195
{
3008
3196
    SavagePtr psav = SAVPTR(pScrn);
3009
 
    unsigned i;
3010
3197
 
3011
3198
    TRACE(("SavageUnmapMem(%x,%x)\n", psav->MapBase, psav->FBBase));
3012
3199
 
3013
3200
    if (psav->PrimaryVidMapped) {
3014
 
        vgaHWUnmapMem(pScrn);
3015
 
        psav->PrimaryVidMapped = FALSE;
 
3201
        vgaHWUnmapMem(pScrn);
 
3202
        psav->PrimaryVidMapped = FALSE;
3016
3203
    }
3017
3204
 
3018
3205
    SavageDisableMMIO(pScrn);
3019
3206
 
3020
 
    for (i = (All) ? 0 : 1; i <= psav->last_bar; i++) {
3021
 
        if (psav->bar_mappings[i]) {
3022
 
            xf86UnMapVidMem(pScrn->scrnIndex, psav->bar_mappings[i],
3023
 
                            (1U << psav->PciInfo->size[i]));
3024
 
            psav->bar_mappings[i] = NULL;
3025
 
        }
3026
 
    }
3027
 
 
3028
 
    if (All) {
3029
 
        psav->MapBase = 0;
3030
 
        psav->BciMem = 0;
3031
 
    }
3032
 
    
 
3207
    if (All && (psav->MmioRegion.memory != NULL)) {
 
3208
#ifdef XSERVER_LIBPCIACCESS
 
3209
        pci_device_unmap_range(psav->PciInfo,
 
3210
                               psav->MmioRegion.memory,
 
3211
                               psav->MmioRegion.size);
 
3212
#else
 
3213
        xf86UnMapVidMem(pScrn->scrnIndex, (pointer)psav->MapBase,
 
3214
                        SAVAGE_NEWMMIO_REGSIZE);
 
3215
#endif
 
3216
 
 
3217
        psav->MmioRegion.memory = NULL;
 
3218
        psav->MapBase = 0;
 
3219
        psav->BciMem = 0;
 
3220
    }
 
3221
 
 
3222
    if (psav->FbRegion.memory != NULL) {
 
3223
#ifdef XSERVER_LIBPCIACCESS
 
3224
        pci_device_unmap_range(psav->PciInfo,
 
3225
                               psav->FbRegion.memory,
 
3226
                               psav->FbRegion.size);
 
3227
#else
 
3228
        xf86UnMapVidMem(pScrn->scrnIndex, (pointer)psav->FbRegion.base,
 
3229
                        psav->FbRegion.size);
 
3230
#endif
 
3231
    }
 
3232
 
 
3233
    if (psav->ApertureRegion.memory != NULL) {
 
3234
#ifdef XSERVER_LIBPCIACCESS
 
3235
        pci_device_unmap_range(psav->PciInfo,
 
3236
                               psav->ApertureRegion.memory,
 
3237
                               psav->ApertureRegion.size);
 
3238
#else
 
3239
        xf86UnMapVidMem(pScrn->scrnIndex, (pointer)psav->ApertureRegion.base,
 
3240
                        psav->ApertureRegion.size);
 
3241
#endif
 
3242
    }
 
3243
 
 
3244
    psav->FbRegion.memory = NULL;
 
3245
    psav->ApertureRegion.memory = NULL;
3033
3246
    psav->FBBase = 0;
3034
3247
    psav->FBStart = 0;
3035
3248
    psav->ApertureMap = 0;
3118
3331
 
3119
3332
    if( psav->ShadowStatus ) {
3120
3333
        psav->ShadowPhysical = 
3121
 
            psav->FrameBufferBase + psav->CursorKByte*1024 + 4096 - 32;
 
3334
            psav->FbRegion.base + psav->CursorKByte*1024 + 4096 - 32;
3122
3335
        
3123
3336
        psav->ShadowVirtual = (CARD32 *)
3124
3337
            (psav->FBBase + psav->CursorKByte*1024 + 4096 - 32);
3415
3628
    }
3416
3629
#endif
3417
3630
 
3418
 
    SavagePanningCheck(pScrn);
 
3631
    SavagePanningCheck(pScrn, pScrn->currentMode);
3419
3632
#ifdef XvExtension
3420
3633
    if( !psav->FBStart2nd && !psav->NoAccel  /*&& !SavagePanningCheck(pScrn)*/ ) {
3421
3634
        if (psav->IsSecondary)
4059
4272
        pSavEnt = pPriv->ptr;
4060
4273
        SavageModeInit(pSavEnt->pSecondaryScrn, pSavEnt->pSecondaryScrn->currentMode);
4061
4274
    }
4062
 
    SavagePanningCheck(pScrn);
 
4275
    SavagePanningCheck(pScrn, mode);
4063
4276
 
4064
4277
    return success;
4065
4278
}
4538
4751
 
4539
4752
 
4540
4753
static Bool
4541
 
SavagePanningCheck(ScrnInfoPtr pScrn)
 
4754
SavagePanningCheck(ScrnInfoPtr pScrn, DisplayModePtr pMode)
4542
4755
{
4543
4756
    SavagePtr psav = SAVPTR(pScrn);
4544
 
    DisplayModePtr pMode;
4545
 
 
4546
 
    pMode = pScrn->currentMode;
4547
4757
    psav->iResX = pMode->CrtcHDisplay;
4548
4758
    psav->iResY = pMode->CrtcVDisplay;
4549
4759