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Viewing changes to debian/patches/0007-Revert-r6xx-EXA-always-use-the-accel_state-state-in-.patch

  • Committer: Bazaar Package Importer
  • Author(s): Christopher James Halse Rogers
  • Date: 2010-05-31 16:50:56 UTC
  • mfrom: (0.2.7 sid)
  • Revision ID: james.westby@ubuntu.com-20100531165056-y4300ukziph6zsmo
Tags: 1:6.13.0-2ubuntu1
* Merge from Debian Unstable.  Remaining Ubuntu changes:
  + debian/control:
    - Add quilt to build-depends for Ubuntu patches
  + debian/patches/103_new_pci_ids.patch:
    - Add PCI IDs for some new RV7xx a Redwood
  + debian/patches/102-no-xv-rn50.patch:
    - Upstream backport: disable Xv on rn50 chips which have no 3D engine
      or overlay.
  + debian/patches/100_radeon-6.9.0-bgnr-enable.patch:
    - Smooth plymouth transition enablement patch
  + debian/rules:
    - Add xsfbs patchsys
    - Drop /etc/modprobe.d/radeon-kms.conf install.
  + debian/xserver-xorg-video-ati.{pre,post}inst.in:
    - Clean existing /etc/modprobe.d/radeon-kms.conf on install.
      At best this does nothing (KMS is the default for our kernel)
      and at worst it makes it harder to disable KMS.
* Add debian/gbp.conf pointing to Ubuntu branch to make git-buildpackage
  less narky.

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debian/patches/0007-Revert-r6xx-EXA-always-use-the-accel_state-state-in-.patch
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From dd411e9d0af797b78b0ad8c74185c8766205a299 Mon Sep 17 00:00:00 2001
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From: Robert Hooker <sarvatt@ubuntu.com>
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Date: Fri, 16 Apr 2010 13:45:11 -0400
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Subject: [PATCH 7/8] Revert "r6xx+ EXA: always use the accel_state state in DoPrepareCopy"
5
 
 
6
 
This reverts commit d33bddaedae81126ab7f0023af1c6443bb0b4c4f.
7
 
---
8
 
 src/r600_exa.c |   26 +++++++++++---------------
9
 
 src/radeon.h   |    1 -
10
 
 2 files changed, 11 insertions(+), 16 deletions(-)
11
 
 
12
 
diff --git a/src/r600_exa.c b/src/r600_exa.c
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index 6e85595..db74ff7 100644
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--- a/src/r600_exa.c
15
 
+++ b/src/r600_exa.c
16
 
@@ -463,23 +463,19 @@ R600DoPrepareCopy(ScrnInfoPtr pScrn,
17
 
     accel_state->dst_size = dst_pitch * dst_height * (dst_bpp/8);
18
 
     accel_state->dst_mc_addr = dst_offset;
19
 
     accel_state->dst_pitch = dst_pitch;
20
 
-    accel_state->dst_width = dst_width;
21
 
     accel_state->dst_height = dst_height;
22
 
     accel_state->dst_bpp = dst_bpp;
23
 
     accel_state->dst_bo = dst_bo;
24
 
     accel_state->dst_domain = dst_domain;
25
 
 
26
 
-    accel_state->rop = rop;
27
 
-    accel_state->planemask = planemask;
28
 
-
29
 
     radeon_vbo_check(pScrn, 16);
30
 
     r600_cp_start(pScrn);
31
 
 
32
 
     set_default_state(pScrn, accel_state->ib);
33
 
 
34
 
-    set_generic_scissor(pScrn, accel_state->ib, 0, 0, accel_state->dst_width, accel_state->dst_height);
35
 
-    set_screen_scissor(pScrn, accel_state->ib, 0, 0, accel_state->dst_width, accel_state->dst_height);
36
 
-    set_window_scissor(pScrn, accel_state->ib, 0, 0, accel_state->dst_width, accel_state->dst_height);
37
 
+    set_generic_scissor(pScrn, accel_state->ib, 0, 0, dst_width, dst_height);
38
 
+    set_screen_scissor(pScrn, accel_state->ib, 0, 0, dst_width, dst_height);
39
 
+    set_window_scissor(pScrn, accel_state->ib, 0, 0, dst_width, dst_height);
40
 
 
41
 
 #if defined(XF86DRM_MODE)
42
 
     if (info->cs) {
43
 
@@ -577,28 +573,28 @@ R600DoPrepareCopy(ScrnInfoPtr pScrn,
44
 
 
45
 
 
46
 
     /* Render setup */
47
 
-    if (accel_state->planemask & 0x000000ff)
48
 
+    if (planemask & 0x000000ff)
49
 
        pmask |= 4; /* B */
50
 
-    if (accel_state->planemask & 0x0000ff00)
51
 
+    if (planemask & 0x0000ff00)
52
 
        pmask |= 2; /* G */
53
 
-    if (accel_state->planemask & 0x00ff0000)
54
 
+    if (planemask & 0x00ff0000)
55
 
        pmask |= 1; /* R */
56
 
-    if (accel_state->planemask & 0xff000000)
57
 
+    if (planemask & 0xff000000)
58
 
        pmask |= 8; /* A */
59
 
     BEGIN_BATCH(6);
60
 
     EREG(accel_state->ib, CB_TARGET_MASK,                      (pmask << TARGET0_ENABLE_shift));
61
 
-    EREG(accel_state->ib, CB_COLOR_CONTROL,                    RADEON_ROP[accel_state->rop]);
62
 
+    EREG(accel_state->ib, CB_COLOR_CONTROL,                    RADEON_ROP[rop]);
63
 
     END_BATCH();
64
 
 
65
 
     cb_conf.id = 0;
66
 
     cb_conf.w = accel_state->dst_pitch;
67
 
-    cb_conf.h = accel_state->dst_height;
68
 
+    cb_conf.h = dst_height;
69
 
     cb_conf.base = accel_state->dst_mc_addr;
70
 
     cb_conf.bo = accel_state->dst_bo;
71
 
-    if (accel_state->dst_bpp == 8) {
72
 
+    if (dst_bpp == 8) {
73
 
        cb_conf.format = COLOR_8;
74
 
        cb_conf.comp_swap = 3; /* A */
75
 
-    } else if (accel_state->dst_bpp == 16) {
76
 
+    } else if (dst_bpp == 16) {
77
 
        cb_conf.format = COLOR_5_6_5;
78
 
        cb_conf.comp_swap = 2; /* RGB */
79
 
     } else {
80
 
diff --git a/src/radeon.h b/src/radeon.h
81
 
index 4829309..354a5dd 100644
82
 
--- a/src/radeon.h
83
 
+++ b/src/radeon.h
84
 
@@ -767,7 +767,6 @@ struct radeon_accel_state {
85
 
     uint32_t          dst_size;
86
 
     uint64_t          dst_mc_addr;
87
 
     uint32_t          dst_pitch;
88
 
-    uint32_t          dst_width;
89
 
     uint32_t          dst_height;
90
 
     uint32_t          dst_bpp;
91
 
     uint32_t          dst_domain;
92
 
1.7.0.4
93