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  • Committer: Bazaar Package Importer
  • Author(s): Agney Lopes Roth Ferraz
  • Date: 2009-03-28 22:55:02 UTC
  • mfrom: (3.1.2 squeeze)
  • Revision ID: james.westby@ubuntu.com-20090328225502-p4bnvi8q6hr95cij
Tags: 0.5c-1
http://bugs.debian.org/517591
http://bugs.debian.org/511237
http://bugs.debian.org/457703
http://bugs.debian.org/519256
http://bugs.debian.org/449250
http://bugs.debian.org/457820
http://bugs.debian.org/497758
New upstream version. 
(Closes: #517591, #511237, #457703, #519256, #449250, #457820, #497758) 

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arch/linux/x86/processor.h
1
1
/*
2
2
 *    HardInfo - Displays System Information
3
 
 *    Copyright (C) 2003-2006 Leandro A. F. Pereira <leandro@linuxmag.com.br>
 
3
 *    Copyright (C) 2003-2006 Leandro A. F. Pereira <leandro@hardinfo.org>
4
4
 *
5
5
 *    This program is free software; you can redistribute it and/or modify
6
6
 *    it under the terms of the GNU General Public License as published by
16
16
 *    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
17
17
 */
18
18
 
 
19
typedef struct _ProcessorCache  ProcessorCache;
 
20
 
 
21
struct _ProcessorCache {
 
22
  gint level;
 
23
  gint number_of_sets;
 
24
  gint physical_line_partition;
 
25
  gint size;
 
26
  gchar *type;
 
27
  gint ways_of_associativity;
 
28
};
 
29
 
19
30
struct _Processor {
20
31
    gchar *model_name;
21
32
    gchar *vendor_id;
30
41
    gchar *strmodel;
31
42
    
32
43
    gint id;
 
44
    
 
45
    GSList *cache;
33
46
};
34
47
 
35
48
/*
148
161
    }
149
162
}
150
163
 
 
164
static gchar *__cache_get_info_as_string(Processor *processor)
 
165
{
 
166
    gchar *result = g_strdup("");
 
167
    GSList *cache_list;
 
168
    ProcessorCache *cache;
 
169
    
 
170
    if (!processor->cache) {
 
171
        return g_strdup("Cache information not available=\n");
 
172
    }
 
173
    
 
174
    for (cache_list = processor->cache; cache_list; cache_list = cache_list->next) {
 
175
        cache = (ProcessorCache *)cache_list->data;
 
176
        
 
177
        result = h_strdup_cprintf("Level %d (%s)=%d-way set-associative, %d sets, %dKB size\n",
 
178
                                  result,
 
179
                                  cache->level,
 
180
                                  cache->type,
 
181
                                  cache->ways_of_associativity,
 
182
                                  cache->number_of_sets,
 
183
                                  cache->size);
 
184
    }
 
185
    
 
186
    return result;
 
187
}
 
188
 
 
189
static void __cache_obtain_info(Processor *processor, gint processor_number)
 
190
{
 
191
    ProcessorCache *cache;
 
192
    gchar *endpoint, *entry, *index;
 
193
    gint i;
 
194
    
 
195
    endpoint = g_strdup_printf("/sys/devices/system/cpu/cpu%d/cache", processor_number);
 
196
    
 
197
    for (i = 0; ; i++) {
 
198
      cache = g_new0(ProcessorCache, 1);
 
199
      
 
200
      index = g_strdup_printf("index%d/", i);
 
201
 
 
202
      entry = g_strconcat(index, "type", NULL);
 
203
      cache->type = h_sysfs_read_string(endpoint, entry);
 
204
      g_free(entry);
 
205
      
 
206
      if (!cache->type) {
 
207
        g_free(cache);
 
208
        g_free(index);
 
209
        goto fail;
 
210
      }
 
211
 
 
212
      entry = g_strconcat(index, "level", NULL);
 
213
      cache->level = h_sysfs_read_int(endpoint, entry);
 
214
      g_free(entry);
 
215
 
 
216
      entry = g_strconcat(index, "number_of_sets", NULL);
 
217
      cache->number_of_sets = h_sysfs_read_int(endpoint, entry);
 
218
      g_free(entry);
 
219
 
 
220
      entry = g_strconcat(index, "physical_line_partition", NULL);
 
221
      cache->physical_line_partition = h_sysfs_read_int(endpoint, entry);
 
222
      g_free(entry);
 
223
 
 
224
      entry = g_strconcat(index, "size", NULL);
 
225
      cache->size = h_sysfs_read_int(endpoint, entry);
 
226
      g_free(entry);
 
227
 
 
228
 
 
229
      entry = g_strconcat(index, "ways_of_associativity", NULL);
 
230
      cache->ways_of_associativity = h_sysfs_read_int(endpoint, entry);
 
231
      g_free(entry);
 
232
      
 
233
      g_free(index);
 
234
 
 
235
      processor->cache = g_slist_append(processor->cache, cache);
 
236
    }
 
237
 
 
238
fail:    
 
239
    g_free(endpoint);
 
240
}
 
241
 
151
242
static GSList *__scan_processors(void)
152
243
{
153
244
    GSList *procs = NULL;
154
245
    Processor *processor = NULL;
155
246
    FILE *cpuinfo;
156
247
    gchar buffer[256];
 
248
    gint processor_number = 0;
157
249
 
158
250
    cpuinfo = fopen("/proc/cpuinfo", "r");
159
251
    if (!cpuinfo)
169
261
            }
170
262
 
171
263
            processor = g_new0(Processor, 1);
 
264
            
 
265
            __cache_obtain_info(processor, processor_number++);
172
266
        }
173
267
 
174
268
        if (tmp[0] && tmp[1]) {
208
302
    return procs;
209
303
}
210
304
 
 
305
/*
 
306
 * Sources: 
 
307
 * - Linux' cpufeature.h
 
308
 * - http://gentoo-wiki.com/Cpuinfo
 
309
 * - Intel IA-32 Architecture Software Development Manual
 
310
 */
211
311
static struct {
212
312
    char *name, *meaning;
213
313
} flag_meaning[] = {
254
354
        { "tm",         "Thermal Monitor"                               },
255
355
        { "pbe",        "Pending Break Enable"                          },
256
356
        { "pb",         "Pending Break Enable"                          },
 
357
        { "pn",         "Processor serial number"                       },
 
358
        { "ds",         "Debug Store"                                   },
 
359
        { "xmm2",       "Streaming SIMD Extensions-2"                   },
 
360
        { "xmm3",       "Streaming SIMD Extensions-3"                   },
 
361
        { "selfsnoop",  "CPU self snoop"                                },
 
362
        { "rdtscp",     "RDTSCP"                                        },
 
363
        { "recovery",   "CPU in recovery mode"                          },
 
364
        { "longrun",    "Longrun power control"                         },
 
365
        { "lrti",       "LongRun table interface"                       },
 
366
        { "cxmmx",      "Cyrix MMX extensions"                          },
 
367
        { "k6_mtrr",    "AMD K6 nonstandard MTRRs"                      },
 
368
        { "cyrix_arr",  "Cyrix ARRs (= MTRRs)"                          },
 
369
        { "centaur_mcr","Centaur MCRs (= MTRRs)"                        },
 
370
        { "constant_tsc","TSC ticks at a constant rate"                 },
 
371
        { "up",         "smp kernel running on up"                      },
 
372
        { "fxsave_leak","FXSAVE leaks FOP/FIP/FOP"                      },
 
373
        { "arch_perfmon","Intel Architectural PerfMon"                  },
 
374
        { "pebs",       "Precise-Event Based Sampling"                  },
 
375
        { "bts",        "Branch Trace Store"                            },
 
376
        { "sync_rdtsc", "RDTSC synchronizes the CPU"                    },
 
377
        { "rep_good",   "rep microcode works well on this CPU"          },
 
378
        { "mwait",      "Monitor/Mwait support"                         },
 
379
        { "ds_cpl",     "CPL Qualified Debug Store"                     },
 
380
        { "est",        "Enhanced SpeedStep"                            },
 
381
        { "tm2",        "Thermal Monitor 2"                             },
 
382
        { "cid",        "Context ID"                                    },
 
383
        { "xtpr",       "Send Task Priority Messages"                   },
 
384
        { "xstore",     "on-CPU RNG present (xstore insn)"              },
 
385
        { "xstore_en",  "on-CPU RNG enabled"                            },
 
386
        { "xcrypt",     "on-CPU crypto (xcrypt insn)"                   },
 
387
        { "xcrypt_en",  "on-CPU crypto enabled"                         },
 
388
        { "ace2",       "Advanced Cryptography Engine v2"               },
 
389
        { "ace2_en",    "ACE v2 enabled"                                },
 
390
        { "phe",        "PadLock Hash Engine"                           },
 
391
        { "phe_en",     "PHE enabled"                                   },
 
392
        { "pmm",        "PadLock Montgomery Multiplier"                 },
 
393
        { "pmm_en",     "PMM enabled"                                   },
 
394
        { "lahf_lm",    "LAHF/SAHF in long mode"                        },
 
395
        { "cmp_legacy", "HyperThreading not valid"                      },
 
396
        { "lm",         "LAHF/SAHF in long mode"                        },
 
397
        { "ds_cpl",     "CPL Qualified Debug Store"                     },
 
398
        { "vmx",        "Virtualization support (Intel)"                },
 
399
        { "svm",        "Virtualization support (AMD)"                  },
 
400
        { "est",        "Enhanced SpeedStep"                            },
 
401
        { "tm2",        "Thermal Monitor 2"                             },
 
402
        { "ssse3",      "Supplemental Streaming SIMD Extension 3"       },
 
403
        { "cx16",       "CMPXCHG16B instruction"                        },
 
404
        { "xptr",       "Send Task Priority Messages"                   },
 
405
        { "pebs",       "Precise Event Based Sampling"                  },
 
406
        { "bts",        "Branch Trace Store"                            },
 
407
        { "ida",        "Intel Dynamic Acceleration"                    },
 
408
        { "arch_perfmon","Intel Architectural PerfMon"                  },
 
409
        { "pni",        "Streaming SIMD Extension 3 (Prescott New Instruction)" },
 
410
        { "rep_good",   "rep microcode works well on this CPU"          },
 
411
        { "ts",         "Thermal Sensor"                                },
 
412
        { "sse3",       "Streaming SIMD Extension 3"                    },
 
413
        { "sse4",       "Streaming SIMD Extension 4"                    },
 
414
        { "tni",        "Tejas New Instruction"                         },
 
415
        { "nni",        "Nehalem New Instruction"                       },
 
416
        { "tpr",        "Task Priority Register"                        },
 
417
        { "vid",        "Voltage Identifier"                            },
 
418
        { "fid",        "Frequency Identifier"                          },
257
419
        { NULL,         NULL                                            },
258
420
};
259
421
 
289
451
 
290
452
static gchar *processor_get_detailed_info(Processor * processor)
291
453
{
292
 
    gchar *tmp, *ret;
 
454
    gchar *tmp, *ret, *cache_info;
293
455
 
294
456
    tmp = processor_get_capabilities_from_flags(processor->flags);
 
457
    cache_info = __cache_get_info_as_string(processor);
 
458
    
295
459
    ret = g_strdup_printf("[Processor]\n"
296
460
                          "Name=%s\n"
297
461
                          "Family, model, stepping=%d, %d, %d (%s)\n"
307
471
                          "F00F Bug=%s\n"
308
472
                          "Coma Bug=%s\n"
309
473
                          "Has FPU=%s\n"
 
474
                          "[Cache]\n"
 
475
                          "%s\n"
310
476
                          "[Capabilities]\n"
311
477
                          "%s",
312
478
                          processor->model_name,
322
488
#else
323
489
                          "Big Endian",
324
490
#endif
325
 
                          processor->bug_fdiv ? processor->bug_fdiv : "yes",
326
 
                          processor->bug_hlt  ? processor->bug_hlt  : "yes",
327
 
                          processor->bug_f00f ? processor->bug_f00f : "yes",
328
 
                          processor->bug_coma ? processor->bug_coma : "yes",
 
491
                          processor->bug_fdiv ? processor->bug_fdiv : "no",
 
492
                          processor->bug_hlt  ? processor->bug_hlt  : "no",
 
493
                          processor->bug_f00f ? processor->bug_f00f : "no",
 
494
                          processor->bug_coma ? processor->bug_coma : "no",
329
495
                          processor->has_fpu  ? processor->has_fpu  : "no",
 
496
                          cache_info,
330
497
                          tmp);
331
498
    g_free(tmp);
 
499
    g_free(cache_info);
 
500
    
332
501
    return ret;
333
 
 
334
502
}
335
503
 
336
504
static gchar *processor_get_info(GSList * processors)