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* backwards incompatibilities, (which should be avoided whenever possible).
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#define VIA_DRM_DRIVER_DATE "20060616"
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#define VIA_DRM_DRIVER_DATE "20070202"
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#define VIA_DRM_DRIVER_MAJOR 2
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#define VIA_DRM_DRIVER_MINOR 10
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#define VIA_DRM_DRIVER_PATCHLEVEL 2
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#define VIA_DRM_DRIVER_VERSION (((VIA_DRM_DRIVER_MAJOR) << 16) | (VIA_DRM_DRIVER_MINOR))
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#define VIA_DRM_DRIVER_MINOR 11
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#define VIA_DRM_DRIVER_PATCHLEVEL 1
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#define VIA_DRM_DRIVER_VERSION (((VIA_DRM_DRIVER_MAJOR) << 16) | (VIA_DRM_DRIVER_MINOR))
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#define VIA_NR_SAREA_CLIPRECTS 8
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#define VIA_NR_XVMC_PORTS 10
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#define VIA_NR_XVMC_LOCKS 5
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#define VIA_MAX_CACHELINE_SIZE 64
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#define VIA_NR_SAREA_CLIPRECTS 8
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#define VIA_NR_XVMC_PORTS 10
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#define VIA_NR_XVMC_LOCKS 5
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#define VIA_MAX_CACHELINE_SIZE 64
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#define XVMCLOCKPTR(saPriv,lockNo) \
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((volatile drm_hw_lock_t *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
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((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
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(VIA_MAX_CACHELINE_SIZE - 1)) & \
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~(VIA_MAX_CACHELINE_SIZE - 1)) + \
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VIA_MAX_CACHELINE_SIZE*(lockNo)))
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/* Each region is a minimum of 64k, and there are at most 64 of them.
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#define VIA_NR_TEX_REGIONS 64
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#define VIA_LOG_MIN_TEX_REGION_SIZE 16
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#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
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#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
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#define VIA_UPLOAD_CTX 0x4
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#define VIA_UPLOAD_BUFFERS 0x8
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#define VIA_UPLOAD_TEX0 0x10
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#define VIA_UPLOAD_TEX1 0x20
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#define VIA_UPLOAD_CLIPRECTS 0x40
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#define VIA_UPLOAD_ALL 0xff
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#define DRM_VIA_FENCE_TYPE_ACCEL 0x00000002
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67
/* VIA specific ioctls */
78
68
#define DRM_VIA_ALLOCMEM 0x00
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#define DRM_VIA_FREEMEM 0x01
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#define DRM_VIA_FREEMEM 0x01
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#define DRM_VIA_AGP_INIT 0x02
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#define DRM_VIA_FB_INIT 0x03
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#define DRM_VIA_FB_INIT 0x03
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#define DRM_VIA_MAP_INIT 0x04
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#define DRM_VIA_DEC_FUTEX 0x05
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75
#define DRM_VIA_DMA_INIT 0x07
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#define DRM_VIA_CMDBUFFER 0x08
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#define DRM_VIA_FLUSH 0x09
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#define DRM_VIA_PCICMD 0x0a
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#define DRM_VIA_FLUSH 0x09
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#define DRM_VIA_PCICMD 0x0a
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79
#define DRM_VIA_CMDBUF_SIZE 0x0b
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#define DRM_VIA_WAIT_IRQ 0x0d
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#define DRM_VIA_DMA_BLIT 0x0e
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#define DRM_VIA_WAIT_IRQ 0x0d
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#define DRM_VIA_DMA_BLIT 0x0e
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#define DRM_VIA_BLIT_SYNC 0x0f
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85
#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
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unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
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unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
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unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
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unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
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/* Used by the 3d driver only at this point, for pageflipping:
220
unsigned int pfCurrentOffset;
210
unsigned int pfCurrentOffset;
221
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} drm_via_sarea_t;
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typedef struct _drm_via_cmdbuf_size {
260
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struct drm_wait_vblank_reply reply;
261
251
} drm_via_irqwait_t;
263
typedef struct drm_via_blitsync {
253
typedef struct drm_via_blitsync {
264
254
uint32_t sync_handle;
266
256
} drm_via_blitsync_t;
269
259
* Below,"flags" is currently unused but will be used for possible future
270
* extensions like kernel space bounce buffers for bad alignments and
260
* extensions like kernel space bounce buffers for bad alignments and
271
261
* blit engine busy-wait polling for better latency in the absence of
275
265
typedef struct drm_via_dmablit {
277
uint32_t line_length;
282
unsigned char *mem_addr;
288
drm_via_blitsync_t sync;
267
uint32_t line_length;
272
unsigned char *mem_addr;
278
drm_via_blitsync_t sync;
289
279
} drm_via_dmablit_t;