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- Committer: Package Import Robot
- Author(s): Alberto Milone
- Date: 2013-07-08 15:50:52 UTC
- Revision ID: package-import@ubuntu.com-20130708155052-3nw9i2yslk7ogkwm
Tags: 304.88-0ubuntu0.0.3
* Initial release (LP: #1198942).
* Start with 304.88-0ubuntu0.0.3 so that transitional packages work.
* Start with 304.88-0ubuntu0.0.3 so that transitional packages work.
- files added:
- debian
- debian/dkms
- debian/dkms/patches
- debian/headers
- debian/templates
added
removed
debian/headers/cuda.h
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/*
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* Copyright 1993-2010 NVIDIA Corporation. All rights reserved.
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*
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* NOTICE TO USER:
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*
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* This source code is subject to NVIDIA ownership rights under U.S. and
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* international Copyright laws. Users and possessors of this source code
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* are hereby granted a nonexclusive, royalty-free license to use this code
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* in individual and commercial software.
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*
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* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
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* CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
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* IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
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* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
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* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
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* OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
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* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE
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* OR PERFORMANCE OF THIS SOURCE CODE.
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*
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* U.S. Government End Users. This source code is a "commercial item" as
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* that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of
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* "commercial computer software" and "commercial computer software
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* documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995)
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* and is provided to the U.S. Government only as a commercial end item.
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* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
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* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
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* source code with only those rights set forth herein.
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*
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* Any use of this source code in individual and commercial software must
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* include, in the user documentation and internal comments to the code,
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* the above Disclaimer and U.S. Government End Users Notice.
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*/
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#ifndef __cuda_cuda_h__
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#define __cuda_cuda_h__
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#include <stdlib.h>
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/**
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* \file
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* \name Data types used by CUDA driver
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* \author NVIDIA Corporation
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* \brief Data types used by CUDA driver
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*/
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/**
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* \defgroup CUDA_TYPES Data types used by CUDA driver
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* \ingroup CUDA_DRIVER
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* @{
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*/
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/**
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* CUDA API version number
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*/
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#define CUDA_VERSION 3010 /* 3.1 */
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef unsigned int CUdeviceptr; ///< CUDA device pointer
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typedef int CUdevice; ///< CUDA device
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typedef struct CUctx_st *CUcontext; ///< CUDA context
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typedef struct CUmod_st *CUmodule; ///< CUDA module
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typedef struct CUfunc_st *CUfunction; ///< CUDA function
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typedef struct CUarray_st *CUarray; ///< CUDA array
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typedef struct CUtexref_st *CUtexref; ///< CUDA texture reference
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typedef struct CUsurfref_st *CUsurfref; ///< CUDA surface reference
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typedef struct CUevent_st *CUevent; ///< CUDA event
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typedef struct CUstream_st *CUstream; ///< CUDA stream
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typedef struct CUgraphicsResource_st *CUgraphicsResource; ///< CUDA graphics interop resource
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typedef struct CUuuid_st { ///< CUDA definition of UUID
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char bytes[16];
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} CUuuid;
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/************************************
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**
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** Enums
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**
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***********************************/
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/**
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* Context creation flags
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*/
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typedef enum CUctx_flags_enum {
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CU_CTX_SCHED_AUTO = 0, ///< Automatic scheduling
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CU_CTX_SCHED_SPIN = 1, ///< Set spin as default scheduling
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CU_CTX_SCHED_YIELD = 2, ///< Set yield as default scheduling
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CU_CTX_SCHED_MASK = 0x3,
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CU_CTX_BLOCKING_SYNC = 4, ///< Use blocking synchronization
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CU_CTX_MAP_HOST = 8, ///< Support mapped pinned allocations
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CU_CTX_LMEM_RESIZE_TO_MAX = 16, ///< Keep local memory allocation after launch
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CU_CTX_FLAGS_MASK = 0x1f
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} CUctx_flags;
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/**
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* Event creation flags
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*/
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typedef enum CUevent_flags_enum {
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CU_EVENT_DEFAULT = 0, ///< Default event flag
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CU_EVENT_BLOCKING_SYNC = 1 ///< Event uses blocking synchronization
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} CUevent_flags;
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/**
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* Array formats
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*/
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typedef enum CUarray_format_enum {
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CU_AD_FORMAT_UNSIGNED_INT8 = 0x01, ///< Unsigned 8-bit integers
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CU_AD_FORMAT_UNSIGNED_INT16 = 0x02, ///< Unsigned 16-bit integers
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CU_AD_FORMAT_UNSIGNED_INT32 = 0x03, ///< Unsigned 32-bit integers
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CU_AD_FORMAT_SIGNED_INT8 = 0x08, ///< Signed 8-bit integers
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CU_AD_FORMAT_SIGNED_INT16 = 0x09, ///< Signed 16-bit integers
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CU_AD_FORMAT_SIGNED_INT32 = 0x0a, ///< Signed 32-bit integers
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CU_AD_FORMAT_HALF = 0x10, ///< 16-bit floating point
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CU_AD_FORMAT_FLOAT = 0x20 ///< 32-bit floating point
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} CUarray_format;
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/**
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* Texture reference addressing modes
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*/
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typedef enum CUaddress_mode_enum {
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CU_TR_ADDRESS_MODE_WRAP = 0, ///< Wrapping address mode
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CU_TR_ADDRESS_MODE_CLAMP = 1, ///< Clamp to edge address mode
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CU_TR_ADDRESS_MODE_MIRROR = 2 ///< Mirror address mode
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} CUaddress_mode;
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/**
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* Texture reference filtering modes
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*/
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typedef enum CUfilter_mode_enum {
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CU_TR_FILTER_MODE_POINT = 0, ///< Point filter mode
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CU_TR_FILTER_MODE_LINEAR = 1 ///< Linear filter mode
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} CUfilter_mode;
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/**
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* Device properties
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*/
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typedef enum CUdevice_attribute_enum {
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CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK = 1, ///< Maximum number of threads per block
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CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X = 2, ///< Maximum block dimension X
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CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y = 3, ///< Maximum block dimension Y
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CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z = 4, ///< Maximum block dimension Z
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CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X = 5, ///< Maximum grid dimension X
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CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y = 6, ///< Maximum grid dimension Y
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CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z = 7, ///< Maximum grid dimension Z
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CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK = 8, ///< Maximum shared memory available per block in bytes
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CU_DEVICE_ATTRIBUTE_SHARED_MEMORY_PER_BLOCK = 8, ///< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK
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CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY = 9, ///< Memory available on device for __constant__ variables in a CUDA C kernel in bytes
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CU_DEVICE_ATTRIBUTE_WARP_SIZE = 10, ///< Warp size in threads
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CU_DEVICE_ATTRIBUTE_MAX_PITCH = 11, ///< Maximum pitch in bytes allowed by memory copies
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CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK = 12, ///< Maximum number of 32-bit registers available per block
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CU_DEVICE_ATTRIBUTE_REGISTERS_PER_BLOCK = 12, ///< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK
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CU_DEVICE_ATTRIBUTE_CLOCK_RATE = 13, ///< Peak clock frequency in kilohertz
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CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT = 14, ///< Alignment requirement for textures
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CU_DEVICE_ATTRIBUTE_GPU_OVERLAP = 15, ///< Device can possibly copy memory and execute a kernel concurrently
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CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT = 16, ///< Number of multiprocessors on device
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CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT = 17, ///< Specifies whether there is a run time limit on kernels
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CU_DEVICE_ATTRIBUTE_INTEGRATED = 18, ///< Device is integrated with host memory
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CU_DEVICE_ATTRIBUTE_CAN_MAP_HOST_MEMORY = 19, ///< Device can map host memory into CUDA address space
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CU_DEVICE_ATTRIBUTE_COMPUTE_MODE = 20, ///< Compute mode (See ::CUcomputemode for details)
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_WIDTH = 21, ///< Maximum 1D texture width
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_WIDTH = 22, ///< Maximum 2D texture width
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_HEIGHT = 23,///< Maximum 2D texture height
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH = 24, ///< Maximum 3D texture width
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT = 25,///< Maximum 3D texture height
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH = 26, ///< Maximum 3D texture depth
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_WIDTH = 27, ///< Maximum texture array width
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_HEIGHT = 28,///< Maximum texture array height
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CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_NUMSLICES = 29, ///< Maximum slices in a texture array
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CU_DEVICE_ATTRIBUTE_SURFACE_ALIGNMENT = 30, ///< Alignment requirement for surfaces
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CU_DEVICE_ATTRIBUTE_CONCURRENT_KERNELS = 31, ///< Device can possibly execute multiple kernels concurrently
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CU_DEVICE_ATTRIBUTE_ECC_ENABLED = 32, ///< Device has ECC support enabled
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CU_DEVICE_ATTRIBUTE_PCI_BUS_ID = 33, ////< PCI bus ID of the device
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CU_DEVICE_ATTRIBUTE_PCI_DEVICE_ID = 34 ////< PCI device ID of the device
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} CUdevice_attribute;
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/**
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* Legacy device properties
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*/
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typedef struct CUdevprop_st {
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int maxThreadsPerBlock; ///< Maximum number of threads per block
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int maxThreadsDim[3]; ///< Maximum size of each dimension of a block
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int maxGridSize[3]; ///< Maximum size of each dimension of a grid
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int sharedMemPerBlock; ///< Shared memory available per block in bytes
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int totalConstantMemory; ///< Constant memory available on device in bytes
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int SIMDWidth; ///< Warp size in threads
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int memPitch; ///< Maximum pitch in bytes allowed by memory copies
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int regsPerBlock; ///< 32-bit registers available per block
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int clockRate; ///< Clock frequency in kilohertz
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int textureAlign; ///< Alignment requirement for textures
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} CUdevprop;
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/**
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* Function properties
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*/
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typedef enum CUfunction_attribute_enum {
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/**
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* The number of threads beyond which a launch of the function would fail.
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* This number depends on both the function and the device on which the
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* function is currently loaded.
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*/
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CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK = 0,
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/**
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* The size in bytes of statically-allocated shared memory required by
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* this function. This does not include dynamically-allocated shared
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* memory requested by the user at runtime.
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*/
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CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES = 1,
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/**
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* The size in bytes of user-allocated constant memory required by this
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* function.
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*/
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CU_FUNC_ATTRIBUTE_CONST_SIZE_BYTES = 2,
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/**
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* The size in bytes of thread local memory used by this function.
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*/
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CU_FUNC_ATTRIBUTE_LOCAL_SIZE_BYTES = 3,
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/**
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* The number of registers used by each thread of this function.
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*/
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CU_FUNC_ATTRIBUTE_NUM_REGS = 4,
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/**
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* The PTX virtual architecture version for which the function was compiled.
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*/
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CU_FUNC_ATTRIBUTE_PTX_VERSION = 5,
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/**
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* The binary version for which the function was compiled.
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*/
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CU_FUNC_ATTRIBUTE_BINARY_VERSION = 6,
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CU_FUNC_ATTRIBUTE_MAX
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} CUfunction_attribute;
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/**
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* Function cache configurations
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*/
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typedef enum CUfunc_cache_enum {
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CU_FUNC_CACHE_PREFER_NONE = 0x00,
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CU_FUNC_CACHE_PREFER_SHARED = 0x01,
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CU_FUNC_CACHE_PREFER_L1 = 0x02
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} CUfunc_cache;
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/**
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* Memory types
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*/
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typedef enum CUmemorytype_enum {
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CU_MEMORYTYPE_HOST = 0x01, ///< Host memory
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CU_MEMORYTYPE_DEVICE = 0x02, ///< Device memory
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CU_MEMORYTYPE_ARRAY = 0x03 ///< Array memory
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} CUmemorytype;
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/**
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* Compute Modes
264
*/
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typedef enum CUcomputemode_enum {
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CU_COMPUTEMODE_DEFAULT = 0, ///< Default compute mode (Multiple contexts allowed per device)
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CU_COMPUTEMODE_EXCLUSIVE = 1, ///< Compute-exclusive mode (Only one context can be present on this device at a time)
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CU_COMPUTEMODE_PROHIBITED = 2 ///< Compute-prohibited mode (No contexts can be created on this device at this time)
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} CUcomputemode;
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/**
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* Online compiler options
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*/
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typedef enum CUjit_option_enum
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{
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/**
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* Max number of registers that a thread may use.\n
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* Option type: unsigned int
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*/
280
CU_JIT_MAX_REGISTERS = 0,
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/**
283
* IN: Specifies minimum number of threads per block to target compilation
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* for\n
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* OUT: Returns the number of threads the compiler actually targeted.
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* This restricts the resource utilization fo the compiler (e.g. max
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* registers) such that a block with the given number of threads should be
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* able to launch based on register limitations. Note, this option does not
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* currently take into account any other resource limitations, such as
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* shared memory utilization.\n
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* Option type: unsigned int
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*/
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CU_JIT_THREADS_PER_BLOCK,
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/**
296
* Returns a float value in the option of the wall clock time, in
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* milliseconds, spent creating the cubin\n
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* Option type: float
299
*/
300
CU_JIT_WALL_TIME,
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/**
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* Pointer to a buffer in which to print any log messsages from PTXAS
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* that are informational in nature (the buffer size is specified via
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* option ::CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES) \n
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* Option type: char*
307
*/
308
CU_JIT_INFO_LOG_BUFFER,
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/**
311
* IN: Log buffer size in bytes. Log messages will be capped at this size
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* (including null terminator)\n
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* OUT: Amount of log buffer filled with messages\n
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* Option type: unsigned int
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*/
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CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES,
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/**
319
* Pointer to a buffer in which to print any log messages from PTXAS that
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* reflect errors (the buffer size is specified via option
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* ::CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES)\n
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* Option type: char*
323
*/
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CU_JIT_ERROR_LOG_BUFFER,
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/**
327
* IN: Log buffer size in bytes. Log messages will be capped at this size
328
* (including null terminator)\n
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* OUT: Amount of log buffer filled with messages\n
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* Option type: unsigned int
331
*/
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CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES,
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/**
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* Level of optimizations to apply to generated code (0 - 4), with 4
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* being the default and highest level of optimizations.\n
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* Option type: unsigned int
338
*/
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CU_JIT_OPTIMIZATION_LEVEL,
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/**
342
* No option value required. Determines the target based on the current
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* attached context (default)\n
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* Option type: No option value needed
345
*/
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CU_JIT_TARGET_FROM_CUCONTEXT,
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/**
349
* Target is chosen based on supplied ::CUjit_target_enum.\n
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* Option type: unsigned int for enumerated type ::CUjit_target_enum
351
*/
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CU_JIT_TARGET,
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/**
355
* Specifies choice of fallback strategy if matching cubin is not found.
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* Choice is based on supplied ::CUjit_fallback_enum.\n
357
* Option type: unsigned int for enumerated type ::CUjit_fallback_enum
358
*/
359
CU_JIT_FALLBACK_STRATEGY
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} CUjit_option;
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/**
364
* Online compilation targets
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*/
366
typedef enum CUjit_target_enum
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{
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CU_TARGET_COMPUTE_10 = 0, ///< Compute device class 1.0
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CU_TARGET_COMPUTE_11, ///< Compute device class 1.1
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CU_TARGET_COMPUTE_12, ///< Compute device class 1.2
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CU_TARGET_COMPUTE_13, ///< Compute device class 1.3
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CU_TARGET_COMPUTE_20 ///< Compute device class 2.0
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} CUjit_target;
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/**
376
* Cubin matching fallback strategies
377
*/
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typedef enum CUjit_fallback_enum
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{
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/** Prefer to compile ptx */
381
CU_PREFER_PTX = 0,
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/** Prefer to fall back to compatible binary code */
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CU_PREFER_BINARY
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} CUjit_fallback;
387
388
/**
389
* Flags to register a graphics resource
390
*/
391
typedef enum CUgraphicsRegisterFlags_enum {
392
CU_GRAPHICS_REGISTER_FLAGS_NONE = 0x00
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} CUgraphicsRegisterFlags;
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395
/**
396
* Flags for mapping and unmapping interop resources
397
*/
398
typedef enum CUgraphicsMapResourceFlags_enum {
399
CU_GRAPHICS_MAP_RESOURCE_FLAGS_NONE = 0x00,
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CU_GRAPHICS_MAP_RESOURCE_FLAGS_READ_ONLY = 0x01,
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CU_GRAPHICS_MAP_RESOURCE_FLAGS_WRITE_DISCARD = 0x02
402
} CUgraphicsMapResourceFlags;
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/**
405
* Array indices for cube faces
406
*/
407
typedef enum CUarray_cubemap_face_enum {
408
CU_CUBEMAP_FACE_POSITIVE_X = 0x00, ///< Positive X face of cubemap
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CU_CUBEMAP_FACE_NEGATIVE_X = 0x01, ///< Negative X face of cubemap
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CU_CUBEMAP_FACE_POSITIVE_Y = 0x02, ///< Positive Y face of cubemap
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CU_CUBEMAP_FACE_NEGATIVE_Y = 0x03, ///< Negative Y face of cubemap
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CU_CUBEMAP_FACE_POSITIVE_Z = 0x04, ///< Positive Z face of cubemap
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CU_CUBEMAP_FACE_NEGATIVE_Z = 0x05 ///< Negative Z face of cubemap
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} CUarray_cubemap_face;
415
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/**
417
* Limits
418
*/
419
typedef enum CUlimit_enum {
420
CU_LIMIT_STACK_SIZE = 0x00, ///< GPU thread stack size
421
CU_LIMIT_PRINTF_FIFO_SIZE = 0x01 ///< GPU printf FIFO size
422
} CUlimit;
423
424
/************************************
425
**
426
** Error codes
427
**
428
***********************************/
429
430
/**
431
* Error codes
432
*/
433
typedef enum cudaError_enum {
434
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CUDA_SUCCESS = 0, ///< No errors
436
CUDA_ERROR_INVALID_VALUE = 1, ///< Invalid value
437
CUDA_ERROR_OUT_OF_MEMORY = 2, ///< Out of memory
438
CUDA_ERROR_NOT_INITIALIZED = 3, ///< Driver not initialized
439
CUDA_ERROR_DEINITIALIZED = 4, ///< Driver deinitialized
440
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CUDA_ERROR_NO_DEVICE = 100, ///< No CUDA-capable device available
442
CUDA_ERROR_INVALID_DEVICE = 101, ///< Invalid device
443
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CUDA_ERROR_INVALID_IMAGE = 200, ///< Invalid kernel image
445
CUDA_ERROR_INVALID_CONTEXT = 201, ///< Invalid context
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CUDA_ERROR_CONTEXT_ALREADY_CURRENT = 202, ///< Context already current
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CUDA_ERROR_MAP_FAILED = 205, ///< Map failed
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CUDA_ERROR_UNMAP_FAILED = 206, ///< Unmap failed
449
CUDA_ERROR_ARRAY_IS_MAPPED = 207, ///< Array is mapped
450
CUDA_ERROR_ALREADY_MAPPED = 208, ///< Already mapped
451
CUDA_ERROR_NO_BINARY_FOR_GPU = 209, ///< No binary for GPU
452
CUDA_ERROR_ALREADY_ACQUIRED = 210, ///< Already acquired
453
CUDA_ERROR_NOT_MAPPED = 211, ///< Not mapped
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CUDA_ERROR_NOT_MAPPED_AS_ARRAY = 212, ///< Mapped resource not available for access as an array
455
CUDA_ERROR_NOT_MAPPED_AS_POINTER = 213, ///< Mapped resource not available for access as a pointer
456
CUDA_ERROR_ECC_UNCORRECTABLE = 214, ///< Uncorrectable ECC error detected
457
CUDA_ERROR_UNSUPPORTED_LIMIT = 215, ///< CUlimit not supported by device
458
459
CUDA_ERROR_INVALID_SOURCE = 300, ///< Invalid source
460
CUDA_ERROR_FILE_NOT_FOUND = 301, ///< File not found
461
CUDA_ERROR_SHARED_OBJECT_SYMBOL_NOT_FOUND = 302, ///< Link to a shared object failed to resolve
462
CUDA_ERROR_SHARED_OBJECT_INIT_FAILED = 303, ///< Shared object initialization failed
463
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CUDA_ERROR_INVALID_HANDLE = 400, ///< Invalid handle
465
466
CUDA_ERROR_NOT_FOUND = 500, ///< Not found
467
468
CUDA_ERROR_NOT_READY = 600, ///< CUDA not ready
469
470
CUDA_ERROR_LAUNCH_FAILED = 700, ///< Launch failed
471
CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES = 701, ///< Launch exceeded resources
472
CUDA_ERROR_LAUNCH_TIMEOUT = 702, ///< Launch exceeded timeout
473
CUDA_ERROR_LAUNCH_INCOMPATIBLE_TEXTURING = 703, ///< Launch with incompatible texturing
474
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CUDA_ERROR_POINTER_IS_64BIT = 800, ///< Attempted to retrieve 64-bit pointer via 32-bit API function
476
CUDA_ERROR_SIZE_IS_64BIT = 801, ///< Attempted to retrieve 64-bit size via 32-bit API function
477
478
CUDA_ERROR_UNKNOWN = 999 ///< Unknown error
479
} CUresult;
480
481
/**
482
* If set, host memory is portable between CUDA contexts.
483
* Flag for ::cuMemHostAlloc()
484
*/
485
#define CU_MEMHOSTALLOC_PORTABLE 0x01
486
487
/**
488
* If set, host memory is mapped into CUDA address space and
489
* ::cuMemHostGetDevicePointer() may be called on the host pointer.
490
* Flag for ::cuMemHostAlloc()
491
*/
492
#define CU_MEMHOSTALLOC_DEVICEMAP 0x02
493
494
/**
495
* If set, host memory is allocated as write-combined - fast to write,
496
* faster to DMA, slow to read except via SSE4 streaming load instruction
497
* (MOVNTDQA).
498
* Flag for ::cuMemHostAlloc()
499
*/
500
#define CU_MEMHOSTALLOC_WRITECOMBINED 0x04
501
502
/**
503
* 2D memory copy parameters
504
*/
505
typedef struct CUDA_MEMCPY2D_st {
506
507
unsigned int srcXInBytes, ///< Source X in bytes
508
srcY; ///< Source Y
509
CUmemorytype srcMemoryType; ///< Source memory type (host, device, array)
510
const void *srcHost; ///< Source host pointer
511
CUdeviceptr srcDevice; ///< Source device pointer
512
CUarray srcArray; ///< Source array reference
513
unsigned int srcPitch; ///< Source pitch (ignored when src is array)
514
515
unsigned int dstXInBytes, ///< Destination X in bytes
516
dstY; ///< Destination Y
517
CUmemorytype dstMemoryType; ///< Destination memory type (host, device, array)
518
void *dstHost; ///< Destination host pointer
519
CUdeviceptr dstDevice; ///< Destination device pointer
520
CUarray dstArray; ///< Destination array reference
521
unsigned int dstPitch; ///< Destination pitch (ignored when dst is array)
522
523
unsigned int WidthInBytes; ///< Width of 2D memory copy in bytes
524
unsigned int Height; ///< Height of 2D memory copy
525
} CUDA_MEMCPY2D;
526
527
/**
528
* 3D memory copy parameters
529
*/
530
typedef struct CUDA_MEMCPY3D_st {
531
532
unsigned int srcXInBytes, ///< Source X in bytes
533
srcY, ///< Source Y
534
srcZ; ///< Source Z
535
unsigned int srcLOD; ///< Source LOD
536
CUmemorytype srcMemoryType; ///< Source memory type (host, device, array)
537
const void *srcHost; ///< Source host pointer
538
CUdeviceptr srcDevice; ///< Source device pointer
539
CUarray srcArray; ///< Source array reference
540
void *reserved0; ///< Must be NULL
541
unsigned int srcPitch; ///< Source pitch (ignored when src is array)
542
unsigned int srcHeight; ///< Source height (ignored when src is array; may be 0 if Depth==1)
543
544
unsigned int dstXInBytes, ///< Destination X in bytes
545
dstY, ///< Destination Y
546
dstZ; ///< Destination Z
547
unsigned int dstLOD; ///< Destination LOD
548
CUmemorytype dstMemoryType; ///< Destination memory type (host, device, array)
549
void *dstHost; ///< Destination host pointer
550
CUdeviceptr dstDevice; ///< Destination device pointer
551
CUarray dstArray; ///< Destination array reference
552
void *reserved1; ///< Must be NULL
553
unsigned int dstPitch; ///< Destination pitch (ignored when dst is array)
554
unsigned int dstHeight; ///< Destination height (ignored when dst is array; may be 0 if Depth==1)
555
556
unsigned int WidthInBytes; ///< Width of 3D memory copy in bytes
557
unsigned int Height; ///< Height of 3D memory copy
558
unsigned int Depth; ///< Depth of 3D memory copy
559
} CUDA_MEMCPY3D;
560
561
/**
562
* Array descriptor
563
*/
564
typedef struct
565
{
566
unsigned int Width; ///< Width of array
567
unsigned int Height; ///< Height of array
568
569
CUarray_format Format; ///< Array format
570
571
unsigned int NumChannels; ///< Channels per array element
572
} CUDA_ARRAY_DESCRIPTOR;
573
574
/**
575
* 3D array descriptor
576
*/
577
typedef struct
578
{
579
unsigned int Width; ///< Width of 3D array
580
unsigned int Height; ///< Height of 3D array
581
unsigned int Depth; ///< Depth of 3D array
582
583
CUarray_format Format; ///< Array format
584
585
unsigned int NumChannels; ///< Channels per array element
586
587
unsigned int Flags; ///< Flags
588
} CUDA_ARRAY3D_DESCRIPTOR;
589
590
// if set, the CUDA array contains an array of 2D slices
591
// and the Depth member of CUDA_ARRAY3D_DESCRIPTOR specifies
592
// the number of slices, not the depth of a 3D array.
593
#define CUDA_ARRAY3D_2DARRAY 0x01
594
595
// this flag must be set in order to bind a surface reference
596
// to the CUDA array
597
#define CUDA_ARRAY3D_SURFACE_LDST 0x02
598
599
/**
600
* Override the texref format with a format inferred from the array.
601
* Flag for ::cuTexRefSetArray()
602
*/
603
#define CU_TRSA_OVERRIDE_FORMAT 0x01
604
605
/**
606
* Read the texture as integers rather than promoting the values to floats
607
* in the range [0,1].
608
* Flag for ::cuTexRefSetFlags()
609
*/
610
#define CU_TRSF_READ_AS_INTEGER 0x01
611
612
/**
613
* Use normalized texture coordinates in the range [0,1) instead of [0,dim).
614
* Flag for ::cuTexRefSetFlags()
615
*/
616
#define CU_TRSF_NORMALIZED_COORDINATES 0x02
617
618
/**
619
* For texture references loaded into the module, use default texunit from
620
* texture reference.
621
*/
622
#define CU_PARAM_TR_DEFAULT -1
623
624
/** @} */
625
/** @} */ /* END CUDA_TYPES */
626
627
#ifdef _WIN32
628
#define CUDAAPI __stdcall
629
#else
630
#define CUDAAPI
631
#endif
632
633
/*********************************
634
** Initialization
635
*********************************/
636
CUresult CUDAAPI cuInit(unsigned int Flags);
637
638
/*********************************
639
** Driver Version Query
640
*********************************/
641
CUresult CUDAAPI cuDriverGetVersion(int *driverVersion);
642
643
/************************************
644
**
645
** Device management
646
**
647
***********************************/
648
649
CUresult CUDAAPI cuDeviceGet(CUdevice *device, int ordinal);
650
CUresult CUDAAPI cuDeviceGetCount(int *count);
651
CUresult CUDAAPI cuDeviceGetName(char *name, int len, CUdevice dev);
652
CUresult CUDAAPI cuDeviceComputeCapability(int *major, int *minor, CUdevice dev);
653
CUresult CUDAAPI cuDeviceTotalMem(unsigned int *bytes, CUdevice dev);
654
CUresult CUDAAPI cuDeviceGetProperties(CUdevprop *prop, CUdevice dev);
655
CUresult CUDAAPI cuDeviceGetAttribute(int *pi, CUdevice_attribute attrib, CUdevice dev);
656
657
/************************************
658
**
659
** Context management
660
**
661
***********************************/
662
663
CUresult CUDAAPI cuCtxCreate(CUcontext *pctx, unsigned int flags, CUdevice dev );
664
CUresult CUDAAPI cuCtxDestroy( CUcontext ctx );
665
CUresult CUDAAPI cuCtxAttach(CUcontext *pctx, unsigned int flags);
666
CUresult CUDAAPI cuCtxDetach(CUcontext ctx);
667
CUresult CUDAAPI cuCtxPushCurrent( CUcontext ctx );
668
CUresult CUDAAPI cuCtxPopCurrent( CUcontext *pctx );
669
CUresult CUDAAPI cuCtxGetDevice(CUdevice *device);
670
CUresult CUDAAPI cuCtxSynchronize(void);
671
672
673
/************************************
674
**
675
** Module management
676
**
677
***********************************/
678
679
CUresult CUDAAPI cuModuleLoad(CUmodule *module, const char *fname);
680
CUresult CUDAAPI cuModuleLoadData(CUmodule *module, const void *image);
681
CUresult CUDAAPI cuModuleLoadDataEx(CUmodule *module, const void *image, unsigned int numOptions, CUjit_option *options, void **optionValues);
682
CUresult CUDAAPI cuModuleLoadFatBinary(CUmodule *module, const void *fatCubin);
683
CUresult CUDAAPI cuModuleUnload(CUmodule hmod);
684
CUresult CUDAAPI cuModuleGetFunction(CUfunction *hfunc, CUmodule hmod, const char *name);
685
CUresult CUDAAPI cuModuleGetGlobal(CUdeviceptr *dptr, unsigned int *bytes, CUmodule hmod, const char *name);
686
CUresult CUDAAPI cuModuleGetTexRef(CUtexref *pTexRef, CUmodule hmod, const char *name);
687
CUresult CUDAAPI cuModuleGetSurfRef(CUsurfref *pSurfRef, CUmodule hmod, const char *name);
688
689
/************************************
690
**
691
** Memory management
692
**
693
***********************************/
694
695
CUresult CUDAAPI cuMemGetInfo(unsigned int *free, unsigned int *total);
696
697
CUresult CUDAAPI cuMemAlloc( CUdeviceptr *dptr, unsigned int bytesize);
698
CUresult CUDAAPI cuMemAllocPitch( CUdeviceptr *dptr,
699
unsigned int *pPitch,
700
unsigned int WidthInBytes,
701
unsigned int Height,
702
// size of biggest r/w to be performed by kernels on this memory
703
// 4, 8 or 16 bytes
704
unsigned int ElementSizeBytes
705
);
706
CUresult CUDAAPI cuMemFree(CUdeviceptr dptr);
707
CUresult CUDAAPI cuMemGetAddressRange( CUdeviceptr *pbase, unsigned int *psize, CUdeviceptr dptr );
708
709
CUresult CUDAAPI cuMemAllocHost(void **pp, unsigned int bytesize);
710
CUresult CUDAAPI cuMemFreeHost(void *p);
711
712
CUresult CUDAAPI cuMemHostAlloc(void **pp, size_t bytesize, unsigned int Flags );
713
714
CUresult CUDAAPI cuMemHostGetDevicePointer( CUdeviceptr *pdptr, void *p, unsigned int Flags );
715
CUresult CUDAAPI cuMemHostGetFlags( unsigned int *pFlags, void *p );
716
717
/************************************
718
**
719
** Synchronous Memcpy
720
**
721
** Intra-device memcpy's done with these functions may execute in parallel with the CPU,
722
** but if host memory is involved, they wait until the copy is done before returning.
723
**
724
***********************************/
725
726
// 1D functions
727
// system <-> device memory
728
CUresult CUDAAPI cuMemcpyHtoD (CUdeviceptr dstDevice, const void *srcHost, unsigned int ByteCount );
729
CUresult CUDAAPI cuMemcpyDtoH (void *dstHost, CUdeviceptr srcDevice, unsigned int ByteCount );
730
731
// device <-> device memory
732
CUresult CUDAAPI cuMemcpyDtoD (CUdeviceptr dstDevice, CUdeviceptr srcDevice, unsigned int ByteCount );
733
734
// device <-> array memory
735
CUresult CUDAAPI cuMemcpyDtoA ( CUarray dstArray, unsigned int dstOffset, CUdeviceptr srcDevice, unsigned int ByteCount );
736
CUresult CUDAAPI cuMemcpyAtoD ( CUdeviceptr dstDevice, CUarray srcArray, unsigned int srcOffset, unsigned int ByteCount );
737
738
// system <-> array memory
739
CUresult CUDAAPI cuMemcpyHtoA( CUarray dstArray, unsigned int dstOffset, const void *srcHost, unsigned int ByteCount );
740
CUresult CUDAAPI cuMemcpyAtoH( void *dstHost, CUarray srcArray, unsigned int srcOffset, unsigned int ByteCount );
741
742
// array <-> array memory
743
CUresult CUDAAPI cuMemcpyAtoA( CUarray dstArray, unsigned int dstOffset, CUarray srcArray, unsigned int srcOffset, unsigned int ByteCount );
744
745
// 2D memcpy
746
747
CUresult CUDAAPI cuMemcpy2D( const CUDA_MEMCPY2D *pCopy );
748
CUresult CUDAAPI cuMemcpy2DUnaligned( const CUDA_MEMCPY2D *pCopy );
749
750
// 3D memcpy
751
752
CUresult CUDAAPI cuMemcpy3D( const CUDA_MEMCPY3D *pCopy );
753
754
/************************************
755
**
756
** Asynchronous Memcpy
757
**
758
** Any host memory involved must be DMA'able (e.g., allocated with cuMemAllocHost).
759
** memcpy's done with these functions execute in parallel with the CPU and, if
760
** the hardware is available, may execute in parallel with the GPU.
761
** Asynchronous memcpy must be accompanied by appropriate stream synchronization.
762
**
763
***********************************/
764
765
// 1D functions
766
// system <-> device memory
767
CUresult CUDAAPI cuMemcpyHtoDAsync (CUdeviceptr dstDevice,
768
const void *srcHost, unsigned int ByteCount, CUstream hStream );
769
CUresult CUDAAPI cuMemcpyDtoHAsync (void *dstHost,
770
CUdeviceptr srcDevice, unsigned int ByteCount, CUstream hStream );
771
772
// device <-> device memory
773
CUresult CUDAAPI cuMemcpyDtoDAsync (CUdeviceptr dstDevice,
774
CUdeviceptr srcDevice, unsigned int ByteCount, CUstream hStream );
775
776
// system <-> array memory
777
CUresult CUDAAPI cuMemcpyHtoAAsync( CUarray dstArray, unsigned int dstOffset,
778
const void *srcHost, unsigned int ByteCount, CUstream hStream );
779
CUresult CUDAAPI cuMemcpyAtoHAsync( void *dstHost, CUarray srcArray, unsigned int srcOffset,
780
unsigned int ByteCount, CUstream hStream );
781
782
// 2D memcpy
783
CUresult CUDAAPI cuMemcpy2DAsync( const CUDA_MEMCPY2D *pCopy, CUstream hStream );
784
785
// 3D memcpy
786
CUresult CUDAAPI cuMemcpy3DAsync( const CUDA_MEMCPY3D *pCopy, CUstream hStream );
787
788
/************************************
789
**
790
** Memset
791
**
792
***********************************/
793
CUresult CUDAAPI cuMemsetD8( CUdeviceptr dstDevice, unsigned char uc, unsigned int N );
794
CUresult CUDAAPI cuMemsetD16( CUdeviceptr dstDevice, unsigned short us, unsigned int N );
795
CUresult CUDAAPI cuMemsetD32( CUdeviceptr dstDevice, unsigned int ui, unsigned int N );
796
797
CUresult CUDAAPI cuMemsetD2D8( CUdeviceptr dstDevice, unsigned int dstPitch, unsigned char uc, unsigned int Width, unsigned int Height );
798
CUresult CUDAAPI cuMemsetD2D16( CUdeviceptr dstDevice, unsigned int dstPitch, unsigned short us, unsigned int Width, unsigned int Height );
799
CUresult CUDAAPI cuMemsetD2D32( CUdeviceptr dstDevice, unsigned int dstPitch, unsigned int ui, unsigned int Width, unsigned int Height );
800
801
/************************************
802
**
803
** Function management
804
**
805
***********************************/
806
807
808
CUresult CUDAAPI cuFuncSetBlockShape (CUfunction hfunc, int x, int y, int z);
809
CUresult CUDAAPI cuFuncSetSharedSize (CUfunction hfunc, unsigned int bytes);
810
CUresult CUDAAPI cuFuncGetAttribute (int *pi, CUfunction_attribute attrib, CUfunction hfunc);
811
CUresult CUDAAPI cuFuncSetCacheConfig(CUfunction hfunc, CUfunc_cache config);
812
813
/************************************
814
**
815
** Array management
816
**
817
***********************************/
818
819
CUresult CUDAAPI cuArrayCreate( CUarray *pHandle, const CUDA_ARRAY_DESCRIPTOR *pAllocateArray );
820
CUresult CUDAAPI cuArrayGetDescriptor( CUDA_ARRAY_DESCRIPTOR *pArrayDescriptor, CUarray hArray );
821
CUresult CUDAAPI cuArrayDestroy( CUarray hArray );
822
823
CUresult CUDAAPI cuArray3DCreate( CUarray *pHandle, const CUDA_ARRAY3D_DESCRIPTOR *pAllocateArray );
824
CUresult CUDAAPI cuArray3DGetDescriptor( CUDA_ARRAY3D_DESCRIPTOR *pArrayDescriptor, CUarray hArray );
825
826
827
/************************************
828
**
829
** Texture reference management
830
**
831
***********************************/
832
CUresult CUDAAPI cuTexRefCreate( CUtexref *pTexRef );
833
CUresult CUDAAPI cuTexRefDestroy( CUtexref hTexRef );
834
835
CUresult CUDAAPI cuTexRefSetArray( CUtexref hTexRef, CUarray hArray, unsigned int Flags );
836
CUresult CUDAAPI cuTexRefSetAddress( unsigned int *ByteOffset, CUtexref hTexRef, CUdeviceptr dptr, unsigned int bytes );
837
CUresult CUDAAPI cuTexRefSetAddress2D( CUtexref hTexRef, const CUDA_ARRAY_DESCRIPTOR *desc, CUdeviceptr dptr, unsigned int Pitch);
838
CUresult CUDAAPI cuTexRefSetFormat( CUtexref hTexRef, CUarray_format fmt, int NumPackedComponents );
839
CUresult CUDAAPI cuTexRefSetAddressMode( CUtexref hTexRef, int dim, CUaddress_mode am );
840
CUresult CUDAAPI cuTexRefSetFilterMode( CUtexref hTexRef, CUfilter_mode fm );
841
CUresult CUDAAPI cuTexRefSetFlags( CUtexref hTexRef, unsigned int Flags );
842
843
CUresult CUDAAPI cuTexRefGetAddress( CUdeviceptr *pdptr, CUtexref hTexRef );
844
CUresult CUDAAPI cuTexRefGetArray( CUarray *phArray, CUtexref hTexRef );
845
CUresult CUDAAPI cuTexRefGetAddressMode( CUaddress_mode *pam, CUtexref hTexRef, int dim );
846
CUresult CUDAAPI cuTexRefGetFilterMode( CUfilter_mode *pfm, CUtexref hTexRef );
847
CUresult CUDAAPI cuTexRefGetFormat( CUarray_format *pFormat, int *pNumChannels, CUtexref hTexRef );
848
CUresult CUDAAPI cuTexRefGetFlags( unsigned int *pFlags, CUtexref hTexRef );
849
850
/************************************
851
**
852
** Surface reference management
853
**
854
***********************************/
855
856
CUresult CUDAAPI cuSurfRefSetArray( CUsurfref hSurfRef, CUarray hArray, unsigned int Flags );
857
CUresult CUDAAPI cuSurfRefGetArray( CUarray *phArray, CUsurfref hSurfRef );
858
859
/************************************
860
**
861
** Parameter management
862
**
863
***********************************/
864
865
CUresult CUDAAPI cuParamSetSize (CUfunction hfunc, unsigned int numbytes);
866
CUresult CUDAAPI cuParamSeti (CUfunction hfunc, int offset, unsigned int value);
867
CUresult CUDAAPI cuParamSetf (CUfunction hfunc, int offset, float value);
868
CUresult CUDAAPI cuParamSetv (CUfunction hfunc, int offset, void *ptr, unsigned int numbytes);
869
CUresult CUDAAPI cuParamSetTexRef(CUfunction hfunc, int texunit, CUtexref hTexRef);
870
871
872
/************************************
873
**
874
** Launch functions
875
**
876
***********************************/
877
878
CUresult CUDAAPI cuLaunch ( CUfunction f );
879
CUresult CUDAAPI cuLaunchGrid (CUfunction f, int grid_width, int grid_height);
880
CUresult CUDAAPI cuLaunchGridAsync( CUfunction f, int grid_width, int grid_height, CUstream hStream );
881
882
/************************************
883
**
884
** Events
885
**
886
***********************************/
887
CUresult CUDAAPI cuEventCreate( CUevent *phEvent, unsigned int Flags );
888
CUresult CUDAAPI cuEventRecord( CUevent hEvent, CUstream hStream );
889
CUresult CUDAAPI cuEventQuery( CUevent hEvent );
890
CUresult CUDAAPI cuEventSynchronize( CUevent hEvent );
891
CUresult CUDAAPI cuEventDestroy( CUevent hEvent );
892
CUresult CUDAAPI cuEventElapsedTime( float *pMilliseconds, CUevent hStart, CUevent hEnd );
893
894
/************************************
895
**
896
** Streams
897
**
898
***********************************/
899
CUresult CUDAAPI cuStreamCreate( CUstream *phStream, unsigned int Flags );
900
CUresult CUDAAPI cuStreamQuery( CUstream hStream );
901
CUresult CUDAAPI cuStreamSynchronize( CUstream hStream );
902
CUresult CUDAAPI cuStreamDestroy( CUstream hStream );
903
904
/************************************
905
**
906
** Graphics interop
907
**
908
***********************************/
909
CUresult CUDAAPI cuGraphicsUnregisterResource(CUgraphicsResource resource);
910
CUresult CUDAAPI cuGraphicsSubResourceGetMappedArray( CUarray *pArray, CUgraphicsResource resource, unsigned int arrayIndex, unsigned int mipLevel );
911
CUresult CUDAAPI cuGraphicsResourceGetMappedPointer( CUdeviceptr *pDevPtr, unsigned int *pSize, CUgraphicsResource resource );
912
CUresult CUDAAPI cuGraphicsResourceSetMapFlags( CUgraphicsResource resource, unsigned int flags );
913
CUresult CUDAAPI cuGraphicsMapResources( unsigned int count, CUgraphicsResource *resources, CUstream hStream );
914
CUresult CUDAAPI cuGraphicsUnmapResources( unsigned int count, CUgraphicsResource *resources, CUstream hStream );
915
916
/************************************
917
**
918
** Export tables
919
**
920
***********************************/
921
CUresult CUDAAPI cuGetExportTable( const void **ppExportTable, const CUuuid *pExportTableId );
922
923
/************************************
924
**
925
** Limits
926
**
927
***********************************/
928
929
CUresult CUDAAPI cuCtxSetLimit(CUlimit limit, size_t value);
930
CUresult CUDAAPI cuCtxGetLimit(size_t *pvalue, CUlimit limit);
931
932
#ifdef __cplusplus
933
}
934
#endif
935
936
#endif /* __cuda_cuda_h__ */
937
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