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  • Committer: Serge Hallyn
  • Date: 2011-10-19 07:37:43 UTC
  • mfrom: (1.2.7)
  • Revision ID: serge.hallyn@ubuntu.com-20111019073743-7i7n9irsxlm38wic
Tags: 0.15.0+noroms-0ubuntu1
https://launchpad.net/bugs/878162
* New upstream release
* Remaining changes from upstream:
  - removed all binary roms and tests/pi_10.com
* Removed Detect-and-use-GCC-atomic-builtins-for-locking.patch - non-NPTL
  implementations were removed with commit
  02615337ef295443daa03233e492194e289a807e
* Drop spice-qxl-locking-fix-for-qemu-kvm.patch - should be unnecessary
  as of commit 196a778428989217b82de042725dc8eb29c8f8d8
* drop patches applied upstream:
  - CVE-2011-1751.diff
  - virtio-guard-against-negative-vq-notifies-CVE-2011-2512.diff
  - CVE-2011-2527.patch
  - fix-pa-configure.patch
* Refreshed the remaining patches:
  - larger_default_ram_size.patch
  - CVE-2011-2212-virtqueue-indirect-overflow.patch
  - qemuifup-fix-paths.patch
  - vpc.patch
* e1000-Dont-set-the-Capabilities-List-bit.patch - switched to the
  cherrypicked upstream patch (as the source file changed quite a bit,
  and the hand-ported patch backported to 0.14.1 does not apply).
* Drop qemu-kvm-spice (all changes from 0.14.1+noroms-0ubuntu7), it will
  need its own source package (LP: #878162)

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Lines of Context:
hw/ioapic.c
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#include "hw.h"
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#include "pc.h"
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#include "apic.h"
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#include "sysemu.h"
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#include "apic.h"
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#include "ioapic.h"
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#include "qemu-timer.h"
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#include "host-utils.h"
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#define DPRINTF(fmt, ...)
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#endif
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#define IOAPIC_DEFAULT_BASE_ADDRESS  0xfec00000
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#define MAX_IOAPICS                     1
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#define IOAPIC_VERSION                  0x11
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    SysBusDevice busdev;
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    uint8_t id;
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    uint8_t ioregsel;
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    uint64_t base_address;
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    uint32_t irr;
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    uint64_t ioredtbl[IOAPIC_NUM_PINS];
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};
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     * the cleanest way of doing it but it should work. */
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    DPRINTF("%s: %s vec %x\n", __func__, level ? "raise" : "lower", vector);
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    if (vector == 0 && irq0override) {
 
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    if (vector == 0) {
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        vector = 2;
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    }
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    if (vector >= 0 && vector < IOAPIC_NUM_PINS) {
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                s->irr &= ~mask;
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            }
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        } else {
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            /* edge triggered */
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            if (level) {
 
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            /* According to the 82093AA manual, we must ignore edge requests
 
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             * if the input pin is masked. */
 
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            if (level && !(entry & IOAPIC_LVT_MASKED)) {
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                s->irr |= mask;
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                ioapic_service(s);
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            }
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    int i;
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    chip.chip_id = KVM_IRQCHIP_IOAPIC;
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    kvm_get_irqchip(kvm_context, &chip);
 
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    kvm_get_irqchip(kvm_state, &chip);
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    kioapic = &chip.chip.ioapic;
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    s->id = kioapic->id;
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    s->ioregsel = kioapic->ioregsel;
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    s->base_address = kioapic->base_address;
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    s->irr = kioapic->irr;
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    for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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        s->ioredtbl[i] = kioapic->redirtbl[i].bits;
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    kioapic->id = s->id;
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    kioapic->ioregsel = s->ioregsel;
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    kioapic->base_address = s->base_address;
 
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    kioapic->base_address = s->busdev.mmio[0].addr;
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    kioapic->irr = s->irr;
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    for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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        kioapic->redirtbl[i].bits = s->ioredtbl[i];
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    }
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    kvm_set_irqchip(kvm_context, &chip);
 
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    kvm_set_irqchip(kvm_state, &chip);
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#endif
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}
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static void ioapic_pre_save(void *opaque)
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{
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    IOAPICState *s = (void *)opaque;
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    if (kvm_enabled() && kvm_irqchip_in_kernel()) {
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        kvm_kernel_ioapic_save_to_user(s);
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    }
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}
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static int ioapic_pre_load(void *opaque)
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{
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    IOAPICState *s = opaque;
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    /* in case we are doing version 1, we just set these to sane values */
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    s->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
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    s->irr = 0;
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    return 0;
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}
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static int ioapic_post_load(void *opaque, int version_id)
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{
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    IOAPICState *s = opaque;
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static const VMStateDescription vmstate_ioapic = {
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    .name = "ioapic",
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    .version_id = 3,
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    .post_load = ioapic_post_load,
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    .minimum_version_id = 1,
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    .minimum_version_id_old = 1,
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    .pre_load = ioapic_pre_load,
 
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    .post_load = ioapic_post_load,
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    .pre_save = ioapic_pre_save,
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    .fields = (VMStateField[]) {
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        VMSTATE_UINT8(id, IOAPICState),
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        VMSTATE_UINT8(ioregsel, IOAPICState),
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        VMSTATE_UINT64_V(base_address, IOAPICState, 2),
 
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        VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */
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        VMSTATE_UINT32_V(irr, IOAPICState, 2),
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        VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS),
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        VMSTATE_END_OF_LIST()
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    IOAPICState *s = DO_UPCAST(IOAPICState, busdev.qdev, d);
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    int i;
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    s->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
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    s->id = 0;
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    s->ioregsel = 0;
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    s->irr = 0;