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/* Test of _SFR's macroses. Old style ASM program, where the ports are
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values, suitable to use with LDS/STS instruction.
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$Id: sfrasm-2.S,v 1.1.2.2 2008/05/02 08:47:38 dmix Exp $ */
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/* XXX: Seems, the _SFR_MEM_ADDR() is worse. In this case it works only
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with ports, which have the address higher then SREG. There is no
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method to obtain the address suitable for LDS/STS instruction. Now
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this test cases are commented. Second, the _SFR_ADDR() is not defined.
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This is mismatch to C behavior (_SFR_ASM_COMPAT, __SFR_OFFSET = 0). */
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#define __SFR_OFFSET 0
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#if defined (__AVR_AT90S8515__)
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/*|| _SFR_ADDR (SREG) != 0x5F*/ \
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/*|| _SFR_MEM_ADDR (SREG) != 0x5F*/ \
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|| _SFR_IO_ADDR (SREG) != 0x3F \
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|| !_SFR_IO_REG_P (SREG)
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/*|| _SFR_ADDR (WDTCR) != 0x41*/ \
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/*|| _SFR_MEM_ADDR (WDTCR) != 0x41*/ \
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|| _SFR_IO_ADDR (WDTCR) != 0x21 \
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|| !_SFR_IO_REG_P (WDTCR)
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/*|| _SFR_ADDR (EEARH) != 0x3F*/ \
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/*|| _SFR_MEM_ADDR (EEARH) != 0x3F*/ \
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|| _SFR_IO_ADDR (EEARH) != 0x1F \
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|| !_SFR_IO_REG_P (EEARH)
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/*|| _SFR_ADDR (ACSR) != 0x28*/ \
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/*|| _SFR_MEM_ADDR (ACSR) != 0x28*/ \
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|| _SFR_IO_ADDR (ACSR) != 0x08 \
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|| !_SFR_IO_REG_P (ACSR)
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#elif defined (__AVR_ATmega8__)
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/*|| _SFR_ADDR (SREG) != 0x5F*/ \
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/*|| _SFR_MEM_ADDR (SREG) != 0x5F*/ \
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|| _SFR_IO_ADDR (SREG) != 0x3F \
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|| !_SFR_IO_REG_P (SREG)
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/*|| _SFR_ADDR (UCSRC) != 0x40*/ \
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/*|| _SFR_MEM_ADDR (UCSRC) != 0x40*/ \
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|| _SFR_IO_ADDR (UCSRC) != 0x20 \
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|| !_SFR_IO_REG_P (UCSRC)
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/*|| _SFR_ADDR (EEARH) != 0x3F*/ \
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/*|| _SFR_MEM_ADDR (EEARH) != 0x3F*/ \
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|| _SFR_IO_ADDR (EEARH) != 0x1F \
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|| !_SFR_IO_REG_P (EEARH)
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/*|| _SFR_ADDR (TWBR) != 0x20*/ \
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/*|| _SFR_MEM_ADDR (TWBR) != 0x20*/ \
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|| _SFR_IO_ADDR (TWBR) != 0x00 \
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|| !_SFR_IO_REG_P (TWBR)
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#elif defined (__AVR_ATmega128__)
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/*|| _SFR_ADDR (UCSR1C) != 0x9D*/ \
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|| _SFR_MEM_ADDR (UCSR1C) != 0x9D \
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|| _SFR_IO_REG_P (UCSR1C)
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/*|| _SFR_ADDR (DDRF) != 0x61*/ \
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|| _SFR_MEM_ADDR (DDRF) != 0x61 \
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|| _SFR_IO_REG_P (DDRF)
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/*|| _SFR_ADDR (SREG) != 0x5F*/ \
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/*|| _SFR_MEM_ADDR (SREG) != 0x5F*/ \
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|| _SFR_IO_ADDR (SREG) != 0x3F \
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|| !_SFR_IO_REG_P (SREG)
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/*|| _SFR_ADDR (SFIOR) != 0x40*/ \
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/*|| _SFR_MEM_ADDR (SFIOR) != 0x40*/ \
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|| _SFR_IO_ADDR (SFIOR) != 0x20 \
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|| !_SFR_IO_REG_P (SFIOR)
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/*|| _SFR_ADDR (EEARH) != 0x3F*/ \
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/*|| _SFR_MEM_ADDR (EEARH) != 0x3F*/ \
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|| _SFR_IO_ADDR (EEARH) != 0x1F \
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|| !_SFR_IO_REG_P (EEARH)
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/*|| _SFR_ADDR (PINF) != 0x20*/ \
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/*|| _SFR_MEM_ADDR (PINF) != 0x20*/ \
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|| _SFR_IO_ADDR (PINF) != 0x00 \
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|| !_SFR_IO_REG_P (PINF)
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ldi r24, lo8 (\result)
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ldi r25, hi8 (\result)
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;;; lds r16, _SFR_ADDR (SREG)
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;;; lds r16, _SFR_ADDR (SREG)
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;;; lds r16, _SFR_MEM_ADDR (SREG)
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;;; lds r16, _SFR_MEM_ADDR (SREG)
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in r16, _SFR_IO_ADDR (SREG)
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in r16, _SFR_IO_ADDR (SREG)