1
diff -urN gdb-orig/gdb/gdbserver/spu-low.c gdb-6.6/gdb/gdbserver/spu-low.c
2
--- gdb-orig/gdb/gdbserver/spu-low.c 2006-11-24 21:11:07.000000000 +0100
3
+++ gdb-6.6/gdb/gdbserver/spu-low.c 2006-12-13 21:28:22.028598120 +0100
5
&& lseek (fd, (off_t) offset, SEEK_SET) != (off_t) offset)
13
diff -urN gdb-orig/gdb/mi/mi-cmds.c gdb-6.6/gdb/mi/mi-cmds.c
14
--- gdb-orig/gdb/mi/mi-cmds.c 2006-12-13 21:27:59.811514520 +0100
15
+++ gdb-6.6/gdb/mi/mi-cmds.c 2006-12-13 21:22:45.440497040 +0100
17
{ "var-show-attributes", { NULL, 0 }, 0, mi_cmd_var_show_attributes},
18
{ "var-show-format", { NULL, 0 }, 0, mi_cmd_var_show_format},
19
{ "var-update", { NULL, 0 }, 0, mi_cmd_var_update},
20
+ { "spu-info-event", { "info spu event", 0 }, NULL, NULL },
21
+ { "spu-info-signal", { "info spu signal", 0 }, NULL, NULL },
22
+ { "spu-info-mailbox", { "info spu mailbox", 0 }, NULL, NULL },
23
+ { "spu-info-dma", { "info spu dma", 0 }, NULL, NULL },
24
+ { "spu-info-proxydma", { "info spu proxydma", 0 }, NULL, NULL },
28
diff -urN gdb-orig/gdb/spu-linux-nat.c gdb-6.6/gdb/spu-linux-nat.c
29
--- gdb-orig/gdb/spu-linux-nat.c 2006-12-13 21:27:59.817513608 +0100
30
+++ gdb-6.6/gdb/spu-linux-nat.c 2006-12-13 21:23:47.047599488 +0100
32
&& lseek (fd, (off_t) offset, SEEK_SET) != (off_t) offset)
41
gdb_byte *readbuf, const gdb_byte *writebuf,
42
ULONGEST offset, LONGEST len)
44
+ if (object == TARGET_OBJECT_SPU)
45
+ return spu_proc_xfer_spu (annex, readbuf, writebuf, offset, len);
47
if (object == TARGET_OBJECT_MEMORY)
50
diff -urN gdb-orig/gdb/spu-tdep.c gdb-6.6/gdb/spu-tdep.c
51
--- gdb-orig/gdb/spu-tdep.c 2006-12-13 21:27:59.829511784 +0100
52
+++ gdb-6.6/gdb/spu-tdep.c 2006-12-13 21:25:50.340494304 +0100
54
/* Pointer to the next function on the objfile event chain. */
55
static void (*target_new_objfile_chain) (struct objfile *objfile);
57
+/* The list of available "info spu " commands. */
58
+static struct cmd_list_element *infospucmdlist = NULL;
64
"r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
65
"r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
66
"r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
68
+ "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
74
return builtin_type_void_data_ptr;
76
+ case SPU_FPSCR_REGNUM:
77
+ return builtin_type_uint128;
79
+ case SPU_SRR0_REGNUM:
80
+ return builtin_type_uint32;
82
+ case SPU_LSLR_REGNUM:
83
+ return builtin_type_uint32;
85
+ case SPU_DECR_REGNUM:
86
+ return builtin_type_uint32;
88
+ case SPU_DECR_STATUS_REGNUM:
89
+ return builtin_type_uint32;
92
internal_error (__FILE__, __LINE__, "invalid regnum");
95
/* Pseudo registers for preferred slots - stack pointer. */
98
+spu_pseudo_register_read_spu (struct regcache *regcache, const char *regname,
101
+ unsigned long long val;
105
+ xsnprintf (annex, sizeof annex,
106
+ "%d/%s", (int) read_register (SPU_ID_REGNUM), regname);
107
+ memset (reg, 0, sizeof reg);
108
+ target_read (¤t_target, TARGET_OBJECT_SPU, annex,
109
+ reg, 0, sizeof reg);
111
+ if (sscanf (reg, "0x%llx", &val) == 1)
112
+ store_unsigned_integer (buf, 4, (ULONGEST) val);
116
spu_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
117
int regnum, gdb_byte *buf)
124
@@ -122,16 +159,56 @@
125
memcpy (buf, reg, 4);
128
+ case SPU_FPSCR_REGNUM:
129
+ xsnprintf (annex, sizeof annex,
130
+ "%d/fpcr", (int) read_register (SPU_ID_REGNUM));
131
+ target_read (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 16);
134
+ case SPU_SRR0_REGNUM:
135
+ spu_pseudo_register_read_spu (regcache, "srr0", buf);
138
+ case SPU_LSLR_REGNUM:
139
+ spu_pseudo_register_read_spu (regcache, "lslr", buf);
142
+ case SPU_DECR_REGNUM:
143
+ spu_pseudo_register_read_spu (regcache, "decr", buf);
146
+ case SPU_DECR_STATUS_REGNUM:
147
+ spu_pseudo_register_read_spu (regcache, "decr_status", buf);
151
internal_error (__FILE__, __LINE__, _("invalid regnum"));
156
+spu_pseudo_register_write_spu (struct regcache *regcache, const char *regname,
157
+ const gdb_byte *buf)
159
+ unsigned long long val;
163
+ val = (unsigned long long) extract_unsigned_integer (buf, 4);
165
+ xsnprintf (annex, sizeof annex,
166
+ "%d/%s", (int) read_register (SPU_ID_REGNUM), regname);
167
+ xsnprintf (reg, sizeof reg, "0x%llx", val);
168
+ target_write (¤t_target, TARGET_OBJECT_SPU, annex,
169
+ reg, 0, strlen (reg));
173
spu_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
174
int regnum, const gdb_byte *buf)
182
regcache_raw_write (regcache, SPU_RAW_SP_REGNUM, reg);
185
+ case SPU_FPSCR_REGNUM:
186
+ xsnprintf (annex, sizeof annex,
187
+ "%d/fpcr", (int) read_register (SPU_ID_REGNUM));
188
+ target_write (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 16);
191
+ case SPU_SRR0_REGNUM:
192
+ spu_pseudo_register_write_spu (regcache, "srr0", buf);
195
+ case SPU_LSLR_REGNUM:
196
+ spu_pseudo_register_write_spu (regcache, "lslr", buf);
199
+ case SPU_DECR_REGNUM:
200
+ spu_pseudo_register_write_spu (regcache, "decr", buf);
203
+ case SPU_DECR_STATUS_REGNUM:
204
+ spu_pseudo_register_write_spu (regcache, "decr_status", buf);
208
internal_error (__FILE__, __LINE__, _("invalid regnum"));
210
@@ -1215,6 +1314,515 @@
214
+/* "info spu" commands. */
217
+info_spu_event_command (char *args, int from_tty)
219
+ int fd = read_register (SPU_ID_REGNUM);
220
+ unsigned long long event_status = 0;
221
+ unsigned long long event_mask = 0;
222
+ struct cleanup *chain;
228
+ if (!target_has_registers)
229
+ error (_("No registers."));
231
+ xsnprintf (annex, sizeof annex, "%d/event_status", fd);
232
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
233
+ buf, 0, sizeof buf);
235
+ error (_("Could not read event_status."));
236
+ rc = sscanf (buf, "0x%llx", &event_status);
238
+ error (_("Could not convert event_status."));
240
+ xsnprintf (annex, sizeof annex, "%d/event_mask", fd);
241
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
242
+ buf, 0, sizeof buf);
244
+ error (_("Could not read event_mask."));
245
+ rc = sscanf (buf, "0x%llx", &event_mask);
247
+ error (_("Could not convert event_mask."));
249
+ chain = make_cleanup_ui_out_tuple_begin_end (uiout, "SPUInfoEvent");
251
+ if (ui_out_is_mi_like_p (uiout))
253
+ ui_out_field_fmt (uiout, "event_status", "0x%llx", event_status);
254
+ ui_out_field_fmt (uiout, "event_mask", "0x%llx", event_mask);
258
+ printf_filtered (_("Event Status 0x%08llx\n"), event_status);
259
+ printf_filtered (_("Event Mask 0x%08llx\n"), event_mask);
262
+ do_cleanups (chain);
266
+info_spu_signal_command (char *args, int from_tty)
268
+ int fd = read_register (SPU_ID_REGNUM);
269
+ LONGEST signal1 = 0;
270
+ int signal1_pending = 0;
271
+ unsigned long long signal1_type = 0;
272
+ LONGEST signal2 = 0;
273
+ int signal2_pending = 0;
274
+ unsigned long long signal2_type = 0;
275
+ struct cleanup *chain;
281
+ if (!target_has_registers)
282
+ error (_("No registers."));
284
+ xsnprintf (annex, sizeof annex, "%d/signal1", fd);
285
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 4);
287
+ error (_("Could not read signal1."));
290
+ signal1 = extract_unsigned_integer (buf, 4);
291
+ signal1_pending = 1;
294
+ xsnprintf (annex, sizeof annex, "%d/signal1_type", fd);
295
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
296
+ buf, 0, sizeof buf);
298
+ error (_("Could not read signal1_type."));
299
+ rc = sscanf (buf, "%llu", &signal1_type);
301
+ error (_("Could not convert signal1_type."));
303
+ xsnprintf (annex, sizeof annex, "%d/signal2", fd);
304
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex, buf, 0, 4);
306
+ error (_("Could not read signal2."));
309
+ signal2 = extract_unsigned_integer (buf, 4);
310
+ signal2_pending = 1;
313
+ xsnprintf (annex, sizeof annex, "%d/signal2_type", fd);
314
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
315
+ buf, 0, sizeof buf);
317
+ error (_("Could not read signal2_type."));
318
+ rc = sscanf (buf, "%llu", &signal2_type);
320
+ error (_("Could not convert signal2_type."));
322
+ chain = make_cleanup_ui_out_tuple_begin_end (uiout, "SPUInfoSignal");
324
+ if (ui_out_is_mi_like_p (uiout))
326
+ ui_out_field_int (uiout, "signal1_pending", signal1_pending);
327
+ ui_out_field_fmt (uiout, "signal1", "0x%llx",
328
+ (unsigned long long) signal1);
329
+ ui_out_field_int (uiout, "signal1_type", signal1_type);
330
+ ui_out_field_int (uiout, "signal2_pending", signal2_pending);
331
+ ui_out_field_fmt (uiout, "signal2", "0x%llx",
332
+ (unsigned long long) signal2);
333
+ ui_out_field_int (uiout, "signal2_type", signal2_type);
337
+ if (signal1_pending)
338
+ printf_filtered (_("Signal 1 control word 0x%08llx (Type %s)\n"),
339
+ (unsigned long long) signal1,
340
+ signal1_type? "Overwrite" : "Or");
342
+ printf_filtered (_("Signal 1 not pending (Type %s)\n"),
343
+ signal1_type? "Overwrite" : "Or");
345
+ if (signal2_pending)
346
+ printf_filtered (_("Signal 2 control word 0x%08llx (Type %s)\n"),
347
+ (unsigned long long) signal2,
348
+ signal2_type? "Overwrite" : "Or");
350
+ printf_filtered (_("Signal 2 not pending (Type %s)\n"),
351
+ signal2_type? "Overwrite" : "Or");
354
+ do_cleanups (chain);
358
+info_spu_mailbox_list (gdb_byte *buf, int nr,
359
+ const char *field, const char *msg)
361
+ struct cleanup *chain;
367
+ chain = make_cleanup_ui_out_table_begin_end (uiout, 1, nr, "mbox");
369
+ ui_out_table_header (uiout, 32, ui_left, field, msg);
370
+ ui_out_table_body (uiout);
372
+ for (i = 0; i < nr; i++)
374
+ struct cleanup *val_chain;
375
+ unsigned long long val;
376
+ val_chain = make_cleanup_ui_out_tuple_begin_end (uiout, "mbox");
377
+ val = (unsigned long long) extract_unsigned_integer (buf + 4*i, 4);
378
+ ui_out_field_fmt (uiout, field, "0x%08llx", val);
379
+ do_cleanups (val_chain);
381
+ if (!ui_out_is_mi_like_p (uiout))
382
+ printf_filtered ("\n");
385
+ do_cleanups (chain);
389
+info_spu_mailbox_command (char *args, int from_tty)
391
+ int fd = read_register (SPU_ID_REGNUM);
392
+ struct cleanup *chain;
394
+ gdb_byte buf[1024];
398
+ if (!target_has_registers)
399
+ error (_("No registers."));
401
+ chain = make_cleanup_ui_out_tuple_begin_end (uiout, "SPUInfoMailbox");
403
+ xsnprintf (annex, sizeof annex, "%d/mbox_info", fd);
404
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
405
+ buf, 0, sizeof buf);
407
+ error (_("Could not read mbox_info."));
409
+ info_spu_mailbox_list (buf, len / 4, "mbox", "SPU Outbound Mailbox");
411
+ xsnprintf (annex, sizeof annex, "%d/ibox_info", fd);
412
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
413
+ buf, 0, sizeof buf);
415
+ error (_("Could not read ibox_info."));
417
+ info_spu_mailbox_list (buf, len / 4, "ibox", "SPU Outbound Interrupt Mailbox");
419
+ xsnprintf (annex, sizeof annex, "%d/wbox_info", fd);
420
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
421
+ buf, 0, sizeof buf);
423
+ error (_("Could not read wbox_info."));
425
+ info_spu_mailbox_list (buf, len / 4, "wbox", "SPU Inbound Mailbox");
427
+ do_cleanups (chain);
431
+spu_mfc_get_bitfield (ULONGEST word, int first, int last)
433
+ ULONGEST mask = ~(~(ULONGEST)0 << (last - first + 1));
434
+ return (word >> (63 - last)) & mask;
438
+info_spu_dma_cmdlist (gdb_byte *buf, int nr)
440
+ static char *spu_mfc_opcode[256] =
442
+ /* 00 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
443
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
444
+ /* 10 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
445
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
446
+ /* 20 */ "put", "putb", "putf", NULL, "putl", "putlb", "putlf", NULL,
447
+ "puts", "putbs", "putfs", NULL, NULL, NULL, NULL, NULL,
448
+ /* 30 */ "putr", "putrb", "putrf", NULL, "putrl", "putrlb", "putrlf", NULL,
449
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
450
+ /* 40 */ "get", "getb", "getf", NULL, "getl", "getlb", "getlf", NULL,
451
+ "gets", "getbs", "getfs", NULL, NULL, NULL, NULL, NULL,
452
+ /* 50 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
453
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
454
+ /* 60 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
455
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
456
+ /* 70 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
457
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
458
+ /* 80 */ "sdcrt", "sdcrtst", NULL, NULL, NULL, NULL, NULL, NULL,
459
+ NULL, "sdcrz", NULL, NULL, NULL, "sdcrst", NULL, "sdcrf",
460
+ /* 90 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
461
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
462
+ /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL, NULL, NULL, NULL, NULL,
463
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
464
+ /* b0 */ "putlluc", NULL, NULL, NULL, "putllc", NULL, NULL, NULL,
465
+ "putqlluc", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
466
+ /* c0 */ "barrier", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
467
+ "mfceieio", NULL, NULL, NULL, "mfcsync", NULL, NULL, NULL,
468
+ /* d0 */ "getllar", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
469
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
470
+ /* e0 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
471
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
472
+ /* f0 */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
473
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
476
+ struct cleanup *chain;
479
+ chain = make_cleanup_ui_out_table_begin_end (uiout, 10, nr, "dma_cmd");
481
+ ui_out_table_header (uiout, 7, ui_left, "opcode", "Opcode");
482
+ ui_out_table_header (uiout, 3, ui_left, "tag", "Tag");
483
+ ui_out_table_header (uiout, 3, ui_left, "tid", "TId");
484
+ ui_out_table_header (uiout, 3, ui_left, "rid", "RId");
485
+ ui_out_table_header (uiout, 18, ui_left, "ea", "EA");
486
+ ui_out_table_header (uiout, 7, ui_left, "lsa", "LSA");
487
+ ui_out_table_header (uiout, 7, ui_left, "size", "Size");
488
+ ui_out_table_header (uiout, 7, ui_left, "lstaddr", "LstAddr");
489
+ ui_out_table_header (uiout, 7, ui_left, "lstsize", "LstSize");
490
+ ui_out_table_header (uiout, 1, ui_left, "error_p", "E");
492
+ ui_out_table_body (uiout);
494
+ for (i = 0; i < nr; i++)
496
+ struct cleanup *cmd_chain;
497
+ unsigned long long mfc_cq_dw0;
498
+ unsigned long long mfc_cq_dw1;
499
+ unsigned long long mfc_cq_dw2;
500
+ unsigned long long mfc_cq_dw3;
501
+ int mfc_cmd_opcode, mfc_cmd_tag, rclass_id, tclass_id;
502
+ int lsa, size, list_lsa, list_size, mfc_lsa, mfc_size;
503
+ unsigned long long mfc_ea;
504
+ int list_valid_p, noop_valid_p, qw_valid_p, ea_valid_p, cmd_error_p;
506
+ /* Decode contents of MFC Command Queue Context Save/Restore Registers.
507
+ See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
510
+ = (unsigned long long) extract_unsigned_integer (buf + 32*i, 8);
512
+ = (unsigned long long) extract_unsigned_integer (buf + 32*i + 8, 8);
514
+ = (unsigned long long) extract_unsigned_integer (buf + 32*i + 16, 8);
516
+ = (unsigned long long) extract_unsigned_integer (buf + 32*i + 24, 8);
518
+ list_lsa = spu_mfc_get_bitfield (mfc_cq_dw0, 0, 14);
519
+ list_size = spu_mfc_get_bitfield (mfc_cq_dw0, 15, 26);
520
+ mfc_cmd_opcode = spu_mfc_get_bitfield (mfc_cq_dw0, 27, 34);
521
+ mfc_cmd_tag = spu_mfc_get_bitfield (mfc_cq_dw0, 35, 39);
522
+ list_valid_p = spu_mfc_get_bitfield (mfc_cq_dw0, 40, 40);
523
+ rclass_id = spu_mfc_get_bitfield (mfc_cq_dw0, 41, 43);
524
+ tclass_id = spu_mfc_get_bitfield (mfc_cq_dw0, 44, 46);
526
+ mfc_ea = spu_mfc_get_bitfield (mfc_cq_dw1, 0, 51) << 12
527
+ | spu_mfc_get_bitfield (mfc_cq_dw2, 25, 36);
529
+ mfc_lsa = spu_mfc_get_bitfield (mfc_cq_dw2, 0, 13);
530
+ mfc_size = spu_mfc_get_bitfield (mfc_cq_dw2, 14, 24);
531
+ noop_valid_p = spu_mfc_get_bitfield (mfc_cq_dw2, 37, 37);
532
+ qw_valid_p = spu_mfc_get_bitfield (mfc_cq_dw2, 38, 38);
533
+ ea_valid_p = spu_mfc_get_bitfield (mfc_cq_dw2, 39, 39);
534
+ cmd_error_p = spu_mfc_get_bitfield (mfc_cq_dw2, 40, 40);
536
+ cmd_chain = make_cleanup_ui_out_tuple_begin_end (uiout, "cmd");
538
+ if (spu_mfc_opcode[mfc_cmd_opcode])
539
+ ui_out_field_string (uiout, "opcode", spu_mfc_opcode[mfc_cmd_opcode]);
541
+ ui_out_field_int (uiout, "opcode", mfc_cmd_opcode);
543
+ ui_out_field_int (uiout, "tag", mfc_cmd_tag);
544
+ ui_out_field_int (uiout, "tid", tclass_id);
545
+ ui_out_field_int (uiout, "rid", rclass_id);
548
+ ui_out_field_fmt (uiout, "ea", "0x%016llx", mfc_ea);
550
+ ui_out_field_skip (uiout, "ea");
552
+ ui_out_field_fmt (uiout, "lsa", "0x%05x", mfc_lsa << 4);
554
+ ui_out_field_fmt (uiout, "size", "0x%05x", mfc_size << 4);
556
+ ui_out_field_fmt (uiout, "size", "0x%05x", mfc_size);
560
+ ui_out_field_fmt (uiout, "lstaddr", "0x%05x", list_lsa << 3);
561
+ ui_out_field_fmt (uiout, "lstsize", "0x%05x", list_size << 3);
565
+ ui_out_field_skip (uiout, "lstaddr");
566
+ ui_out_field_skip (uiout, "lstsize");
570
+ ui_out_field_string (uiout, "error_p", "*");
572
+ ui_out_field_skip (uiout, "error_p");
574
+ do_cleanups (cmd_chain);
576
+ if (!ui_out_is_mi_like_p (uiout))
577
+ printf_filtered ("\n");
580
+ do_cleanups (chain);
584
+info_spu_dma_command (char *args, int from_tty)
586
+ int fd = read_register (SPU_ID_REGNUM);
587
+ unsigned long long dma_info_type;
588
+ unsigned long long dma_info_mask;
589
+ unsigned long long dma_info_status;
590
+ unsigned long long dma_info_stall_and_notify;
591
+ unsigned long long dma_info_atomic_command_status;
592
+ struct cleanup *chain;
594
+ gdb_byte buf[1024];
598
+ if (!target_has_registers)
599
+ error (_("No registers."));
601
+ xsnprintf (annex, sizeof annex, "%d/dma_info", fd);
602
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
603
+ buf, 0, 40 + 16 * 32);
605
+ error (_("Could not read dma_info."));
608
+ = (unsigned long long) extract_unsigned_integer (buf, 8);
610
+ = (unsigned long long) extract_unsigned_integer (buf + 8, 8);
612
+ = (unsigned long long) extract_unsigned_integer (buf + 16, 8);
613
+ dma_info_stall_and_notify
614
+ = (unsigned long long) extract_unsigned_integer (buf + 24, 8);
615
+ dma_info_atomic_command_status
616
+ = (unsigned long long) extract_unsigned_integer (buf + 32, 8);
618
+ chain = make_cleanup_ui_out_tuple_begin_end (uiout, "SPUInfoDMA");
620
+ if (ui_out_is_mi_like_p (uiout))
622
+ ui_out_field_fmt (uiout, "dma_info_type", "0x%llx", dma_info_type);
623
+ ui_out_field_fmt (uiout, "dma_info_mask", "0x%llx", dma_info_mask);
624
+ ui_out_field_fmt (uiout, "dma_info_status", "0x%llx", dma_info_status);
625
+ ui_out_field_fmt (uiout, "dma_info_stall_and_notify", "0x%llx",
626
+ dma_info_stall_and_notify);
627
+ ui_out_field_fmt (uiout, "dma_info_atomic_command_status", "0x%llx",
628
+ dma_info_atomic_command_status);
632
+ const char *query_msg;
634
+ switch (dma_info_type)
636
+ case 0: query_msg = _("no query pending"); break;
637
+ case 1: query_msg = _("'any' query pending"); break;
638
+ case 2: query_msg = _("'all' query pending"); break;
639
+ default: query_msg = _("undefined query type"); break;
642
+ printf_filtered (_("Tag-Group Status 0x%08llx\n"), dma_info_status);
643
+ printf_filtered (_("Tag-Group Mask 0x%08llx (%s)\n"),
644
+ dma_info_mask, query_msg);
645
+ printf_filtered (_("Stall-and-Notify 0x%08llx\n"),
646
+ dma_info_stall_and_notify);
647
+ printf_filtered (_("Atomic Cmd Status 0x%08llx\n"),
648
+ dma_info_atomic_command_status);
649
+ printf_filtered ("\n");
652
+ info_spu_dma_cmdlist (buf + 40, 16);
653
+ do_cleanups (chain);
657
+info_spu_proxydma_command (char *args, int from_tty)
659
+ int fd = read_register (SPU_ID_REGNUM);
660
+ unsigned long long dma_info_type;
661
+ unsigned long long dma_info_mask;
662
+ unsigned long long dma_info_status;
663
+ struct cleanup *chain;
665
+ gdb_byte buf[1024];
669
+ if (!target_has_registers)
670
+ error (_("No registers."));
672
+ xsnprintf (annex, sizeof annex, "%d/proxydma_info", fd);
673
+ len = target_read (¤t_target, TARGET_OBJECT_SPU, annex,
674
+ buf, 0, 24 + 8 * 32);
676
+ error (_("Could not read proxydma_info."));
679
+ = (unsigned long long) extract_unsigned_integer (buf, 8);
681
+ = (unsigned long long) extract_unsigned_integer (buf + 8, 8);
683
+ = (unsigned long long) extract_unsigned_integer (buf + 16, 8);
685
+ chain = make_cleanup_ui_out_tuple_begin_end (uiout, "SPUInfoProxyDMA");
687
+ if (ui_out_is_mi_like_p (uiout))
689
+ ui_out_field_fmt (uiout, "proxydma_info_type", "0x%llx", dma_info_type);
690
+ ui_out_field_fmt (uiout, "proxydma_info_mask", "0x%llx", dma_info_mask);
691
+ ui_out_field_fmt (uiout, "proxydma_info_status", "0x%llx", dma_info_status);
695
+ const char *query_msg;
697
+ switch (dma_info_type)
699
+ case 0: query_msg = _("no query pending"); break;
700
+ case 1: query_msg = _("'any' query pending"); break;
701
+ case 2: query_msg = _("'all' query pending"); break;
702
+ default: query_msg = _("undefined query type"); break;
705
+ printf_filtered (_("Tag-Group Status 0x%08llx\n"), dma_info_status);
706
+ printf_filtered (_("Tag-Group Mask 0x%08llx (%s)\n"),
707
+ dma_info_mask, query_msg);
708
+ printf_filtered ("\n");
711
+ info_spu_dma_cmdlist (buf + 24, 8);
712
+ do_cleanups (chain);
716
+info_spu_command (char *args, int from_tty)
718
+ printf_unfiltered (_("\"info spu\" must be followed by the name of an SPU facility.\n"));
719
+ help_list (infospucmdlist, "info spu ", -1, gdb_stdout);
723
/* Set up gdbarch struct. */
725
static struct gdbarch *
726
@@ -1325,4 +1933,26 @@
727
target_new_objfile_chain = deprecated_target_new_objfile_hook;
728
deprecated_target_new_objfile_hook = spu_new_objfile;
729
spu_overlay_data = register_objfile_data ();
731
+ /* Add root prefix command for all "info spu" commands. */
732
+ add_prefix_cmd ("spu", class_info, info_spu_command,
733
+ _("Various SPU specific commands."),
734
+ &infospucmdlist, "info spu ", 0, &infolist);
736
+ /* Add various "info spu" commands. */
737
+ add_cmd ("event", class_info, info_spu_event_command,
738
+ _("Display SPU event facility status.\n"),
740
+ add_cmd ("signal", class_info, info_spu_signal_command,
741
+ _("Display SPU signal notification facility status.\n"),
743
+ add_cmd ("mailbox", class_info, info_spu_mailbox_command,
744
+ _("Display SPU mailbox facility status.\n"),
746
+ add_cmd ("dma", class_info, info_spu_dma_command,
747
+ _("Display MFC DMA status.\n"),
749
+ add_cmd ("proxydma", class_info, info_spu_proxydma_command,
750
+ _("Display MFC Proxy-DMA status.\n"),
753
diff -urN gdb-orig/gdb/spu-tdep.h gdb-6.6/gdb/spu-tdep.h
754
--- gdb-orig/gdb/spu-tdep.h 2006-12-13 21:27:59.834511024 +0100
755
+++ gdb-6.6/gdb/spu-tdep.h 2006-12-13 21:22:45.462627696 +0100
758
/* Number of registers. */
759
#define SPU_NUM_REGS 130
760
-#define SPU_NUM_PSEUDO_REGS 1
761
+#define SPU_NUM_PSEUDO_REGS 6
762
#define SPU_NUM_GPRS 128
764
/* Register numbers of various important registers. */
766
/* Special registers. */
767
SPU_ID_REGNUM = 128, /* SPU ID register. */
768
SPU_PC_REGNUM = 129, /* Next program counter. */
769
- SPU_SP_REGNUM = 130 /* Stack pointer (preferred slot). */
770
+ SPU_SP_REGNUM = 130, /* Stack pointer (preferred slot). */
771
+ SPU_FPSCR_REGNUM = 131, /* Floating point status/control register. */
772
+ SPU_SRR0_REGNUM = 132, /* SRR0 register. */
773
+ SPU_LSLR_REGNUM = 133, /* Local store limit register. */
774
+ SPU_DECR_REGNUM = 134, /* Decrementer value. */
775
+ SPU_DECR_STATUS_REGNUM = 135 /* Decrementer status. */
779
diff -urN gdb-orig/gdb/target.h gdb-6.6/gdb/target.h
780
--- gdb-orig/gdb/target.h 2006-12-13 21:27:59.842509808 +0100
781
+++ gdb-6.6/gdb/target.h 2006-12-13 21:22:45.469626632 +0100
783
a previously erased flash memory. Using it without erasing
784
flash can have unexpected results. Addresses are physical
785
address on target, and not relative to flash start. */
786
- TARGET_OBJECT_FLASH
787
+ TARGET_OBJECT_FLASH,
788
+ /* SPU target specific transfer. */
791
/* Possible future objects: TARGET_OBJECT_FILE, TARGET_OBJECT_PROC, ... */