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Viewing changes to intel/intel_chipset.h

  • Committer: Package Import Robot
  • Author(s): Robert Hooker
  • Date: 2012-01-06 17:00:29 UTC
  • mfrom: (2.3.15 sid)
  • Revision ID: package-import@ubuntu.com-20120106170029-74zl4lt5h0yclxdd
Tags: 2.4.30-1ubuntu1
* Merge from Debian unstable, remaining changes:
  - debian/rules
  - debian/control:
    + Build libdrm-intel1 everywhere rather than just {i386,amd64}
      for Plymouth

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intel/intel_chipset.h
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#ifndef _INTEL_CHIPSET_H
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#define _INTEL_CHIPSET_H
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#define IS_830(dev) ((dev)->pci_device == 0x3577)
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#define IS_845(dev) ((dev)->pci_device == 0x2562)
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#define IS_85X(dev) ((dev)->pci_device == 0x3582)
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#define IS_865(dev) ((dev)->pci_device == 0x2572)
 
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#define PCI_CHIP_ILD_G                  0x0042
 
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#define PCI_CHIP_ILM_G                  0x0046
 
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#define PCI_CHIP_SANDYBRIDGE_GT1        0x0102 /* desktop */
 
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#define PCI_CHIP_SANDYBRIDGE_GT2        0x0112
 
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#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS   0x0122
 
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#define PCI_CHIP_SANDYBRIDGE_M_GT1      0x0106 /* mobile */
 
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#define PCI_CHIP_SANDYBRIDGE_M_GT2      0x0116
 
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#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
 
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#define PCI_CHIP_SANDYBRIDGE_S          0x010A /* server */
 
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#define PCI_CHIP_IVYBRIDGE_GT1          0x0152 /* desktop */
 
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#define PCI_CHIP_IVYBRIDGE_GT2          0x0162
 
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#define PCI_CHIP_IVYBRIDGE_M_GT1        0x0156 /* mobile */
 
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#define PCI_CHIP_IVYBRIDGE_M_GT2        0x0166
 
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#define PCI_CHIP_IVYBRIDGE_S            0x015a /* server */
 
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#define IS_830(dev) (dev == 0x3577)
 
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#define IS_845(dev) (dev == 0x2562)
 
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#define IS_85X(dev) (dev == 0x3582)
 
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#define IS_865(dev) (dev == 0x2572)
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#define IS_GEN2(dev) (IS_830(dev) ||                            \
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                      IS_845(dev) ||                            \
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                      IS_85X(dev) ||                            \
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                      IS_865(dev))
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#define IS_915G(dev) ((dev)->pci_device == 0x2582 ||            \
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                       (dev)->pci_device == 0x258a)
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#define IS_915GM(dev) ((dev)->pci_device == 0x2592)
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#define IS_945G(dev) ((dev)->pci_device == 0x2772)
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#define IS_945GM(dev) ((dev)->pci_device == 0x27A2 ||           \
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                        (dev)->pci_device == 0x27AE)
 
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#define IS_915G(dev) (dev == 0x2582 ||          \
 
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                       dev == 0x258a)
 
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#define IS_915GM(dev) (dev == 0x2592)
 
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#define IS_945G(dev) (dev == 0x2772)
 
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#define IS_945GM(dev) (dev == 0x27A2 ||         \
 
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                        dev == 0x27AE)
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#define IS_915(dev) (IS_915G(dev) ||                            \
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                     IS_915GM(dev))
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                     IS_G33(dev) ||                             \
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                     IS_PINEVIEW(dev))
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#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||          \
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                        (dev)->pci_device == 0x29B2 ||          \
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                        (dev)->pci_device == 0x29D2)
 
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#define IS_G33(dev)    (dev == 0x29C2 ||                \
 
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                        dev == 0x29B2 ||                \
 
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                        dev == 0x29D2)
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#define IS_PINEVIEW(dev) ((dev)->pci_device == 0xa001 ||        \
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                          (dev)->pci_device == 0xa011)
 
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#define IS_PINEVIEW(dev) (dev == 0xa001 ||      \
 
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                          dev == 0xa011)
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#define IS_GEN3(dev) (IS_915(dev) ||                            \
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                      IS_945(dev) ||                            \
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                      IS_G33(dev) ||                            \
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                      IS_PINEVIEW(dev))
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#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
 
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#define IS_I965GM(dev) (dev == 0x2A02)
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#define IS_GEN4(dev) ((dev)->pci_device == 0x2972 ||    \
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                      (dev)->pci_device == 0x2982 ||    \
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                      (dev)->pci_device == 0x2992 ||    \
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                      (dev)->pci_device == 0x29A2 ||    \
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                      (dev)->pci_device == 0x2A02 ||    \
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                      (dev)->pci_device == 0x2A12 ||    \
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                      (dev)->pci_device == 0x2A42 ||    \
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                      (dev)->pci_device == 0x2E02 ||    \
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                      (dev)->pci_device == 0x2E12 ||    \
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                      (dev)->pci_device == 0x2E22 ||    \
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                      (dev)->pci_device == 0x2E32 ||    \
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                      (dev)->pci_device == 0x2E42 ||    \
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                      (dev)->pci_device == 0x0042 ||    \
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                      (dev)->pci_device == 0x0046 ||    \
 
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#define IS_GEN4(dev) (dev == 0x2972 ||  \
 
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                      dev == 0x2982 ||  \
 
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                      dev == 0x2992 ||  \
 
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                      dev == 0x29A2 ||  \
 
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                      dev == 0x2A02 ||  \
 
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                      dev == 0x2A12 ||  \
 
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                      dev == 0x2A42 ||  \
 
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                      dev == 0x2E02 ||  \
 
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                      dev == 0x2E12 ||  \
 
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                      dev == 0x2E22 ||  \
 
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                      dev == 0x2E32 ||  \
 
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                      dev == 0x2E42 ||  \
 
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                      dev == 0x0042 ||  \
 
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                      dev == 0x0046 ||  \
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                      IS_I965GM(dev) || \
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                      IS_G4X(dev))
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#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
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#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
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                     (dev)->pci_device == 0x2E12 || \
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                     (dev)->pci_device == 0x2E22 || \
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                     (dev)->pci_device == 0x2E32 || \
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                     (dev)->pci_device == 0x2E42 || \
 
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#define IS_GM45(dev) (dev == 0x2A42)
 
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#define IS_GEN5(dev)    (dev == PCI_CHIP_ILD_G || \
 
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                         dev == PCI_CHIP_ILM_G)
 
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#define IS_GEN6(dev)    (dev == PCI_CHIP_SANDYBRIDGE_GT1 || \
 
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                         dev == PCI_CHIP_SANDYBRIDGE_GT2 || \
 
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                         dev == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \
 
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                         dev == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
 
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                         dev == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
 
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                         dev == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \
 
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                         dev == PCI_CHIP_SANDYBRIDGE_S)
 
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#define IS_GEN7(dev)    (dev == PCI_CHIP_IVYBRIDGE_GT1 || \
 
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                         dev == PCI_CHIP_IVYBRIDGE_GT2 || \
 
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                         dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
 
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                         dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
 
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                         dev == PCI_CHIP_IVYBRIDGE_S)
 
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#define IS_G4X(dev) (dev == 0x2E02 || \
 
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                     dev == 0x2E12 || \
 
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                     dev == 0x2E22 || \
 
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                     dev == 0x2E32 || \
 
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                     dev == 0x2E42 || \
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                     IS_GM45(dev))
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#define IS_9XX(dev) (IS_GEN3(dev) ||                            \
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                     IS_GEN4(dev) ||                            \
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                     IS_GEN5(dev) ||                            \
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                     IS_GEN6(dev))
 
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                     IS_GEN6(dev) ||                            \
 
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                     IS_GEN7(dev))
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#endif /* _INTEL_CHIPSET_H */