59
63
0x00 /* $D014 */ , 0x00 /* $D015 */ , 0x00 /* $D016 */ , 0xc0 /* $D017 */ ,
60
64
0x01 /* $D018 */ , 0x70 /* $D019 */ , 0xf0 /* $D01A */ , 0x00 /* $D01B */ ,
61
65
0x00 /* $D01C */ , 0x00 /* $D01D */ , 0x00 /* $D01E */ , 0x00 /* $D01F */ ,
62
0xf0 /* $D020 */ , 0xf0 /* $D021 */ , 0xf0 /* $D022 */ , 0xf0 /* $D023 */ ,
63
0xf0 /* $D024 */ , 0xf0 /* $D025 */ , 0xf0 /* $D026 */ , 0xf0 /* $D027 */ ,
66
0x00 /* $D020 */ , 0x00 /* $D021 */ , 0x00 /* $D022 */ , 0x00 /* $D023 */ ,
67
0x00 /* $D024 */ , 0xf0 /* $D025 */ , 0xf0 /* $D026 */ , 0xf0 /* $D027 */ ,
64
68
0xf0 /* $D028 */ , 0xf0 /* $D029 */ , 0xf0 /* $D02A */ , 0xf0 /* $D02B */ ,
65
69
0xf0 /* $D02C */ , 0xf0 /* $D02D */ , 0xf0 /* $D02E */ , 0xff /* $D02F */ ,
66
70
0xff /* $D030 */ , 0xff /* $D031 */ , 0xff /* $D032 */ , 0xff /* $D033 */ ,
67
0xff /* $D034 */ , 0xff /* $D035 */ , 0xff /* $D036 */ , 0xff /* $D037 */ ,
68
0xff /* $D038 */ , 0xff /* $D039 */ , 0xff /* $D03A */ , 0xff /* $D03B */ ,
69
0xff /* $D03C */ , 0xff /* $D03D */ , 0xff /* $D03E */ , 0xff /* $D03F */
71
0xff /* $D034 */ , 0xff /* $D035 */ , 0x00 /* $D036 */ , 0x00 /* $D037 */ ,
72
0x00 /* $D038 */ , 0xf0 /* $D039 */ , 0x00 /* $D03A */ , 0x00 /* $D03B */ ,
73
0x80 /* $D03C */ , 0x00 /* $D03D */ , 0xff /* $D03E */ , 0xfc /* $D03F */ ,
74
0xf8 /* $D040 */ , 0x00 /* $D041 */ , 0x00 /* $D042 */ , 0x00 /* $D043 */ ,
75
0x80 /* $D044 */ , 0xc0 /* $D045 */ , 0x00 /* $D046 */ , 0x00 /* $D047 */ ,
76
0xf0 /* $D048 */ , 0x00 /* $D049 */ , 0x00 /* $D04A */ , 0xc0 /* $D04B */ ,
77
0x00 /* $D04C */ , 0xc0 /* $D04D */ , 0x00 /* $D04E */ , 0xf0 /* $D04F */
711
753
VICII_DEBUG_REGISTER(("Border color register: $%02X", value));
755
if (!vicii.extended_enable)
756
value = (vicii.regs[0x20] & 0xf0) | (value & 0x0f);
715
if (vicii.regs[0x20] == value)
758
if (!vicii.viciidtv && (vicii.regs[0x20] == value))
718
761
vicii.regs[0x20] = value;
720
763
raster_changes_border_add_int(&vicii.raster,
721
VICII_RASTER_X(VICII_RASTER_CYCLE(maincpu_clk)),
764
vicii.viciidtv?VICIIDTV_RASTER_X_ADJ(VICII_RASTER_CYCLE(maincpu_clk)):VICII_RASTER_X(VICII_RASTER_CYCLE(maincpu_clk)),
722
765
(int *)&vicii.raster.border_color,
766
vicii.viciidtv?vicii.dtvpalette[value]:value);
726
769
inline static void d021_store(BYTE value)
773
cmask = (vicii.high_color) ? 0xff : 0x0f;
775
if (!vicii.extended_enable)
776
value = (vicii.regs[0x21] & 0xf0) | (value & 0x0f);
732
778
VICII_DEBUG_REGISTER(("Background #0 color register: $%02X", value));
734
if (vicii.regs[0x21] == value)
780
if (!vicii.viciidtv && (vicii.regs[0x21] == value))
737
x_pos = VICII_RASTER_X(VICII_RASTER_CYCLE(maincpu_clk));
783
x_pos = vicii.viciidtv?VICIIDTV_RASTER_X_ADJ(VICII_RASTER_CYCLE(maincpu_clk)):VICII_RASTER_X(VICII_RASTER_CYCLE(maincpu_clk));
739
785
if (!vicii.force_black_overscan_background_color) {
740
786
raster_changes_background_add_int(&vicii.raster, x_pos,
741
787
&vicii.raster.idle_background_color,
788
vicii.viciidtv?vicii.dtvpalette[value & cmask]:value);
743
789
raster_changes_background_add_int(&vicii.raster, x_pos,
744
&vicii.raster.xsmooth_color, value);
790
&vicii.raster.xsmooth_color,
791
vicii.viciidtv?vicii.dtvpalette[value & cmask]:value);
747
794
raster_changes_background_add_int(&vicii.raster, x_pos,
748
795
(int *)&vicii.raster.background_color,
796
vicii.viciidtv?vicii.dtvpalette[value & cmask]:value);
750
797
vicii.regs[0x21] = value;
924
extern BYTE mem_ram[];
926
void viciidtv_update_colorram()
928
vicii.color_ram_ptr = mem_ram
929
+ (vicii.regs[0x36] << 10)
930
+ ((vicii.regs[0x37] & 0x07) << 18); /* TODO test */
933
inline static void d036_store(const BYTE value)
935
if (vicii.extended_enable) {
936
vicii.regs[0x36] = value;
937
viciidtv_update_colorram();
940
VICII_DEBUG_REGISTER(("Color bank low: $%02x",value));
943
inline static void d037_store(const BYTE value)
945
if (vicii.extended_enable) {
946
vicii.regs[0x37] = value;
947
viciidtv_update_colorram();
949
VICII_DEBUG_REGISTER(("Color bank high: $%02x",value));
952
inline static void d038_store(const BYTE value)
954
if (vicii.extended_enable) {
955
vicii.regs[0x38] = value;
956
vicii.counta_mod &= 0xff00;
957
vicii.counta_mod |= value;
960
VICII_DEBUG_REGISTER(("Linear Count A modulo low: $%02x",value));
963
inline static void d039_store(const BYTE value)
965
if (vicii.extended_enable) {
966
vicii.regs[0x39] = value & 0xf;
967
vicii.counta_mod &= 0x00ff;
968
vicii.counta_mod |= ((value&0xf)<<8);
971
VICII_DEBUG_REGISTER(("Linear Count A modulo high: $%02x",value));
974
inline static void d03a_store(const BYTE value)
976
if (vicii.extended_enable) {
977
vicii.regs[0x3a] = value;
978
vicii_update_memory_ptrs(VICII_RASTER_CYCLE(maincpu_clk));
981
VICII_DEBUG_REGISTER(("Linear Count A Start low: $%02x",value));
984
inline static void d03b_store(const BYTE value)
986
if (vicii.extended_enable) {
987
vicii.regs[0x3b] = value;
988
vicii_update_memory_ptrs(VICII_RASTER_CYCLE(maincpu_clk));
991
VICII_DEBUG_REGISTER(("Linear Count A Start middle: $%02x",value));
994
static void d03c_store(const BYTE value)
996
int cycle, old_overscan;
998
if (!vicii.extended_enable) {
1002
cycle = VICII_RASTER_CYCLE(maincpu_clk);
1003
old_overscan = vicii.overscan;
1004
vicii.regs[0x3c] = value;
1005
vicii.badline_disable = value & 0x20 ? 1 : 0;
1006
vicii.colorfetch_disable = value & 0x10 ? 1: 0;
1007
vicii.overscan = value & 0x08 ? 1 : 0;
1008
vicii.high_color = value & 0x04 ? 1 : 0;
1009
vicii.border_off = value & 0x02 ? 1 : 0;
1011
/* make some of those constants below into defines */
1012
raster_changes_border_add_int(&vicii.raster,
1013
VICIIDTV_RASTER_X_ADJ(cycle),
1014
(int *)&vicii.raster.border_disable,
1017
if (vicii.overscan) {
1018
vicii.raster.geometry->gfx_size.width = VICII_SCREEN_XPIX+64;
1019
vicii.raster.geometry->text_size.width = VICII_SCREEN_TEXTCOLS + 8;
1020
vicii.raster.geometry->gfx_position.x = vicii.screen_leftborderwidth - 32;
1021
if (!old_overscan) { /* TODO should happen max. once per line */
1022
/* remove the 8 extra counter increments for the current line */
1023
vicii.counta -= vicii.counta_step * 8;
1024
vicii.countb -= vicii.countb_step * 8;
1027
vicii.raster.geometry->gfx_size.width = VICII_SCREEN_XPIX;
1028
vicii.raster.geometry->text_size.width = VICII_SCREEN_TEXTCOLS;
1029
vicii.raster.geometry->gfx_position.x = vicii.screen_leftborderwidth;
1032
d020_store((BYTE)vicii.regs[0x20]);
1033
d021_store((BYTE)vicii.regs[0x21]);
1034
ext_background_store(0x22,(BYTE)vicii.regs[0x22]);
1035
ext_background_store(0x23,(BYTE)vicii.regs[0x23]);
1036
ext_background_store(0x24,(BYTE)vicii.regs[0x24]);
1038
vicii_update_video_mode(cycle);
1039
vicii_update_memory_ptrs(cycle);
1041
VICII_DEBUG_REGISTER(("VICIIDTV register 1: $%02x",value));
1044
inline static void d03d_store(const BYTE value)
1046
if (vicii.extended_enable) {
1047
vicii.regs[0x3d] = value & 0x1f;
1048
vicii_update_memory_ptrs(VICII_RASTER_CYCLE(maincpu_clk));
1051
VICII_DEBUG_REGISTER(("Graphics fetch bank: $%02x",value));
1054
inline static void d03f_store(const BYTE value)
1056
if (vicii.extended_lockout) {
1060
vicii.extended_enable = value & 0x01 ? 1 : 0;
1061
vicii.extended_lockout = value & 0x02 ? 1 : 0;
1063
vicii.regs[0x3f] = value;
1065
VICII_DEBUG_REGISTER(("Enable extended features: $%02x",value));
1068
int vicii_extended_regs(void)
1070
return vicii.extended_enable;
1074
inline static void d040_store(const BYTE value)
1076
if (vicii.extended_enable) {
1077
vicii.regs[0x40] = value;
1080
VICII_DEBUG_REGISTER(("VICIIDTV register 2: $%02x",value));
1083
inline static void d044_store(const BYTE value)
1087
if (vicii.extended_enable) {
1088
vicii.regs[0x44] = value;
1090
offs = value & 0x7f;
1091
vicii.raster_irq_prevent = 0;
1093
if (vicii.cycles_per_line == 63 && offs > 53) {
1094
if (offs == 54 || offs == 55) {
1095
vicii.raster_irq_prevent = 1;
1099
vicii.raster_irq_offset = (offs+1) % vicii.cycles_per_line;
1101
vicii.raster_irq_prevent = 1;
1103
vicii_irq_set_raster_line(vicii.raster_irq_line);
1105
VICII_DEBUG_REGISTER(("CPU cycle/IRQ trigger cycle: $%02x",value));
1108
inline static void d045_store(const BYTE value)
1110
if (vicii.extended_enable) {
1111
vicii.regs[0x45] = value&0x1f;
1112
viciidtv_update_colorram();
1113
vicii_update_memory_ptrs(VICII_RASTER_CYCLE(maincpu_clk));
1116
VICII_DEBUG_REGISTER(("Linear Count A Start high: $%02x",value));
1119
inline static void d046_store(const BYTE value)
1121
if (vicii.extended_enable) {
1122
vicii.regs[0x46] = value;
1123
vicii.counta_step = value;
1126
VICII_DEBUG_REGISTER(("Linear Count A Step: $%02x",value));
1129
inline static void d047_store(const BYTE value)
1131
if (vicii.extended_enable) {
1132
vicii.regs[0x47] = value;
1133
vicii.countb_mod &= 0xff00;
1134
vicii.countb_mod |= value;
1137
VICII_DEBUG_REGISTER(("Linear Count B modulo low: $%02x",value));
1140
inline static void d048_store(const BYTE value)
1142
if (vicii.extended_enable) {
1143
vicii.regs[0x48] = value & 0xf;
1144
vicii.countb_mod &= 0x00ff;
1145
vicii.countb_mod |= ((value&0xf)<<8);
1148
VICII_DEBUG_REGISTER(("Linear Count B modulo high: $%02x",value));
1151
inline static void d049_store(const BYTE value)
1153
if (vicii.extended_enable) {
1154
vicii.regs[0x49] = value;
1157
VICII_DEBUG_REGISTER(("Linear Count B Start low: $%02x",value));
1160
inline static void d04a_store(const BYTE value)
1162
if (vicii.extended_enable) {
1163
vicii.regs[0x4a] = value;
1166
VICII_DEBUG_REGISTER(("Linear Count B Start middle: $%02x",value));
1169
inline static void d04b_store(const BYTE value)
1171
if (vicii.extended_enable) {
1172
vicii.regs[0x4b] = value&0x1f;
1175
VICII_DEBUG_REGISTER(("Linear Count B Start high: $%02x",value));
1178
inline static void d04c_store(const BYTE value)
1180
if (vicii.extended_enable) {
1181
vicii.regs[0x4c] = value;
1182
vicii.countb_step = value;
1185
VICII_DEBUG_REGISTER(("Linear Count B Step: $%02x",value));
1188
inline static void d04d_store(const BYTE value)
1190
if (vicii.extended_enable) {
1191
vicii.regs[0x4d] = value & 0x1f;
1194
VICII_DEBUG_REGISTER(("Sprite bank: $%02x",value));
1197
/* DTV Palette registers at $d2xx */
1198
void REGPARM2 vicii_palette_store(WORD addr, BYTE value)
1200
if (!vicii.extended_enable) {
1204
if (vicii.dtvpalette[addr&0xf]==value) {
1208
vicii.dtvpalette[addr&0xf]=value;
1209
d020_store((BYTE)vicii.regs[0x20]);
1210
d021_store((BYTE)vicii.regs[0x21]);
1211
ext_background_store(0x22,(BYTE)vicii.regs[0x22]);
1212
ext_background_store(0x23,(BYTE)vicii.regs[0x23]);
1213
ext_background_store(0x24,(BYTE)vicii.regs[0x24]);
1214
d025_store((BYTE)vicii.regs[0x25]);
1215
d026_store((BYTE)vicii.regs[0x26]);
1216
sprite_color_store(0x27,(BYTE)vicii.regs[0x27]);
1217
sprite_color_store(0x28,(BYTE)vicii.regs[0x28]);
1218
sprite_color_store(0x29,(BYTE)vicii.regs[0x29]);
1219
sprite_color_store(0x2a,(BYTE)vicii.regs[0x2a]);
1220
sprite_color_store(0x2b,(BYTE)vicii.regs[0x2b]);
1221
sprite_color_store(0x2c,(BYTE)vicii.regs[0x2c]);
1222
sprite_color_store(0x2d,(BYTE)vicii.regs[0x2d]);
1223
sprite_color_store(0x2e,(BYTE)vicii.regs[0x2e]);
1224
vicii.raster.dont_cache = 1;
1227
BYTE REGPARM1 vicii_palette_read(WORD addr)
870
1232
/* Store a value in a VIC-II register. */
871
1233
void REGPARM2 vicii_store(WORD addr, BYTE value)
1235
if (vicii.extended_enable) addr &= 0x7f;
875
1238
vicii_handle_pending_alarms_external_write();
1014
1377
case 0x33: /* $D033: Unused */
1015
1378
case 0x34: /* $D034: Unused */
1016
1379
case 0x35: /* $D035: Unused */
1017
case 0x36: /* $D036: Unused */
1018
case 0x37: /* $D037: Unused */
1019
case 0x38: /* $D038: Unused */
1020
case 0x39: /* $D039: Unused */
1021
case 0x3a: /* $D03A: Unused */
1022
case 0x3b: /* $D03B: Unused */
1023
case 0x3c: /* $D03C: Unused */
1024
case 0x3d: /* $D03D: Unused */
1025
1380
case 0x3e: /* $D03E: Unused */
1026
case 0x3f: /* $D03F: Unused */
1027
1429
VICII_DEBUG_REGISTER(("(unused)"));
1432
case 0x36: /* $D036: Color Bank Low */
1435
case 0x37: /* $D037: Color Bank High */
1438
case 0x38: /* $D038: Linear Count A Modulo Low */
1441
case 0x39: /* $D039: Linear Count A Modulo High */
1444
case 0x3a: /* $D03a: Linear Count A Start Low */
1447
case 0x3b: /* $D03B: Linear Count A Start Middle */
1450
case 0x3c: /* $D03C: VICIIDTV register 1 */
1453
case 0x3d: /* $D03D: Graphics fetch bank */
1456
case 0x3f: /* $D03F: Enable extended features register */
1459
case 0x40: /* $D040: VICIIDTV register 2 */
1462
case 0x41: /* $D041: Burst rate modulus high */
1463
case 0x42: /* $D042: Burst rate modulus middle */
1464
case 0x43: /* $D043: Burst rate modulus low */
1465
VICII_DEBUG_REGISTER(("Burst rate modulus (ignored)"));
1467
case 0x44: /* $D044: CPU cycle/IRQ trigger cycle */
1470
case 0x45: /* $D045: Linear Count A Start High */
1473
case 0x46: /* $D046: Linear Count A Step */
1476
case 0x47: /* $D047: Linear Count B Modulo Low */
1479
case 0x48: /* $D048: Linear Count B Modulo High */
1482
case 0x49: /* $D049: Linear Count B Start Low */
1485
case 0x4a: /* $D04A: Linear Count B Start Middle */
1488
case 0x4b: /* $D04B: Linear Count B Start High */
1491
case 0x4c: /* $D04C: Linear Count B Step */
1494
case 0x4d: /* $D04D: Sprite bank */
1497
case 0x4e: /* $D04E: Scan line timing adjust */
1498
case 0x4f: /* $D04F: VICIIDTV register 3 */
1499
VICII_DEBUG_REGISTER(("Scan line/Saturation/Burst lock (ignored)"));
1299
1779
case 0x33: /* $D033: Unused */
1300
1780
case 0x34: /* $D034: Unused */
1301
1781
case 0x35: /* $D035: Unused */
1302
case 0x36: /* $D036: Unused */
1303
case 0x37: /* $D037: Unused */
1304
case 0x38: /* $D038: Unused */
1305
case 0x39: /* $D039: Unused */
1306
case 0x3a: /* $D03A: Unused */
1307
case 0x3b: /* $D03B: Unused */
1308
case 0x3c: /* $D03C: Unused */
1309
case 0x3d: /* $D03D: Unused */
1784
case 0x36: /* $D036: Color Bank Low */
1785
if (vicii.viciidtv) {
1786
VICII_DEBUG_REGISTER(("Color Bank Low: $%02X",
1791
case 0x37: /* $D037: Color Bank High */
1792
if (vicii.viciidtv) {
1793
VICII_DEBUG_REGISTER(("Color Bank High: $%02X",
1798
case 0x38: /* $D038: Linear Count A Modulo Low */
1799
if (vicii.viciidtv) {
1800
VICII_DEBUG_REGISTER(("Linear Count A Modulo Low: $%02X",
1805
case 0x39: /* $D039: Linear Count A Modulo High */
1806
if (vicii.viciidtv) {
1807
VICII_DEBUG_REGISTER(("Linear Count A Modulo High: $%02X",
1812
case 0x3a: /* $D03a: Linear Count A Start Low */
1813
if (vicii.viciidtv) {
1814
VICII_DEBUG_REGISTER(("Linear Count A Start Low: $%02X",
1819
case 0x3b: /* $D03B: Linear Count A Start Middle */
1820
if (vicii.viciidtv) {
1821
VICII_DEBUG_REGISTER(("Linear Count A Start Middle: $%02X",
1826
case 0x3c: /* $D03C: VICIIDTV register 1 */
1827
if (vicii.viciidtv) {
1828
VICII_DEBUG_REGISTER(("VICIIDTV register 1: $%02X",
1833
case 0x3d: /* $D03D: Graphics fetch bank */
1834
if (vicii.viciidtv) {
1835
VICII_DEBUG_REGISTER(("Graphics fetch bank: $%02X",
1310
1840
case 0x3e: /* $D03E: Unused */
1311
case 0x3f: /* $D03F: Unused */
1843
case 0x3f: /* $D03F: Enable extended features register */
1844
if (vicii.viciidtv) {
1845
VICII_DEBUG_REGISTER(("Enable extended features: $%02X",
1850
case 0x40: /* $D040: VICIIDTV register 2 */
1851
VICII_DEBUG_REGISTER(("VICIIDTV register 2: $%02X",
1855
case 0x41: /* $D041: Burst rate modulus high */
1856
VICII_DEBUG_REGISTER(("Burst rate modulus high: $%02X",
1860
case 0x42: /* $D042: Burst rate modulus middle */
1861
VICII_DEBUG_REGISTER(("Burst rate modulus middle: $%02X",
1865
case 0x43: /* $D043: Burst rate modulus low */
1866
VICII_DEBUG_REGISTER(("Burst rate modulus low: $%02X",
1870
case 0x44: /* $D044: CPU cycle/IRQ trigger cycle */
1871
VICII_DEBUG_REGISTER(("CPU cycle/IRQ trigger cycle: $%02X",
1875
case 0x45: /* $D045: Linear Count A Start High */
1876
VICII_DEBUG_REGISTER(("Linear Count A Start High: $%02X",
1880
case 0x46: /* $D046: Linear Count A Step */
1881
VICII_DEBUG_REGISTER(("Linear Count A Step: $%02X",
1885
case 0x47: /* $D047: Linear Count B Modulo Low */
1886
VICII_DEBUG_REGISTER(("Linear Count B Modulo Low: $%02X",
1890
case 0x48: /* $D048: Linear Count B Modulo High */
1891
VICII_DEBUG_REGISTER(("Linear Count B Modulo High: $%02X",
1895
case 0x49: /* $D049: Linear Count B Start Low */
1896
VICII_DEBUG_REGISTER(("Linear Count B Start Low: $%02X",
1900
case 0x4a: /* $D04A: Linear Count B Start Middle */
1901
VICII_DEBUG_REGISTER(("Linear Count B Start Middle: $%02X",
1905
case 0x4b: /* $D04B: Linear Count B Start High */
1906
VICII_DEBUG_REGISTER(("Linear Count B Start High: $%02X",
1910
case 0x4c: /* $D04C: Linear Count B Step */
1911
VICII_DEBUG_REGISTER(("Linear Count B Step: $%02X",
1915
case 0x4d: /* $D04D: Sprite bank */
1916
VICII_DEBUG_REGISTER(("Sprite bank: $%02X",
1920
case 0x4e: /* $D04E: Scan line timing adjust */
1921
VICII_DEBUG_REGISTER(("Scan line timing adjust: $%02X",
1925
case 0x4f: /* $D04F: VICIIDTV register 3 */
1926
VICII_DEBUG_REGISTER(("VICIIDTV register 3: $%02X",