1
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
3
File: oct6100_phasing_tsst.c
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Copyright (c) 2001-2007 Octasic Inc.
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This file contains functions used to open and close phasing TSSTs.
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This file is part of the Octasic OCT6100 GPL API . The OCT6100 GPL API is
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free software; you can redistribute it and/or modify it under the terms of
13
the GNU General Public License as published by the Free Software Foundation;
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either version 2 of the License, or (at your option) any later version.
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The OCT6100 GPL API is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with the OCT6100 GPL API; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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$Octasic_Release: OCT612xAPI-01.00-PR49 $
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$Octasic_Revision: 46 $
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\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/***************************** INCLUDE FILES *******************************/
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#include "oct6100api/oct6100_defines.h"
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#include "oct6100api/oct6100_errors.h"
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#include "oct6100api/oct6100_apiud.h"
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#include "apilib/octapi_llman.h"
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#include "oct6100api/oct6100_tlv_inst.h"
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#include "oct6100api/oct6100_chip_open_inst.h"
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#include "oct6100api/oct6100_chip_stats_inst.h"
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#include "oct6100api/oct6100_interrupts_inst.h"
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#include "oct6100api/oct6100_remote_debug_inst.h"
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#include "oct6100api/oct6100_debug_inst.h"
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#include "oct6100api/oct6100_api_inst.h"
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#include "oct6100api/oct6100_phasing_tsst_inst.h"
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#include "oct6100api/oct6100_interrupts_pub.h"
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#include "oct6100api/oct6100_chip_open_pub.h"
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#include "oct6100api/oct6100_channel_pub.h"
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#include "oct6100api/oct6100_phasing_tsst_pub.h"
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#include "oct6100api/oct6100_channel_inst.h"
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#include "oct6100_chip_open_priv.h"
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#include "oct6100_miscellaneous_priv.h"
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#include "oct6100_memory_priv.h"
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#include "oct6100_tsst_priv.h"
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#include "oct6100_phasing_tsst_priv.h"
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/**************************** PUBLIC FUNCTIONS ****************************/
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
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Function: Oct6100PhasingTsstOpen
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Description: This function opens a phasing TSST.
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-------------------------------------------------------------------------------
72
| Argument | Description
73
-------------------------------------------------------------------------------
74
f_pApiInstance Pointer to API instance. This memory is used to keep the
75
present state of the chip and all its resources.
77
f_pPhasingTsstOpen Pointer to phasing TSST open structure.
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\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
80
#if !SKIP_Oct6100PhasingTsstOpenDef
81
UINT32 Oct6100PhasingTsstOpenDef(
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tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen )
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f_pPhasingTsstOpen->pulPhasingTsstHndl = NULL;
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f_pPhasingTsstOpen->ulTimeslot = cOCT6100_INVALID_TIMESLOT;
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f_pPhasingTsstOpen->ulStream = cOCT6100_INVALID_STREAM;
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f_pPhasingTsstOpen->ulPhasingLength = 88;
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return cOCT6100_ERR_OK;
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#if !SKIP_Oct6100PhasingTsstOpen
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UINT32 Oct6100PhasingTsstOpen(
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tPOCT6100_INSTANCE_API f_pApiInstance,
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tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen )
103
tOCT6100_SEIZE_SERIALIZE_OBJECT SeizeSerObj;
104
tOCT6100_RELEASE_SERIALIZE_OBJECT ReleaseSerObj;
105
UINT32 ulSerRes = cOCT6100_ERR_OK;
106
UINT32 ulFncRes = cOCT6100_ERR_OK;
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/* Set the process context of the serialize structure. */
109
SeizeSerObj.pProcessContext = f_pApiInstance->pProcessContext;
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ReleaseSerObj.pProcessContext = f_pApiInstance->pProcessContext;
112
/* Seize all list semaphores needed by this function. */
113
SeizeSerObj.ulSerialObjHndl = f_pApiInstance->ulApiSerObj;
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SeizeSerObj.ulTryTimeMs = cOCT6100_WAIT_INFINITELY;
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ulSerRes = Oct6100UserSeizeSerializeObject( &SeizeSerObj );
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if ( ulSerRes == cOCT6100_ERR_OK )
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/* Call the serialized function. */
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ulFncRes = Oct6100PhasingTsstOpenSer( f_pApiInstance, f_pPhasingTsstOpen );
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/* Release the seized semaphores. */
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ReleaseSerObj.ulSerialObjHndl = f_pApiInstance->ulApiSerObj;
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ulSerRes = Oct6100UserReleaseSerializeObject( &ReleaseSerObj );
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/* If an error occured then return the error code. */
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if ( ulSerRes != cOCT6100_ERR_OK )
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if ( ulFncRes != cOCT6100_ERR_OK )
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return cOCT6100_ERR_OK;
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
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Function: Oct6100PhasingTsstClose
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Description: This function closes a phasing TSST
147
-------------------------------------------------------------------------------
148
| Argument | Description
149
-------------------------------------------------------------------------------
150
f_pApiInstance Pointer to API instance. This memory is used to keep the
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present state of the chip and all its resources.
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f_pPhasingTsstClose Pointer to phasing TSST close structure.
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\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if !SKIP_Oct6100PhasingTsstCloseDef
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UINT32 Oct6100PhasingTsstCloseDef(
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tPOCT6100_PHASING_TSST_CLOSE f_pPhasingTsstClose )
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f_pPhasingTsstClose->ulPhasingTsstHndl = cOCT6100_INVALID_HANDLE;
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return cOCT6100_ERR_OK;
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#if !SKIP_Oct6100PhasingTsstClose
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UINT32 Oct6100PhasingTsstClose(
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tPOCT6100_INSTANCE_API f_pApiInstance,
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tPOCT6100_PHASING_TSST_CLOSE f_pPhasingTsstClose )
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tOCT6100_SEIZE_SERIALIZE_OBJECT SeizeSerObj;
173
tOCT6100_RELEASE_SERIALIZE_OBJECT ReleaseSerObj;
174
UINT32 ulSerRes = cOCT6100_ERR_OK;
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UINT32 ulFncRes = cOCT6100_ERR_OK;
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/* Set the process context of the serialize structure. */
178
SeizeSerObj.pProcessContext = f_pApiInstance->pProcessContext;
179
ReleaseSerObj.pProcessContext = f_pApiInstance->pProcessContext;
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/* Seize all list semaphores needed by this function. */
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SeizeSerObj.ulSerialObjHndl = f_pApiInstance->ulApiSerObj;
183
SeizeSerObj.ulTryTimeMs = cOCT6100_WAIT_INFINITELY;
184
ulSerRes = Oct6100UserSeizeSerializeObject( &SeizeSerObj );
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if ( ulSerRes == cOCT6100_ERR_OK )
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/* Call the serialized function. */
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ulFncRes = Oct6100PhasingTsstCloseSer( f_pApiInstance, f_pPhasingTsstClose );
195
/* Release the seized semaphores. */
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ReleaseSerObj.ulSerialObjHndl = f_pApiInstance->ulApiSerObj;
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ulSerRes = Oct6100UserReleaseSerializeObject( &ReleaseSerObj );
199
/* If an error occured then return the error code. */
200
if ( ulSerRes != cOCT6100_ERR_OK )
202
if ( ulFncRes != cOCT6100_ERR_OK )
205
return cOCT6100_ERR_OK;
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/**************************** PRIVATE FUNCTIONS ****************************/
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
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Function: Oct6100ApiGetPhasingTsstSwSizes
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Description: Gets the sizes of all portions of the API instance pertinent
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to the management of Phasing TSSTs.
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-------------------------------------------------------------------------------
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| Argument | Description
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-------------------------------------------------------------------------------
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f_pOpenChip Pointer to chip configuration struct.
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f_pInstSizes Pointer to struct containing instance sizes.
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\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
226
#if !SKIP_Oct6100ApiGetPhasingTsstSwSizes
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UINT32 Oct6100ApiGetPhasingTsstSwSizes(
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IN tPOCT6100_CHIP_OPEN f_pOpenChip,
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OUT tPOCT6100_API_INSTANCE_SIZES f_pInstSizes )
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/* Determine the amount of memory required for the API phasing TSST list. */
235
f_pInstSizes->ulPhasingTsstList = f_pOpenChip->ulMaxPhasingTssts * sizeof( tOCT6100_API_PHASING_TSST );
237
if ( f_pOpenChip->ulMaxPhasingTssts > 0 )
239
/* Calculate memory needed for Phasing TSST API memory allocation */
240
ulResult = OctapiLlmAllocGetSize( f_pOpenChip->ulMaxPhasingTssts, &f_pInstSizes->ulPhasingTsstAlloc );
241
if ( ulResult != cOCT6100_ERR_OK )
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return cOCT6100_ERR_FATAL_38;
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f_pInstSizes->ulPhasingTsstAlloc = 0;
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mOCT6100_ROUND_MEMORY_SIZE( f_pInstSizes->ulPhasingTsstList, ulTempVar )
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mOCT6100_ROUND_MEMORY_SIZE( f_pInstSizes->ulPhasingTsstAlloc, ulTempVar )
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return cOCT6100_ERR_OK;
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
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Function: Oct6100ApiPhasingTsstSwInit
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Description: Initializes all elements of the instance structure associated
264
-------------------------------------------------------------------------------
265
| Argument | Description
266
-------------------------------------------------------------------------------
267
f_pApiInstance Pointer to API instance. This memory is used to keep
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the present state of the chip and all its resources.
270
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
271
#if !SKIP_Oct6100ApiPhasingTsstSwInit
272
UINT32 Oct6100ApiPhasingTsstSwInit(
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IN OUT tPOCT6100_INSTANCE_API f_pApiInstance )
275
tPOCT6100_API_PHASING_TSST pPhasingTsstList;
276
tPOCT6100_SHARED_INFO pSharedInfo;
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UINT32 ulMaxPhasingTssts;
278
PVOID pPhasingTsstAlloc;
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/* Get local pointer to shared portion of instance. */
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pSharedInfo = f_pApiInstance->pSharedInfo;
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/* Initialize the phasing TSST API list. */
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ulMaxPhasingTssts = pSharedInfo->ChipConfig.usMaxPhasingTssts;
287
/* Set all entries in the phasing TSST list to unused. */
288
mOCT6100_GET_PHASING_TSST_LIST_PNT( pSharedInfo, pPhasingTsstList )
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/* Clear the memory */
291
Oct6100UserMemSet( pPhasingTsstList, 0x00, sizeof(tOCT6100_API_PHASING_TSST) * ulMaxPhasingTssts );
293
/* Initialize the phasing TSST allocation software to "all free". */
294
if ( ulMaxPhasingTssts > 0 )
296
mOCT6100_GET_PHASING_TSST_ALLOC_PNT( pSharedInfo, pPhasingTsstAlloc )
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ulResult = OctapiLlmAllocInit( &pPhasingTsstAlloc, ulMaxPhasingTssts );
299
if ( ulResult != cOCT6100_ERR_OK )
300
return cOCT6100_ERR_FATAL_39;
303
return cOCT6100_ERR_OK;
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
310
Function: Oct6100PhasingTsstOpenSer
312
Description: Opens a phasing TSST.
314
-------------------------------------------------------------------------------
315
| Argument | Description
316
-------------------------------------------------------------------------------
317
f_pApiInstance Pointer to API instance. This memory is used to keep the
318
present state of the chip and all its resources.
320
f_pPhasingTsstOpen Pointer to phasing TSST open configuration structure.
322
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
323
#if !SKIP_Oct6100PhasingTsstOpenSer
324
UINT32 Oct6100PhasingTsstOpenSer(
325
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
326
IN OUT tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen )
328
UINT16 usPhasingIndex;
332
/* Check the user's configuration of the phasing TSST for errors. */
333
ulResult = Oct6100ApiCheckPhasingParams( f_pApiInstance, f_pPhasingTsstOpen );
334
if ( ulResult != cOCT6100_ERR_OK )
337
/* Reserve all resources needed by the phasing TSST. */
338
ulResult = Oct6100ApiReservePhasingResources( f_pApiInstance, f_pPhasingTsstOpen, &usPhasingIndex, &usTsstIndex );
339
if ( ulResult != cOCT6100_ERR_OK )
342
/* Write all necessary structures to activate the phasing TSST. */
343
ulResult = Oct6100ApiWritePhasingStructs( f_pApiInstance, f_pPhasingTsstOpen, usPhasingIndex, usTsstIndex );
344
if ( ulResult != cOCT6100_ERR_OK )
347
/* Update the new phasing TSST entry in the API list. */
348
ulResult = Oct6100ApiUpdatePhasingEntry( f_pApiInstance, f_pPhasingTsstOpen, usPhasingIndex, usTsstIndex );
349
if ( ulResult != cOCT6100_ERR_OK )
352
return cOCT6100_ERR_OK;
357
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
359
Function: Oct6100ApiCheckPhasingParams
361
Description: Checks the user's phasing TSST open configuration for errors.
363
-------------------------------------------------------------------------------
364
| Argument | Description
365
-------------------------------------------------------------------------------
366
f_pApiInstance Pointer to API instance. This memory is used to keep the
367
present state of the chip and all its resources.
369
f_pPhasingTsstOpen Pointer to phasing TSST open configuration structure.
371
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
372
#if !SKIP_Oct6100ApiCheckPhasingParams
373
UINT32 Oct6100ApiCheckPhasingParams(
374
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
375
IN tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen )
379
/* Check for errors. */
380
if ( f_pApiInstance->pSharedInfo->ChipConfig.usMaxPhasingTssts == 0 )
381
return cOCT6100_ERR_PHASING_TSST_DISABLED;
383
if ( f_pPhasingTsstOpen->pulPhasingTsstHndl == NULL )
384
return cOCT6100_ERR_PHASING_TSST_INVALID_HANDLE;
386
/* Check the phasing length. */
387
if ( f_pPhasingTsstOpen->ulPhasingLength > 240 ||
388
f_pPhasingTsstOpen->ulPhasingLength < 2 )
389
return cOCT6100_ERR_PHASING_TSST_PHASING_LENGTH;
393
/* Check the input TDM streams, timeslots component for errors. */
394
ulResult = Oct6100ApiValidateTsst( f_pApiInstance,
395
cOCT6100_NUMBER_TSSTS_1,
396
f_pPhasingTsstOpen->ulTimeslot,
397
f_pPhasingTsstOpen->ulStream,
398
cOCT6100_INPUT_TSST );
399
if ( ulResult != cOCT6100_ERR_OK )
401
if ( ulResult == cOCT6100_ERR_TSST_TIMESLOT )
403
return cOCT6100_ERR_PHASING_TSST_TIMESLOT;
405
else if ( ulResult == cOCT6100_ERR_TSST_STREAM )
407
return cOCT6100_ERR_PHASING_TSST_STREAM;
415
return cOCT6100_ERR_OK;
420
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
422
Function: Oct6100ApiReservePhasingResources
424
Description: Reserves all resources needed for the new phasing TSST.
426
-------------------------------------------------------------------------------
427
| Argument | Description
428
-------------------------------------------------------------------------------
429
f_pApiInstance Pointer to API instance. This memory is used to keep the
430
present state of the chip and all its resources.
432
f_pPhasingTsstOpen Pointer to phasing TSST configuration structure.
433
f_pusPhasingIndex Allocated entry in Phasing TSST API list.
434
f_pusTsstIndex TSST memory index of the counter.
436
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
437
#if !SKIP_Oct6100ApiReservePhasingResources
438
UINT32 Oct6100ApiReservePhasingResources(
439
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
440
IN tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen,
441
OUT PUINT16 f_pusPhasingIndex,
442
OUT PUINT16 f_pusTsstIndex )
444
tPOCT6100_SHARED_INFO pSharedInfo;
448
/* Obtain local pointer to shared portion of instance. */
449
pSharedInfo = f_pApiInstance->pSharedInfo;
451
/* Reserve an entry in the phasing TSST list. */
452
ulResult = Oct6100ApiReservePhasingEntry( f_pApiInstance,
454
if ( ulResult == cOCT6100_ERR_OK )
456
/* Reserve the input TSST entry. */
457
ulResult = Oct6100ApiReserveTsst( f_pApiInstance,
458
f_pPhasingTsstOpen->ulTimeslot,
459
f_pPhasingTsstOpen->ulStream,
460
cOCT6100_NUMBER_TSSTS_1,
464
if ( ulResult != cOCT6100_ERR_OK )
466
/* Release the previously reserved entries. */
467
ulTempVar = Oct6100ApiReleasePhasingEntry( f_pApiInstance, *f_pusPhasingIndex );
468
if ( ulTempVar != cOCT6100_ERR_OK )
479
return cOCT6100_ERR_OK;
484
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
486
Function: Oct6100ApiWritePhasingStructs
488
Description: Performs all the required structure writes to configure the
491
-------------------------------------------------------------------------------
492
| Argument | Description
493
-------------------------------------------------------------------------------
494
f_pApiInstance Pointer to API instance. This memory is used to keep the
495
present state of the chip and all its resources.
497
f_pPhasingTsstOpen Pointer to phasing TSST configuration structure.
498
f_usPhasingIndex Allocated entry in phasing TSST API list.
499
f_usTsstIndex TSST memory index of the counter.
501
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
502
#if !SKIP_Oct6100ApiWritePhasingStructs
503
UINT32 Oct6100ApiWritePhasingStructs(
504
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
505
IN tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen,
506
IN UINT16 f_usPhasingIndex,
507
IN UINT16 f_usTsstIndex )
509
tPOCT6100_SHARED_INFO pSharedInfo;
510
tOCT6100_WRITE_PARAMS WriteParams;
511
UINT32 ulPhasingTsstChariotMemIndex;
514
/* Obtain local pointer to shared portion of instance. */
515
pSharedInfo = f_pApiInstance->pSharedInfo;
517
WriteParams.pProcessContext = f_pApiInstance->pProcessContext;
519
WriteParams.ulUserChipId = pSharedInfo->ChipConfig.ulUserChipId;
521
/*------------------------------------------------------------------------------*/
522
/* Configure the TSST control memory of the phasing TSST. */
524
/* Find the asociated entry in the chariot memory for the phasing TSST. */
525
ulPhasingTsstChariotMemIndex = cOCT6100_TSST_CONTROL_PHASING_TSST_BASE_ENTRY + f_usPhasingIndex;
527
WriteParams.ulWriteAddress = cOCT6100_TSST_CONTROL_MEM_BASE + ( f_usTsstIndex * cOCT6100_TSST_CONTROL_MEM_ENTRY_SIZE );
529
WriteParams.usWriteData = cOCT6100_TSST_CONTROL_MEM_INPUT_TSST;
530
WriteParams.usWriteData |= ulPhasingTsstChariotMemIndex & cOCT6100_TSST_CONTROL_MEM_TSI_MEM_MASK;
531
mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult );
532
if ( ulResult != cOCT6100_ERR_OK )
535
/*------------------------------------------------------------------------------*/
537
/*------------------------------------------------------------------------------*/
538
/* Write the phasing length of the TSST in the ADPCM / MIXER memory. */
540
WriteParams.ulWriteAddress = cOCT6100_CONVERSION_CONTROL_PHASE_SIZE_BASE_ADD + ( f_usPhasingIndex * 2 );
541
WriteParams.usWriteData = (UINT16)( f_pPhasingTsstOpen->ulPhasingLength );
543
mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult );
544
if ( ulResult != cOCT6100_ERR_OK )
547
/*------------------------------------------------------------------------------*/
549
return cOCT6100_ERR_OK;
554
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
556
Function: Oct6100ApiUpdatePhasingEntry
558
Description: Updates the new phasing TSST in the API phasing TSST list.
560
-------------------------------------------------------------------------------
561
| Argument | Description
562
-------------------------------------------------------------------------------
563
f_pApiInstance Pointer to API instance. This memory is used to keep
564
the present state of the chip and all its resources.
566
f_pPhasingTsstOpen Pointer to phasing TSST open structure.
567
f_usPhasingIndex Allocated entry in phasing TSST API list.
568
f_usTsstIndex TSST memory index of the counter.
570
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
571
#if !SKIP_Oct6100ApiUpdatePhasingEntry
572
UINT32 Oct6100ApiUpdatePhasingEntry(
573
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
574
IN OUT tPOCT6100_PHASING_TSST_OPEN f_pPhasingTsstOpen,
575
IN UINT16 f_usPhasingIndex,
576
IN UINT16 f_usTsstIndex )
578
tPOCT6100_API_PHASING_TSST pPhasingTsstEntry;
580
/*================================================================================*/
581
/* Obtain a pointer to the new buffer's list entry. */
582
mOCT6100_GET_PHASING_TSST_ENTRY_PNT( f_pApiInstance->pSharedInfo, pPhasingTsstEntry, f_usPhasingIndex )
584
/* Copy the phasing TSST's configuration and allocated resources. */
585
pPhasingTsstEntry->usTimeslot = (UINT16)( f_pPhasingTsstOpen->ulTimeslot & 0xFFFF );
586
pPhasingTsstEntry->usStream = (UINT16)( f_pPhasingTsstOpen->ulStream & 0xFFFF );
588
pPhasingTsstEntry->usPhasingLength = (UINT16)( f_pPhasingTsstOpen->ulPhasingLength & 0xFFFF );
590
/* Store hardware related information. */
591
pPhasingTsstEntry->usPhasingTsstIndex = f_usTsstIndex;
593
/* Form handle returned to user. */
594
*f_pPhasingTsstOpen->pulPhasingTsstHndl = cOCT6100_HNDL_TAG_PHASING_TSST | (pPhasingTsstEntry->byEntryOpenCnt << cOCT6100_ENTRY_OPEN_CNT_SHIFT) | f_usPhasingIndex;
595
pPhasingTsstEntry->usDependencyCnt = 0; /* Nobody is using the phasing TSST.*/
597
/* Finally, mark the phasing TSST as open. */
598
pPhasingTsstEntry->fReserved = TRUE;
600
/* Increment the number of phasing TSSTs opened. */
601
f_pApiInstance->pSharedInfo->ChipStats.usNumberPhasingTssts++;
603
/*================================================================================*/
605
return cOCT6100_ERR_OK;
610
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
612
Function: Oct6100PhasingTsstCloseSer
614
Description: Closes a phasing TSST.
616
-------------------------------------------------------------------------------
617
| Argument | Description
618
-------------------------------------------------------------------------------
619
f_pApiInstance Pointer to API instance. This memory is used to keep the
620
present state of the chip and all its resources.
622
f_pPhasingTsstClose Pointer to phasing TSST close structure.
624
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
625
#if !SKIP_Oct6100PhasingTsstCloseSer
626
UINT32 Oct6100PhasingTsstCloseSer(
627
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
628
IN OUT tPOCT6100_PHASING_TSST_CLOSE f_pPhasingTsstClose )
630
UINT16 usPhasingIndex;
634
/* Verify that all the parameters given match the state of the API. */
635
ulResult = Oct6100ApiAssertPhasingParams( f_pApiInstance, f_pPhasingTsstClose, &usPhasingIndex, &usTsstIndex );
636
if ( ulResult != cOCT6100_ERR_OK )
639
/* Release all resources associated to the phasing TSST. */
640
ulResult = Oct6100ApiInvalidatePhasingStructs( f_pApiInstance, usTsstIndex );
641
if ( ulResult != cOCT6100_ERR_OK )
644
/* Release all resources associated to the phasing TSST. */
645
ulResult = Oct6100ApiReleasePhasingResources( f_pApiInstance, usPhasingIndex );
646
if ( ulResult != cOCT6100_ERR_OK )
649
f_pPhasingTsstClose->ulPhasingTsstHndl = cOCT6100_INVALID_VALUE;
651
return cOCT6100_ERR_OK;
656
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
658
Function: Oct6100ApiAssertPhasingParams
660
Description: Validate the handle given by the user and verify the state of
661
the phasing TSST about to be closed. Also returns all
662
required information to deactivate the phasing TSST.
664
-------------------------------------------------------------------------------
665
| Argument | Description
666
-------------------------------------------------------------------------------
667
f_pApiInstance Pointer to API instance. This memory is used to keep the
668
present state of the chip and all its resources.
670
f_pPhasingTsstClose Pointer to phasing TSST close structure.
671
f_pusPhasingIndex Index of the phasing TSST structure in the API list.
672
f_pusTsstIndex Index of the entry in the TSST control memory.
674
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
675
#if !SKIP_Oct6100ApiAssertPhasingParams
676
UINT32 Oct6100ApiAssertPhasingParams(
677
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
678
IN tPOCT6100_PHASING_TSST_CLOSE f_pPhasingTsstClose,
679
OUT PUINT16 f_pusPhasingIndex,
680
OUT PUINT16 f_pusTsstIndex )
682
tPOCT6100_SHARED_INFO pSharedInfo;
683
tPOCT6100_API_PHASING_TSST pPhasingEntry;
684
UINT32 ulEntryOpenCnt;
686
/* Get local pointer(s). */
687
pSharedInfo = f_pApiInstance->pSharedInfo;
689
/* Check the provided handle. */
690
if ( (f_pPhasingTsstClose->ulPhasingTsstHndl & cOCT6100_HNDL_TAG_MASK) != cOCT6100_HNDL_TAG_PHASING_TSST )
691
return cOCT6100_ERR_PHASING_TSST_INVALID_HANDLE;
693
*f_pusPhasingIndex = (UINT16)( f_pPhasingTsstClose->ulPhasingTsstHndl & cOCT6100_HNDL_INDEX_MASK );
694
if ( *f_pusPhasingIndex >= pSharedInfo->ChipConfig.usMaxPhasingTssts )
695
return cOCT6100_ERR_PHASING_TSST_INVALID_HANDLE;
697
/*=======================================================================*/
698
/* Get a pointer to the phasing TSST's list entry. */
700
mOCT6100_GET_PHASING_TSST_ENTRY_PNT( pSharedInfo, pPhasingEntry, *f_pusPhasingIndex )
702
/* Extract the entry open count from the provided handle. */
703
ulEntryOpenCnt = (f_pPhasingTsstClose->ulPhasingTsstHndl >> cOCT6100_ENTRY_OPEN_CNT_SHIFT) & cOCT6100_ENTRY_OPEN_CNT_MASK;
705
/* Check for errors. */
706
if ( pPhasingEntry->fReserved != TRUE )
707
return cOCT6100_ERR_PHASING_TSST_NOT_OPEN;
708
if ( pPhasingEntry->usDependencyCnt != 0 )
709
return cOCT6100_ERR_PHASING_TSST_ACTIVE_DEPENDENCIES;
710
if ( ulEntryOpenCnt != pPhasingEntry->byEntryOpenCnt )
711
return cOCT6100_ERR_PHASING_TSST_INVALID_HANDLE;
713
/* Return info needed to close the phasing TSST and release all resources. */
714
*f_pusTsstIndex = pPhasingEntry->usPhasingTsstIndex;
716
/*=======================================================================*/
718
return cOCT6100_ERR_OK;
723
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
725
Function: Oct6100ApiInvalidatePhasingStructs
727
Description: Closes a phasing TSST.
729
-------------------------------------------------------------------------------
730
| Argument | Description
731
-------------------------------------------------------------------------------
732
f_pApiInstance Pointer to API instance. This memory is used to keep the
733
present state of the chip and all its resources.
735
f_usTsstIndex Index of the entry in the TSST control memory.
737
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
738
#if !SKIP_Oct6100ApiInvalidatePhasingStructs
739
UINT32 Oct6100ApiInvalidatePhasingStructs(
740
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
741
IN UINT16 f_usTsstIndex )
743
tPOCT6100_SHARED_INFO pSharedInfo;
744
tOCT6100_WRITE_PARAMS WriteParams;
747
/* Obtain local pointer to shared portion of instance. */
748
pSharedInfo = f_pApiInstance->pSharedInfo;
750
WriteParams.pProcessContext = f_pApiInstance->pProcessContext;
752
WriteParams.ulUserChipId = pSharedInfo->ChipConfig.ulUserChipId;
754
/*------------------------------------------------------------------------------*/
755
/* Deactivate the TSST control memory. */
757
/* Set the input TSST control entry to unused. */
758
WriteParams.ulWriteAddress = cOCT6100_TSST_CONTROL_MEM_BASE + ( f_usTsstIndex * cOCT6100_TSST_CONTROL_MEM_ENTRY_SIZE );
760
WriteParams.usWriteData = 0x0000;
761
mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult );
762
if ( ulResult != cOCT6100_ERR_OK )
765
/*------------------------------------------------------------------------------*/
767
return cOCT6100_ERR_OK;
772
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
774
Function: Oct6100ApiReleasePhasingResources
776
Description: Release and clear the API entry associated to the phasing TSST.
778
-------------------------------------------------------------------------------
779
| Argument | Description
780
-------------------------------------------------------------------------------
781
f_pApiInstance Pointer to API instance. This memory is used to keep the
782
present state of the chip and all its resources.
784
f_usPhasingIndex Index of the phasing TSST in the API list.
786
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
787
#if !SKIP_Oct6100ApiReleasePhasingResources
788
UINT32 Oct6100ApiReleasePhasingResources(
789
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
790
IN UINT16 f_usPhasingIndex )
792
tPOCT6100_SHARED_INFO pSharedInfo;
793
tPOCT6100_API_PHASING_TSST pPhasingEntry;
796
/* Obtain local pointer to shared portion of instance. */
797
pSharedInfo = f_pApiInstance->pSharedInfo;
799
mOCT6100_GET_PHASING_TSST_ENTRY_PNT( pSharedInfo, pPhasingEntry, f_usPhasingIndex );
801
/* Release the entry in the phasing TSST list. */
802
ulResult = Oct6100ApiReleasePhasingEntry( f_pApiInstance, f_usPhasingIndex );
803
if ( ulResult == cOCT6100_ERR_OK )
805
/* Release the entry. */
806
ulResult = Oct6100ApiReleaseTsst( f_pApiInstance,
807
pPhasingEntry->usTimeslot,
808
pPhasingEntry->usStream,
809
cOCT6100_NUMBER_TSSTS_1,
811
cOCT6100_INVALID_INDEX ); /* Release the TSST entry */
812
if ( ulResult != cOCT6100_ERR_OK )
814
return cOCT6100_ERR_FATAL;
822
/*=============================================================*/
823
/* Update the phasing TSST's list entry. */
825
/* Mark the entry as closed. */
826
pPhasingEntry->fReserved = FALSE;
827
pPhasingEntry->byEntryOpenCnt++;
829
/* Decrement the number of phasing TSSTs opened. */
830
f_pApiInstance->pSharedInfo->ChipStats.usNumberPhasingTssts--;
832
/*=============================================================*/
834
return cOCT6100_ERR_OK;
839
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
841
Function: Oct6100ApiReservePhasingEntry
843
Description: Reserves a phasing TSST API entry.
845
-------------------------------------------------------------------------------
846
| Argument | Description
847
-------------------------------------------------------------------------------
848
f_pApiInstance Pointer to API instance. This memory is used to keep
849
the present state of the chip and all its resources.
851
f_pusPhasingIndex Resulting index reserved in the phasing TSST list.
853
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
854
#if !SKIP_Oct6100ApiReservePhasingEntry
855
UINT32 Oct6100ApiReservePhasingEntry(
856
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
857
OUT PUINT16 f_pusPhasingIndex )
859
tPOCT6100_SHARED_INFO pSharedInfo;
862
UINT32 ulPhasingIndex;
864
/* Get local pointer to shared portion of instance. */
865
pSharedInfo = f_pApiInstance->pSharedInfo;
867
mOCT6100_GET_PHASING_TSST_ALLOC_PNT( pSharedInfo, pPhasingAlloc )
869
ulResult = OctapiLlmAllocAlloc( pPhasingAlloc, &ulPhasingIndex );
870
if ( ulResult != cOCT6100_ERR_OK )
872
if ( ulResult == OCTAPI_LLM_NO_STRUCTURES_LEFT )
873
return cOCT6100_ERR_PHASING_TSST_ALL_ENTRIES_ARE_OPENED;
875
return cOCT6100_ERR_FATAL_3A;
878
*f_pusPhasingIndex = (UINT16)( ulPhasingIndex & 0xFFFF );
880
return cOCT6100_ERR_OK;
885
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
887
Function: Oct6100ApiReleasePhasingEntry
889
Description: Releases the specified phasing TSST API entry.
891
-------------------------------------------------------------------------------
892
| Argument | Description
893
-------------------------------------------------------------------------------
894
f_pApiInstance Pointer to API instance. This memory is used to keep
895
the present state of the chip and all its resources.
897
f_usPhasingIndex Index reserved in the phasing TSST API list.
899
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
900
#if !SKIP_Oct6100ApiReleasePhasingEntry
901
UINT32 Oct6100ApiReleasePhasingEntry(
902
IN OUT tPOCT6100_INSTANCE_API f_pApiInstance,
903
IN UINT16 f_usPhasingIndex )
905
tPOCT6100_SHARED_INFO pSharedInfo;
909
/* Get local pointer to shared portion of instance. */
910
pSharedInfo = f_pApiInstance->pSharedInfo;
912
mOCT6100_GET_PHASING_TSST_ALLOC_PNT( pSharedInfo, pPhasingAlloc )
914
ulResult = OctapiLlmAllocDealloc( pPhasingAlloc, f_usPhasingIndex );
915
if ( ulResult != cOCT6100_ERR_OK )
917
return cOCT6100_ERR_FATAL_3B;
920
return cOCT6100_ERR_OK;
added
removed
xpp/oct612x/octdeviceapi/oct6100api/oct6100_api/oct6100_phasing_tsst.c
