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  • Committer: Bazaar Package Importer
  • Author(s): Sven Eckelmann
  • Date: 2011-07-24 14:23:26 UTC
  • mfrom: (10.1.2 experimental)
  • Revision ID: james.westby@ubuntu.com-20110724142326-x9z5qu8j9jecrmod
Tags: 1.99.4+2
http://bugs.debian.org/633693
* Upload to unstable
* Remove overrides for lintian warning about change to native package
* Update Vcs-* fields to new anonscm.debian.org URLs in debian/control
* Fix spelling of "Flexible" in debian/control (Closes: #633693)
* Mark all targets in debian/rules as phony
* Add some information about the mupen64plus 2.0 vision in debian/NEWS

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r4300/x86/gcop1_d.c
1
 
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2
 
 *   Mupen64plus - gcop1_d.c                                               *
3
 
 *   Mupen64Plus homepage: http://code.google.com/p/mupen64plus/           *
4
 
 *   Copyright (C) 2002 Hacktarux                                          *
5
 
 *                                                                         *
6
 
 *   This program is free software; you can redistribute it and/or modify  *
7
 
 *   it under the terms of the GNU General Public License as published by  *
8
 
 *   the Free Software Foundation; either version 2 of the License, or     *
9
 
 *   (at your option) any later version.                                   *
10
 
 *                                                                         *
11
 
 *   This program is distributed in the hope that it will be useful,       *
12
 
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
13
 
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
14
 
 *   GNU General Public License for more details.                          *
15
 
 *                                                                         *
16
 
 *   You should have received a copy of the GNU General Public License     *
17
 
 *   along with this program; if not, write to the                         *
18
 
 *   Free Software Foundation, Inc.,                                       *
19
 
 *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.          *
20
 
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
21
 
 
22
 
#include <stdio.h>
23
 
 
24
 
#include "assemble.h"
25
 
#include "interpret.h"
26
 
 
27
 
#include "../recomph.h"
28
 
#include "../r4300.h"
29
 
#include "../ops.h"
30
 
 
31
 
void genadd_d(void)
32
 
{
33
 
#ifdef INTERPRET_ADD_D
34
 
    gencallinterp((unsigned int)ADD_D, 0);
35
 
#else
36
 
   gencheck_cop1_unusable();
37
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
38
 
   fld_preg32_qword(EAX);
39
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.ft]));
40
 
   fadd_preg32_qword(EAX);
41
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
42
 
   fstp_preg32_qword(EAX);
43
 
#endif
44
 
}
45
 
 
46
 
void gensub_d(void)
47
 
{
48
 
#ifdef INTERPRET_SUB_D
49
 
   gencallinterp((unsigned int)SUB_D, 0);
50
 
#else
51
 
   gencheck_cop1_unusable();
52
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
53
 
   fld_preg32_qword(EAX);
54
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.ft]));
55
 
   fsub_preg32_qword(EAX);
56
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
57
 
   fstp_preg32_qword(EAX);
58
 
#endif
59
 
}
60
 
 
61
 
void genmul_d(void)
62
 
{
63
 
#ifdef INTERPRET_MUL_D
64
 
   gencallinterp((unsigned int)MUL_D, 0);
65
 
#else
66
 
   gencheck_cop1_unusable();
67
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
68
 
   fld_preg32_qword(EAX);
69
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.ft]));
70
 
   fmul_preg32_qword(EAX);
71
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
72
 
   fstp_preg32_qword(EAX);
73
 
#endif
74
 
}
75
 
 
76
 
void gendiv_d(void)
77
 
{
78
 
#ifdef INTERPRET_DIV_D
79
 
   gencallinterp((unsigned int)DIV_D, 0);
80
 
#else
81
 
   gencheck_cop1_unusable();
82
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
83
 
   fld_preg32_qword(EAX);
84
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.ft]));
85
 
   fdiv_preg32_qword(EAX);
86
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
87
 
   fstp_preg32_qword(EAX);
88
 
#endif
89
 
}
90
 
 
91
 
void gensqrt_d(void)
92
 
{
93
 
#ifdef INTERPRET_SQRT_D
94
 
   gencallinterp((unsigned int)SQRT_D, 0);
95
 
#else
96
 
   gencheck_cop1_unusable();
97
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
98
 
   fld_preg32_qword(EAX);
99
 
   fsqrt();
100
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
101
 
   fstp_preg32_qword(EAX);
102
 
#endif
103
 
}
104
 
 
105
 
void genabs_d(void)
106
 
{
107
 
#ifdef INTERPRET_ABS_D
108
 
   gencallinterp((unsigned int)ABS_D, 0);
109
 
#else
110
 
   gencheck_cop1_unusable();
111
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
112
 
   fld_preg32_qword(EAX);
113
 
   fabs_();
114
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
115
 
   fstp_preg32_qword(EAX);
116
 
#endif
117
 
}
118
 
 
119
 
void genmov_d(void)
120
 
{
121
 
#ifdef INTERPRET_MOV_D
122
 
   gencallinterp((unsigned int)MOV_D, 0);
123
 
#else
124
 
   gencheck_cop1_unusable();
125
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
126
 
   mov_reg32_preg32(EBX, EAX);
127
 
   mov_reg32_preg32pimm32(ECX, EAX, 4);
128
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
129
 
   mov_preg32_reg32(EAX, EBX);
130
 
   mov_preg32pimm32_reg32(EAX, 4, ECX);
131
 
#endif
132
 
}
133
 
 
134
 
void genneg_d(void)
135
 
{
136
 
#ifdef INTERPRET_NEG_D
137
 
   gencallinterp((unsigned int)NEG_D, 0);
138
 
#else
139
 
   gencheck_cop1_unusable();
140
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fs]));
141
 
   fld_preg32_qword(EAX);
142
 
   fchs();
143
 
   mov_eax_memoffs32((unsigned int *)(&reg_cop1_double[dst->f.cf.fd]));
144
 
   fstp_preg32_qword(EAX);
145
 
#endif
146
 
}
147
 
 
148
 
void genround_l_d(void)
149
 
{
150
 
#ifdef INTERPRET_ROUND_L_D
151
 
   gencallinterp((unsigned int)ROUND_L_D, 0);
152
 
#else
153
 
   gencheck_cop1_unusable();
154
 
   fldcw_m16((unsigned short*)&round_mode);
155
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
156
 
   fld_preg32_qword(EAX);
157
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fd]));
158
 
   fistp_preg32_qword(EAX);
159
 
   fldcw_m16((unsigned short*)&rounding_mode);
160
 
#endif
161
 
}
162
 
 
163
 
void gentrunc_l_d(void)
164
 
{
165
 
#ifdef INTERPRET_TRUNC_L_D
166
 
   gencallinterp((unsigned int)TRUNC_L_D, 0);
167
 
#else
168
 
   gencheck_cop1_unusable();
169
 
   fldcw_m16((unsigned short*)&trunc_mode);
170
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
171
 
   fld_preg32_qword(EAX);
172
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fd]));
173
 
   fistp_preg32_qword(EAX);
174
 
   fldcw_m16((unsigned short*)&rounding_mode);
175
 
#endif
176
 
}
177
 
 
178
 
void genceil_l_d(void)
179
 
{
180
 
#ifdef INTERPRET_CEIL_L_D
181
 
   gencallinterp((unsigned int)CEIL_L_D, 0);
182
 
#else
183
 
   gencheck_cop1_unusable();
184
 
   fldcw_m16((unsigned short*)&ceil_mode);
185
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
186
 
   fld_preg32_qword(EAX);
187
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fd]));
188
 
   fistp_preg32_qword(EAX);
189
 
   fldcw_m16((unsigned short*)&rounding_mode);
190
 
#endif
191
 
}
192
 
 
193
 
void genfloor_l_d(void)
194
 
{
195
 
#ifdef INTERPRET_FLOOR_L_D
196
 
   gencallinterp((unsigned int)FLOOR_L_D, 0);
197
 
#else
198
 
   gencheck_cop1_unusable();
199
 
   fldcw_m16((unsigned short*)&floor_mode);
200
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
201
 
   fld_preg32_qword(EAX);
202
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fd]));
203
 
   fistp_preg32_qword(EAX);
204
 
   fldcw_m16((unsigned short*)&rounding_mode);
205
 
#endif
206
 
}
207
 
 
208
 
void genround_w_d(void)
209
 
{
210
 
#ifdef INTERPRET_ROUND_W_D
211
 
   gencallinterp((unsigned int)ROUND_W_D, 0);
212
 
#else
213
 
   gencheck_cop1_unusable();
214
 
   fldcw_m16((unsigned short*)&round_mode);
215
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
216
 
   fld_preg32_qword(EAX);
217
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_simple[dst->f.cf.fd]));
218
 
   fistp_preg32_dword(EAX);
219
 
   fldcw_m16((unsigned short*)&rounding_mode);
220
 
#endif
221
 
}
222
 
 
223
 
void gentrunc_w_d(void)
224
 
{
225
 
#ifdef INTERPRET_TRUNC_W_D
226
 
   gencallinterp((unsigned int)TRUNC_W_D, 0);
227
 
#else
228
 
   gencheck_cop1_unusable();
229
 
   fldcw_m16((unsigned short*)&trunc_mode);
230
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
231
 
   fld_preg32_qword(EAX);
232
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_simple[dst->f.cf.fd]));
233
 
   fistp_preg32_dword(EAX);
234
 
   fldcw_m16((unsigned short*)&rounding_mode);
235
 
#endif
236
 
}
237
 
 
238
 
void genceil_w_d(void)
239
 
{
240
 
#ifdef INTERPRET_CEIL_W_D
241
 
   gencallinterp((unsigned int)CEIL_W_D, 0);
242
 
#else
243
 
   gencheck_cop1_unusable();
244
 
   fldcw_m16((unsigned short*)&ceil_mode);
245
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
246
 
   fld_preg32_qword(EAX);
247
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_simple[dst->f.cf.fd]));
248
 
   fistp_preg32_dword(EAX);
249
 
   fldcw_m16((unsigned short*)&rounding_mode);
250
 
#endif
251
 
}
252
 
 
253
 
void genfloor_w_d(void)
254
 
{
255
 
#ifdef INTERPRET_FLOOR_W_D
256
 
   gencallinterp((unsigned int)FLOOR_W_D, 0);
257
 
#else
258
 
   gencheck_cop1_unusable();
259
 
   fldcw_m16((unsigned short*)&floor_mode);
260
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
261
 
   fld_preg32_qword(EAX);
262
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_simple[dst->f.cf.fd]));
263
 
   fistp_preg32_dword(EAX);
264
 
   fldcw_m16((unsigned short*)&rounding_mode);
265
 
#endif
266
 
}
267
 
 
268
 
void gencvt_s_d(void)
269
 
{
270
 
#ifdef INTERPRET_CVT_S_D
271
 
   gencallinterp((unsigned int)CVT_S_D, 0);
272
 
#else
273
 
   gencheck_cop1_unusable();
274
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
275
 
   fld_preg32_qword(EAX);
276
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_simple[dst->f.cf.fd]));
277
 
   fstp_preg32_dword(EAX);
278
 
#endif
279
 
}
280
 
 
281
 
void gencvt_w_d(void)
282
 
{
283
 
#ifdef INTERPRET_CVT_W_D
284
 
   gencallinterp((unsigned int)CVT_W_D, 0);
285
 
#else
286
 
   gencheck_cop1_unusable();
287
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
288
 
   fld_preg32_qword(EAX);
289
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_simple[dst->f.cf.fd]));
290
 
   fistp_preg32_dword(EAX);
291
 
#endif
292
 
}
293
 
 
294
 
void gencvt_l_d(void)
295
 
{
296
 
#ifdef INTERPRET_CVT_L_D
297
 
   gencallinterp((unsigned int)CVT_L_D, 0);
298
 
#else
299
 
   gencheck_cop1_unusable();
300
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
301
 
   fld_preg32_qword(EAX);
302
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fd]));
303
 
   fistp_preg32_qword(EAX);
304
 
#endif
305
 
}
306
 
 
307
 
void genc_f_d(void)
308
 
{
309
 
#ifdef INTERPRET_C_F_D
310
 
   gencallinterp((unsigned int)C_F_D, 0);
311
 
#else
312
 
   gencheck_cop1_unusable();
313
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000);
314
 
#endif
315
 
}
316
 
 
317
 
void genc_un_d(void)
318
 
{
319
 
#ifdef INTERPRET_C_UN_D
320
 
   gencallinterp((unsigned int)C_UN_D, 0);
321
 
#else
322
 
   gencheck_cop1_unusable();
323
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
324
 
   fld_preg32_qword(EAX);
325
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
326
 
   fld_preg32_qword(EAX);
327
 
   fucomip_fpreg(1);
328
 
   ffree_fpreg(0);
329
 
   jp_rj(12);
330
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
331
 
   jmp_imm_short(10); // 2
332
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
333
 
#endif
334
 
}
335
 
 
336
 
void genc_eq_d(void)
337
 
{
338
 
#ifdef INTERPRET_C_EQ_D
339
 
   gencallinterp((unsigned int)C_EQ_D, 0);
340
 
#else
341
 
   gencheck_cop1_unusable();
342
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
343
 
   fld_preg32_qword(EAX);
344
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
345
 
   fld_preg32_qword(EAX);
346
 
   fucomip_fpreg(1);
347
 
   ffree_fpreg(0);
348
 
   jne_rj(12); // 2
349
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
350
 
   jmp_imm_short(10); // 2
351
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
352
 
#endif
353
 
}
354
 
 
355
 
void genc_ueq_d(void)
356
 
{
357
 
#ifdef INTERPRET_C_UEQ_D
358
 
   gencallinterp((unsigned int)C_UEQ_D, 0);
359
 
#else
360
 
   gencheck_cop1_unusable();
361
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
362
 
   fld_preg32_qword(EAX);
363
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
364
 
   fld_preg32_qword(EAX);
365
 
   fucomip_fpreg(1);
366
 
   ffree_fpreg(0);
367
 
   jp_rj(14);
368
 
   jne_rj(12);
369
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
370
 
   jmp_imm_short(10); // 2
371
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
372
 
#endif
373
 
}
374
 
 
375
 
void genc_olt_d(void)
376
 
{
377
 
#ifdef INTERPRET_C_OLT_D
378
 
   gencallinterp((unsigned int)C_OLT_D, 0);
379
 
#else
380
 
   gencheck_cop1_unusable();
381
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
382
 
   fld_preg32_qword(EAX);
383
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
384
 
   fld_preg32_qword(EAX);
385
 
   fucomip_fpreg(1);
386
 
   ffree_fpreg(0);
387
 
   jae_rj(12); // 2
388
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
389
 
   jmp_imm_short(10); // 2
390
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
391
 
#endif
392
 
}
393
 
 
394
 
void genc_ult_d(void)
395
 
{
396
 
#ifdef INTERPRET_C_ULT_D
397
 
   gencallinterp((unsigned int)C_ULT_D, 0);
398
 
#else
399
 
   gencheck_cop1_unusable();
400
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
401
 
   fld_preg32_qword(EAX);
402
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
403
 
   fld_preg32_qword(EAX);
404
 
   fucomip_fpreg(1);
405
 
   ffree_fpreg(0);
406
 
   jp_rj(14);
407
 
   jae_rj(12); // 2
408
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
409
 
   jmp_imm_short(10); // 2
410
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
411
 
#endif
412
 
}
413
 
 
414
 
void genc_ole_d(void)
415
 
{
416
 
#ifdef INTERPRET_C_OLE_D
417
 
   gencallinterp((unsigned int)C_OLE_D, 0);
418
 
#else
419
 
   gencheck_cop1_unusable();
420
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
421
 
   fld_preg32_qword(EAX);
422
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
423
 
   fld_preg32_qword(EAX);
424
 
   fucomip_fpreg(1);
425
 
   ffree_fpreg(0);
426
 
   ja_rj(12); // 2
427
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
428
 
   jmp_imm_short(10); // 2
429
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
430
 
#endif
431
 
}
432
 
 
433
 
void genc_ule_d(void)
434
 
{
435
 
#ifdef INTERPRET_C_ULE_D
436
 
   gencallinterp((unsigned int)C_ULE_D, 0);
437
 
#else
438
 
   gencheck_cop1_unusable();
439
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
440
 
   fld_preg32_qword(EAX);
441
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
442
 
   fld_preg32_qword(EAX);
443
 
   fucomip_fpreg(1);
444
 
   ffree_fpreg(0);
445
 
   jp_rj(14);
446
 
   ja_rj(12); // 2
447
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
448
 
   jmp_imm_short(10); // 2
449
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
450
 
#endif
451
 
}
452
 
 
453
 
void genc_sf_d(void)
454
 
{
455
 
#ifdef INTERPRET_C_SF_D
456
 
   gencallinterp((unsigned int)C_SF_D, 0);
457
 
#else
458
 
   gencheck_cop1_unusable();
459
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
460
 
   fld_preg32_qword(EAX);
461
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
462
 
   fld_preg32_qword(EAX);
463
 
   fcomip_fpreg(1);
464
 
   ffree_fpreg(0);
465
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000);
466
 
#endif
467
 
}
468
 
 
469
 
void genc_ngle_d(void)
470
 
{
471
 
#ifdef INTERPRET_C_NGLE_D
472
 
   gencallinterp((unsigned int)C_NGLE_D, 0);
473
 
#else
474
 
   gencheck_cop1_unusable();
475
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
476
 
   fld_preg32_qword(EAX);
477
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
478
 
   fld_preg32_qword(EAX);
479
 
   fcomip_fpreg(1);
480
 
   ffree_fpreg(0);
481
 
   jp_rj(12);
482
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
483
 
   jmp_imm_short(10); // 2
484
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
485
 
#endif
486
 
}
487
 
 
488
 
void genc_seq_d(void)
489
 
{
490
 
#ifdef INTERPRET_C_SEQ_D
491
 
   gencallinterp((unsigned int)C_SEQ_D, 0);
492
 
#else
493
 
   gencheck_cop1_unusable();
494
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
495
 
   fld_preg32_qword(EAX);
496
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
497
 
   fld_preg32_qword(EAX);
498
 
   fcomip_fpreg(1);
499
 
   ffree_fpreg(0);
500
 
   jne_rj(12); // 2
501
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
502
 
   jmp_imm_short(10); // 2
503
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
504
 
#endif
505
 
}
506
 
 
507
 
void genc_ngl_d(void)
508
 
{
509
 
#ifdef INTERPRET_C_NGL_D
510
 
   gencallinterp((unsigned int)C_NGL_D, 0);
511
 
#else
512
 
   gencheck_cop1_unusable();
513
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
514
 
   fld_preg32_qword(EAX);
515
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
516
 
   fld_preg32_qword(EAX);
517
 
   fcomip_fpreg(1);
518
 
   ffree_fpreg(0);
519
 
   jp_rj(14);
520
 
   jne_rj(12);
521
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
522
 
   jmp_imm_short(10); // 2
523
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
524
 
#endif
525
 
}
526
 
 
527
 
void genc_lt_d(void)
528
 
{
529
 
#ifdef INTERPRET_C_LT_D
530
 
   gencallinterp((unsigned int)C_LT_D, 0);
531
 
#else
532
 
   gencheck_cop1_unusable();
533
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
534
 
   fld_preg32_qword(EAX);
535
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
536
 
   fld_preg32_qword(EAX);
537
 
   fcomip_fpreg(1);
538
 
   ffree_fpreg(0);
539
 
   jae_rj(12); // 2
540
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
541
 
   jmp_imm_short(10); // 2
542
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
543
 
#endif
544
 
}
545
 
 
546
 
void genc_nge_d(void)
547
 
{
548
 
#ifdef INTERPRET_C_NGE_D
549
 
   gencallinterp((unsigned int)C_NGE_D, 0);
550
 
#else
551
 
   gencheck_cop1_unusable();
552
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
553
 
   fld_preg32_qword(EAX);
554
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
555
 
   fld_preg32_qword(EAX);
556
 
   fcomip_fpreg(1);
557
 
   ffree_fpreg(0);
558
 
   jp_rj(14);
559
 
   jae_rj(12); // 2
560
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
561
 
   jmp_imm_short(10); // 2
562
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
563
 
#endif
564
 
}
565
 
 
566
 
void genc_le_d(void)
567
 
{
568
 
#ifdef INTERPRET_C_LE_D
569
 
   gencallinterp((unsigned int)C_LE_D, 0);
570
 
#else
571
 
   gencheck_cop1_unusable();
572
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
573
 
   fld_preg32_qword(EAX);
574
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
575
 
   fld_preg32_qword(EAX);
576
 
   fcomip_fpreg(1);
577
 
   ffree_fpreg(0);
578
 
   ja_rj(12); // 2
579
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
580
 
   jmp_imm_short(10); // 2
581
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
582
 
#endif
583
 
}
584
 
 
585
 
void genc_ngt_d(void)
586
 
{
587
 
#ifdef INTERPRET_C_NGT_D
588
 
   gencallinterp((unsigned int)C_NGT_D, 0);
589
 
#else
590
 
   gencheck_cop1_unusable();
591
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.ft]));
592
 
   fld_preg32_qword(EAX);
593
 
   mov_eax_memoffs32((unsigned int*)(&reg_cop1_double[dst->f.cf.fs]));
594
 
   fld_preg32_qword(EAX);
595
 
   fcomip_fpreg(1);
596
 
   ffree_fpreg(0);
597
 
   jp_rj(14);
598
 
   ja_rj(12); // 2
599
 
   or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10
600
 
   jmp_imm_short(10); // 2
601
 
   and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10
602
 
#endif
603
 
}
604