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Copyright (C) 2008 Marc Singer
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CPU specific routines, local to this port.
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It is noteworthy that the documentation for the Sample at Reset
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Register is confusing in how it specifies bits. The SampleAtReset[0] is
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really the MSB at [25].
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TCLK[1:0] = DEV_D[7:6]
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Mode[3:0] = DEV_D[12], DEV_D[15], DEV_D[4], DEV_D[2]
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#include <linux/types.h>
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#define MPP_SAMPLE_TCLK(v) (((v)>>8)&0x3) // 88F5182
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#define MPP_SAMPLE_MODE(v) (((v)>>4)&0xf) // 88F5182
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#define MPP_SAMPLE_TCLK_133 (0)
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#define MPP_SAMPLE_TCLK_150 (1)
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#define MPP_SAMPLE_TCLK_166 (2)
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#define MPP_SAMPLE_MODE_333_167 (0)
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#define MPP_SAMPLE_MODE_400_200 (1)
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#define MPP_SAMPLE_MODE_400_133 (2)
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#define MPP_SAMPLE_MODE_500_167 (3)
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uint32_t get_tclk (void)
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switch (MPP_SAMPLE_TCLK (MPP_SAMPLE)) {
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case MPP_SAMPLE_TCLK_133: return TCLK_133;
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case MPP_SAMPLE_TCLK_150: return TCLK_150;
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case MPP_SAMPLE_TCLK_166: return TCLK_166;
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uint32_t get_cpu_clk (void)
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switch (MPP_SAMPLE_MODE (MPP_SAMPLE)) {
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case MPP_SAMPLE_MODE_333_167: return CPUCLK_333;
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case MPP_SAMPLE_MODE_400_200: return CPUCLK_400;
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case MPP_SAMPLE_MODE_400_133: return CPUCLK_400;
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case MPP_SAMPLE_MODE_500_167: return CPUCLK_500;